commit 3d1d2da226f7e7d6c24b4892f38777fc332b5427
author Kyle Piefer <kpiefer@codeaurora.org> Mon Apr 10 14:50:19 2017 -0700
committer Kyle Piefer <kpiefer@codeaurora.org> Tue Apr 11 13:17:56 2017 -0700
tree 3dd052b7ca0bc7821f49d1a529dd8e21e763d850
parent 76f0a262c6aa7ea7f2fe4cd6cfcebe781956ad42

ARM: dts: msm: Add address and size cells for GMU

Add the #address-cells and #size-cells to qcom,gmu-pwrlevels
to prevent warnings.

CRs-Fixed: 2017390
Change-Id: I2576bc8b3ce80133c43b534d4ca23969f8e63beb
Signed-off-by: Kyle Piefer <kpiefer@codeaurora.org>

arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi

diff --git a/arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi b/arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi
index a6efb50..3f2317a 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi
@@ -256,6 +256,9 @@
 				"axi_clk", "memnoc_clk";
 
 		qcom,gmu-pwrlevels {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
 			compatible = "qcom,gmu-pwrlevels";
 
 			qcom,gmu-pwrlevel@0 {