tree 2ff1e7b2b29f3d268828c5edfabda4d9e8e10746
parent 78ec79bfd59e126e1cb394302bfa531a420b3ecd
author Caesar Wang <wxt@rock-chips.com> 1469629447 +0800
committer Jonathan Cameron <jic23@kernel.org> 1471975709 +0100

arm: dts: rockchip: add reset node for the exist saradc SoCs

SARADC controller needs to be reset before programming it, otherwise
it will not function properly.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>