| commit | 3dad5c5fa1d24c3bbb3e9e8ac0c52f35e045b807 | [log] [tgz] |
|---|---|---|
| author | Rhyland Klein <rklein@nvidia.com> | Thu Jan 14 14:24:35 2016 -0500 |
| committer | Thierry Reding <treding@nvidia.com> | Tue Feb 02 15:49:24 2016 +0100 |
| tree | d3b7c9b1ec316b1bc5838f754c43f8b8a3250049 | |
| parent | 3eb61566a6efc5a56ebe1e6b86519bc5e0b39003 [diff] |
clk: tegra: Fix pllx dyn step calculation The logic for calculating the input rate used when figuring out the proper dynamic steps for pllx was incorrect. It is supposed to be calculated using parent_rate / m but it was just using the parent rate directly, therefore using the wrong step values. Signed-off-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>