| commit | 3e82fd3dbab7655ec22fe9d0f6cb349bb76b231a | [log] [tgz] |
|---|---|---|
| author | Odelu Kukatla <okukatla@codeaurora.org> | Tue Jun 05 12:08:53 2018 +0530 |
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | Tue Jun 05 07:23:15 2018 -0700 |
| tree | eef43b696a8c397777257bcdcc38bc17f7382c00 | |
| parent | 90cb5ecd7cfd28c3d98b11ead4dbb0426742bfca [diff] |
clk: msm: Update pll clock ops for SDM439/SDM429 pll hardware on SDM439/429 requires 50uSec to stabilise after it has been brought out of reset. Update pll clock ops where we add 50uSec delay before polling pll lock status. Change-Id: Ib2b7c5c5be3fbb0ab64b5f9c06d6aaaede479a32 Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>