commit 3fccc0150e720ff344b5f9c5f8dd23778139018e
author Ralf Baechle <ralf@linux-mips.org> Sun Oct 23 13:58:21 2005 +0100
committer Ralf Baechle <ralf@linux-mips.org> Sat Oct 29 19:32:52 2005 +0100
tree f26a8dc6b6dbf7ce8eeb409915bc934e415a5d16
parent 3c5c8f6748ce5a4a63ac7d025ddca4a01574a1a7

Fix all the get_user / put_user related sparse warnings.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

arch/mips/math-emu/cp1emu.c

diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 99ffaa3..c4a7853 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -209,7 +209,7 @@
 	void * emulpc, *contpc;
 	unsigned int cond;
 
-	if (get_user(ir, (mips_instruction *) xcp->cp0_epc)) {
+	if (get_user(ir, (mips_instruction __user *) xcp->cp0_epc)) {
 		fpuemustats.errors++;
 		return SIGBUS;
 	}
@@ -240,7 +240,7 @@
 #endif
 			return SIGILL;
 		}
-		if (get_user(ir, (mips_instruction *) emulpc)) {
+		if (get_user(ir, (mips_instruction __user *) emulpc)) {
 			fpuemustats.errors++;
 			return SIGBUS;
 		}
@@ -258,7 +258,7 @@
 	switch (MIPSInst_OPCODE(ir)) {
 #ifndef SINGLE_ONLY_FPU
 	case ldc1_op:{
-		u64 *va = (void *) (xcp->regs[MIPSInst_RS(ir)] +
+		u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
 			MIPSInst_SIMM(ir));
 		u64 val;
 
@@ -272,7 +272,7 @@
 	}
 
 	case sdc1_op:{
-		u64 *va = (void *) (xcp->regs[MIPSInst_RS(ir)] +
+		u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
 			MIPSInst_SIMM(ir));
 		u64 val;
 
@@ -287,7 +287,7 @@
 #endif
 
 	case lwc1_op:{
-		u32 *va = (void *) (xcp->regs[MIPSInst_RS(ir)] +
+		u32 __user *va = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
 			MIPSInst_SIMM(ir));
 		u32 val;
 
@@ -307,7 +307,7 @@
 	}
 
 	case swc1_op:{
-		u32 *va = (void *) (xcp->regs[MIPSInst_RS(ir)] +
+		u32 __user *va = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
 			MIPSInst_SIMM(ir));
 		u32 val;
 
@@ -458,8 +458,8 @@
 					(xcp->cp0_epc +
 					(MIPSInst_SIMM(ir) << 2));
 
-				if (get_user(ir, (mips_instruction *)
-						(void *)  xcp->cp0_epc)) {
+				if (get_user(ir,
+				    (mips_instruction __user *) xcp->cp0_epc)) {
 					fpuemustats.errors++;
 					return SIGBUS;
 				}
@@ -633,12 +633,12 @@
 
 		ieee754sp(*handler) (ieee754sp, ieee754sp, ieee754sp);
 		ieee754sp fd, fr, fs, ft;
-		u32 *va;
+		u32 __user *va;
 		u32 val;
 
 		switch (MIPSInst_FUNC(ir)) {
 		case lwxc1_op:
-			va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
+			va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
 				xcp->regs[MIPSInst_FT(ir)]);
 
 			fpuemustats.loads++;
@@ -658,7 +658,7 @@
 			break;
 
 		case swxc1_op:
-			va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
+			va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
 				xcp->regs[MIPSInst_FT(ir)]);
 
 			fpuemustats.stores++;
@@ -727,12 +727,12 @@
 	case d_fmt:{		/* 1 */
 		ieee754dp(*handler) (ieee754dp, ieee754dp, ieee754dp);
 		ieee754dp fd, fr, fs, ft;
-		u64 *va;
+		u64 __user *va;
 		u64 val;
 
 		switch (MIPSInst_FUNC(ir)) {
 		case ldxc1_op:
-			va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
+			va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
 				xcp->regs[MIPSInst_FT(ir)]);
 
 			fpuemustats.loads++;
@@ -744,7 +744,7 @@
 			break;
 
 		case sdxc1_op:
-			va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
+			va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
 				xcp->regs[MIPSInst_FT(ir)]);
 
 			fpuemustats.stores++;
@@ -1298,7 +1298,7 @@
 	do {
 		prevepc = xcp->cp0_epc;
 
-		if (get_user(insn, (mips_instruction *) xcp->cp0_epc)) {
+		if (get_user(insn, (mips_instruction __user *) xcp->cp0_epc)) {
 			fpuemustats.errors++;
 			return SIGBUS;
 		}