| commit | 404c1ff67d241e8503fd46a09d324343aa321a8a | [log] [tgz] |
|---|---|---|
| author | Stephen Boyd <sboyd@codeaurora.org> | Fri Jul 11 12:55:27 2014 -0700 |
| committer | Stephen Boyd <sboyd@codeaurora.org> | Tue Jul 15 16:38:59 2014 -0700 |
| tree | ef9e18a1029de024540d02550d1a99d162d164a1 | |
| parent | 24d8fba44af32163334c1f162e65ba93eb2993fd [diff] |
clk: qcom: Support bypass RCG configuration In the case of HDMI clocks, we want to bypass the RCG's ability to divide the output clock and pass through the parent HDMI PLL rate. Add a simple set of clk_ops to configure the RCG to do this. This removes the need to keep adding more frequency entries to the tv_src clock whenever we want to support a new rate. Tested-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>