tree ef9e18a1029de024540d02550d1a99d162d164a1
parent 24d8fba44af32163334c1f162e65ba93eb2993fd
author Stephen Boyd <sboyd@codeaurora.org> 1405108527 -0700
committer Stephen Boyd <sboyd@codeaurora.org> 1405467539 -0700

clk: qcom: Support bypass RCG configuration

In the case of HDMI clocks, we want to bypass the RCG's ability
to divide the output clock and pass through the parent HDMI PLL
rate. Add a simple set of clk_ops to configure the RCG to do
this. This removes the need to keep adding more frequency entries
to the tv_src clock whenever we want to support a new rate.

Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>