tree 5fe628830617a648ed9bfd94eb5d3cd71f3dcc87
parent 63d2b0e8b665306d304fb0494561292f4a964a67
author Andy Shevchenko <andriy.shevchenko@linux.intel.com> 1560432752 +0300
committer Greg Kroah-Hartman <gregkh@linuxfoundation.org> 1580289867 +0100

dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width"

[ Upstream commit c24a5c735f87d0549060de31367c095e8810b895 ]

The commit

  080edf75d337 ("dmaengine: hsu: set HSU_CH_MTSR to memory width")

has been mistakenly submitted. The further investigations show that
the original code does better job since the memory side transfer size
has never been configured by DMA users.

As per latest revision of documentation: "Channel minimum transfer size
(CHnMTSR)... For IOSF UART, maximum value that can be programmed is 64 and
minimum value that can be programmed is 1."

This reverts commit 080edf75d337d35faa6fc3df99342b10d2848d16.

Fixes: 080edf75d337 ("dmaengine: hsu: set HSU_CH_MTSR to memory width")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>