drm/msm/dsi-staging: improve xlog debug support for dsi
This change adds more debug points in xlog for dsi
driver and also adds support to dump only dsi specific
registers along with dsi debug bus registers instead of
relying on full register dump every time.
Change-Id: I27c122e7aea146af8a0241142486a7cf5a408e80
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h b/drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h
index 144ccd9..9a923aa 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h
@@ -108,7 +108,8 @@
/* DSI controller common ops */
u32 dsi_ctrl_hw_cmn_get_interrupt_status(struct dsi_ctrl_hw *ctrl);
-void dsi_ctrl_hw_cmn_debug_bus(struct dsi_ctrl_hw *ctrl);
+void dsi_ctrl_hw_cmn_debug_bus(struct dsi_ctrl_hw *ctrl, u32 *entries,
+ u32 size);
void dsi_ctrl_hw_cmn_clear_interrupt_status(struct dsi_ctrl_hw *ctrl, u32 ints);
void dsi_ctrl_hw_cmn_enable_status_interrupts(struct dsi_ctrl_hw *ctrl,
u32 ints);
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c b/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c
index 32bc3eb..ba147e2 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c
@@ -243,6 +243,8 @@
dsi_ctrl->cell_index);
sde_dbg_reg_register_base(dbg_name, dsi_ctrl->hw.base,
msm_iomap_size(dsi_ctrl->pdev, "dsi_ctrl"));
+ sde_dbg_reg_register_dump_range(dbg_name, dbg_name, 0,
+ msm_iomap_size(dsi_ctrl->pdev, "dsi_ctrl"), 0);
error_remove_dir:
debugfs_remove(dir);
error:
@@ -272,6 +274,8 @@
int rc = 0;
struct dsi_ctrl_state_info *state = &dsi_ctrl->current_state;
+ SDE_EVT32(dsi_ctrl->cell_index, op);
+
switch (op) {
case DSI_CTRL_OP_POWER_STATE_CHANGE:
if (state->power_state == op_state) {
@@ -1788,11 +1792,14 @@
#if defined(CONFIG_DEBUG_FS)
-void dsi_ctrl_debug_dump(void)
+void dsi_ctrl_debug_dump(u32 *entries, u32 size)
{
struct list_head *pos, *tmp;
struct dsi_ctrl *ctrl = NULL;
+ if (!entries || !size)
+ return;
+
mutex_lock(&dsi_ctrl_list_lock);
list_for_each_safe(pos, tmp, &dsi_ctrl_list) {
struct dsi_ctrl_list_item *n;
@@ -1800,7 +1807,7 @@
n = list_entry(pos, struct dsi_ctrl_list_item, list);
ctrl = n->ctrl;
pr_err("dsi ctrl:%d\n", ctrl->cell_index);
- ctrl->hw.ops.debug_bus(&ctrl->hw);
+ ctrl->hw.ops.debug_bus(&ctrl->hw, entries, size);
}
mutex_unlock(&dsi_ctrl_list_lock);
}
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw.h b/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw.h
index d6fab59..73aab3f 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw.h
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw.h
@@ -457,8 +457,10 @@
/**
* debug_bus() - get dsi debug bus status.
* @ctrl: Pointer to the controller host hardware.
+ * @entries: Array of dsi debug bus control values.
+ * @size: Size of dsi debug bus control array.
*/
- void (*debug_bus)(struct dsi_ctrl_hw *ctrl);
+ void (*debug_bus)(struct dsi_ctrl_hw *ctrl, u32 *entries, u32 size);
/**
* soft_reset() - perform a soft reset on DSI controller
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw_cmn.c b/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw_cmn.c
index c1af52f..6dde454 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw_cmn.c
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw_cmn.c
@@ -459,18 +459,20 @@
pr_debug("[DSI_%d] Video engine setup done\n", ctrl->index);
}
-void dsi_ctrl_hw_cmn_debug_bus(struct dsi_ctrl_hw *ctrl)
+void dsi_ctrl_hw_cmn_debug_bus(struct dsi_ctrl_hw *ctrl, u32 *entries, u32 size)
{
- u32 reg = 0;
+ u32 reg = 0, i = 0;
- DSI_W32(ctrl, DSI_DEBUG_BUS_CTL, 0x181);
-
- /* make sure that debug test point is enabled */
- wmb();
- reg = DSI_R32(ctrl, DSI_DEBUG_BUS_STATUS);
-
- pr_err("[DSI_%d] debug bus status:0x%x\n", ctrl->index, reg);
+ for (i = 0; i < size; i++) {
+ DSI_W32(ctrl, DSI_DEBUG_BUS_CTL, entries[i]);
+ /* make sure that debug test point is enabled */
+ wmb();
+ reg = DSI_R32(ctrl, DSI_DEBUG_BUS_STATUS);
+ pr_err("[DSI_%d] debug bus ctrl: 0x%x status:0x%x\n",
+ ctrl->index, entries[i], reg);
+ }
}
+
/**
* cmd_engine_setup() - setup dsi host controller for command mode
* @ctrl: Pointer to the controller host hardware.
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c
index 7194f1a..5e4506c 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c
@@ -715,6 +715,7 @@
dsi_panel_release_panel_lock(panel);
return rc;
}
+ SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY);
if (te_check_override && gpio_is_valid(dsi_display->disp_te_gpio))
status_mode = ESD_MODE_PANEL_TE;
@@ -738,6 +739,7 @@
dsi_display_clk_ctrl(dsi_display->dsi_clk_handle,
DSI_ALL_CLKS, DSI_CLK_OFF);
dsi_panel_release_panel_lock(panel);
+ SDE_EVT32(SDE_EVTLOG_FUNC_EXIT);
return rc;
}
@@ -3665,6 +3667,7 @@
/* For split DSI, update the clock master first */
pr_debug("configuring seamless dynamic fps\n\n");
+ SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY);
m_ctrl = &display->ctrl[display->clk_master_idx];
rc = dsi_ctrl_async_timing_update(m_ctrl->ctrl, timing);
@@ -3699,6 +3702,7 @@
panel_mode->dsi_mode_flags = 0;
error:
+ SDE_EVT32(SDE_EVTLOG_FUNC_EXIT);
return rc;
}
@@ -5820,6 +5824,7 @@
return -EINVAL;
}
+ SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY);
mutex_lock(&display->display_lock);
mode = display->panel->cur_mode;
@@ -5954,6 +5959,7 @@
(void)dsi_panel_post_unprepare(display->panel);
error:
mutex_unlock(&display->display_lock);
+ SDE_EVT32(SDE_EVTLOG_FUNC_EXIT);
return rc;
}
@@ -6177,6 +6183,7 @@
pr_err("no valid mode set for the display");
return -EINVAL;
}
+ SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY);
/* Engine states and panel states are populated during splash
* resource init and hence we return early
@@ -6262,6 +6269,7 @@
(void)dsi_panel_disable(display->panel);
error:
mutex_unlock(&display->display_lock);
+ SDE_EVT32(SDE_EVTLOG_FUNC_EXIT);
return rc;
}
@@ -6324,6 +6332,7 @@
return -EINVAL;
}
+ SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY);
mutex_lock(&display->display_lock);
rc = dsi_display_wake_up(display);
@@ -6352,6 +6361,7 @@
display->name, rc);
mutex_unlock(&display->display_lock);
+ SDE_EVT32(SDE_EVTLOG_FUNC_EXIT);
return rc;
}
@@ -6381,6 +6391,7 @@
return -EINVAL;
}
+ SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY);
mutex_lock(&display->display_lock);
rc = dsi_display_wake_up(display);
@@ -6434,6 +6445,7 @@
display->name, rc);
mutex_unlock(&display->display_lock);
+ SDE_EVT32(SDE_EVTLOG_FUNC_EXIT);
return rc;
}
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_phy.c b/drivers/gpu/drm/msm/dsi-staging/dsi_phy.c
index 2e2d0d8..14559fc 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_phy.c
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_phy.c
@@ -564,6 +564,8 @@
snprintf(dbg_name, DSI_DEBUG_NAME_LEN, "dsi%d_phy", dsi_phy->index);
sde_dbg_reg_register_base(dbg_name, dsi_phy->hw.base,
msm_iomap_size(dsi_phy->pdev, "dsi_phy"));
+ sde_dbg_reg_register_dump_range(dbg_name, dbg_name, 0,
+ msm_iomap_size(dsi_phy->pdev, "dsi_phy"), 0);
return 0;
}
diff --git a/drivers/gpu/drm/msm/sde_dbg.c b/drivers/gpu/drm/msm/sde_dbg.c
index 5829095..758cc53 100644
--- a/drivers/gpu/drm/msm/sde_dbg.c
+++ b/drivers/gpu/drm/msm/sde_dbg.c
@@ -169,6 +169,11 @@
struct vbif_debug_bus_entry *entries;
};
+struct sde_dbg_dsi_debug_bus {
+ u32 *entries;
+ u32 size;
+};
+
/**
* struct sde_dbg_base - global sde debug base structure
* @evtlog: event log instance
@@ -202,6 +207,7 @@
struct sde_dbg_sde_debug_bus dbgbus_sde;
struct sde_dbg_vbif_debug_bus dbgbus_vbif_rt;
+ struct sde_dbg_dsi_debug_bus dbgbus_dsi;
bool dump_all;
bool dsi_dbg_bus;
u32 debugfs_ctrl;
@@ -2038,6 +2044,42 @@
{0x21c, 0x214, 0, 14, 0, 0xc}, /* xin blocks - clock side */
};
+static u32 dsi_dbg_bus_sdm845[] = {
+ 0x0001, 0x1001, 0x0001, 0x0011,
+ 0x1021, 0x0021, 0x0031, 0x0041,
+ 0x0051, 0x0061, 0x3061, 0x0061,
+ 0x2061, 0x2061, 0x1061, 0x1061,
+ 0x1061, 0x0071, 0x0071, 0x0071,
+ 0x0081, 0x0081, 0x00A1, 0x00A1,
+ 0x10A1, 0x20A1, 0x30A1, 0x10A1,
+ 0x10A1, 0x30A1, 0x20A1, 0x00B1,
+ 0x00C1, 0x00C1, 0x10C1, 0x20C1,
+ 0x30C1, 0x00D1, 0x00D1, 0x20D1,
+ 0x30D1, 0x00E1, 0x00E1, 0x00E1,
+ 0x00F1, 0x00F1, 0x0101, 0x0101,
+ 0x1101, 0x2101, 0x3101, 0x0111,
+ 0x0141, 0x1141, 0x0141, 0x1141,
+ 0x1141, 0x0151, 0x0151, 0x1151,
+ 0x2151, 0x3151, 0x0161, 0x0161,
+ 0x1161, 0x0171, 0x0171, 0x0181,
+ 0x0181, 0x0191, 0x0191, 0x01A1,
+ 0x01A1, 0x01B1, 0x01B1, 0x11B1,
+ 0x21B1, 0x01C1, 0x01C1, 0x11C1,
+ 0x21C1, 0x31C1, 0x01D1, 0x01D1,
+ 0x01D1, 0x01D1, 0x11D1, 0x21D1,
+ 0x21D1, 0x01E1, 0x01E1, 0x01F1,
+ 0x01F1, 0x0201, 0x0201, 0x0211,
+ 0x0221, 0x0231, 0x0241, 0x0251,
+ 0x0281, 0x0291, 0x0281, 0x0291,
+ 0x02A1, 0x02B1, 0x02C1, 0x0321,
+ 0x0321, 0x1321, 0x2321, 0x3321,
+ 0x0331, 0x0331, 0x1331, 0x0341,
+ 0x0341, 0x1341, 0x2341, 0x3341,
+ 0x0351, 0x0361, 0x0361, 0x1361,
+ 0x2361, 0x0371, 0x0381, 0x0391,
+ 0x03C1, 0x03D1, 0x03E1, 0x03F1,
+};
+
/**
* _sde_dbg_enable_power - use callback to turn power on for hw register access
* @enable: whether to turn power on or off
@@ -2603,7 +2645,8 @@
_sde_dbg_dump_vbif_dbg_bus(&sde_dbg_base.dbgbus_vbif_rt);
if (sde_dbg_base.dsi_dbg_bus || dump_all)
- dsi_ctrl_debug_dump();
+ dsi_ctrl_debug_dump(sde_dbg_base.dbgbus_dsi.entries,
+ sde_dbg_base.dbgbus_dsi.size);
if (do_panic && sde_dbg_base.panic_on_err)
panic(name);
@@ -3355,6 +3398,8 @@
dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;
dbg->dbgbus_vbif_rt.cmn.entries_size =
ARRAY_SIZE(vbif_dbg_bus_msm8998);
+ dbg->dbgbus_dsi.entries = NULL;
+ dbg->dbgbus_dsi.size = 0;
} else if (IS_SDM845_TARGET(hwversion) || IS_SDM670_TARGET(hwversion)) {
dbg->dbgbus_sde.entries = dbg_bus_sde_sdm845;
dbg->dbgbus_sde.cmn.entries_size =
@@ -3365,6 +3410,8 @@
dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;
dbg->dbgbus_vbif_rt.cmn.entries_size =
ARRAY_SIZE(vbif_dbg_bus_msm8998);
+ dbg->dbgbus_dsi.entries = dsi_dbg_bus_sdm845;
+ dbg->dbgbus_dsi.size = ARRAY_SIZE(dsi_dbg_bus_sdm845);
} else {
pr_err("unsupported chipset id %X\n", hwversion);
}
diff --git a/drivers/gpu/drm/msm/sde_dbg.h b/drivers/gpu/drm/msm/sde_dbg.h
index 9efb893..2921a38 100644
--- a/drivers/gpu/drm/msm/sde_dbg.h
+++ b/drivers/gpu/drm/msm/sde_dbg.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -344,8 +344,10 @@
/**
* dsi_ctrl_debug_dump - dump dsi debug dump status
+ * @entries: array of debug bus control values
+ * @size: size of the debug bus control array
*/
-void dsi_ctrl_debug_dump(void);
+void dsi_ctrl_debug_dump(u32 *entries, u32 size);
#else
static inline struct sde_dbg_evtlog *sde_evtlog_init(void)
@@ -437,7 +439,7 @@
{
}
-static inline void dsi_ctrl_debug_dump(void)
+static inline void dsi_ctrl_debug_dump(u32 entries, u32 size)
{
}