commit | 45e967553f3466f773ecd418c09fe92b753f18b0 | [log] [tgz] |
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author | Mark Brown <broonie@opensource.wolfsonmicro.com> | Fri Dec 02 18:23:37 2011 +0000 |
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | Sat Dec 03 10:59:45 2011 +0000 |
tree | 6b82204d900297b27229bc01be40cc394d215665 | |
parent | 88a1b12b9c70d1b2ea4d11bdfa6ae65c9570909b [diff] |
ASoC: Use a normal cache sync for WM8903 The driver used to use a complicated method to sync the register cache after having brought the bias level up to standby in resume due to the use of the write sequencer to manage the initial power up. Now that we don't use the write sequencer there is no need for this and we can just use snd_soc_cache_sync() directly. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Tested-by: Stephen Warren <swarren@nvidia.com>