| commit | 467cffba85791cdfce38c124d75bd578f4bb8625 | [log] [tgz] |
|---|---|---|
| author | Chris Wilson <chris@chris-wilson.co.uk> | Mon Mar 07 10:42:03 2011 +0000 |
| committer | Chris Wilson <chris@chris-wilson.co.uk> | Mon Mar 07 11:02:16 2011 +0000 |
| tree | 0691f4483f1ca2a2b090554682b060c208ea6886 | |
| parent | a1656b9090f7008d2941c314f5a64724bea2ae37 [diff] |
drm/i915: Rebind the buffer if its alignment constraints changes with tiling Early gen3 and gen2 chipset do not have the relaxed per-surface tiling constraints of the later chipsets, so we need to check that the GTT alignment is correct for the new tiling. If it is not, we need to rebind. Reported-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>