tree a9c172f6940e607b9c0c9a3bd7393bf0cc03e940
parent a7fbc0d62a4d46e642af889e7288fede5078bc46
author Cyril Chemparathy <cyril@ti.com> 1342900504 -0400
committer Will Deacon <will.deacon@arm.com> 1369926135 +0100

ARM: LPAE: accomodate >32-bit addresses for page table base

This patch redefines the early boot time use of the R4 register to steal a few
low order bits (ARCH_PGD_SHIFT bits) on LPAE systems.  This allows for up to
38-bit physical addresses.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Subash Patel <subash.rp@samsung.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>