tree c0fc904760630779d50025af6e1bb6fc0365b961
parent a9c8f117f43515572a914e9ec7332906c4e7cdde
author Suman Anna <s-anna@ti.com> 1442600191 -0500
committer Tony Lindgren <tony@atomide.com> 1444687237 -0700

ARM: dts: DRA72x: Add IPC sub-mailbox nodes for IPU1, IPU2 & DSP1

Add the sub-mailbox nodes that are used to communicate between
MPU and the remote processors IPU1, IPU2 and DSP1. These match the
respective node definitions on DRA74x to maintain compatibility for
the equivalent remote processors. There is no DSP2 on DRA72x, and
so the corresponding sub-mailbox node is not added.

These sub-mailbox nodes are added to match the hard-coded mailbox
configuration used within the TI IPC 3.x software package. The
Dual-Cortex M4 IPU1 and IPU2 processor sub-systems are assumed to
be running in SMP-mode, and hence only a single sub-mailbox node
is added for each.

All these sub-mailbox nodes are left in disabled state, and should
be enabled (and modified if needed) as per the individual product
configuration in the corresponding board dts files.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>