drm/msm/sde: cleanup alpha calc and plane stage in crtc
The foreground and background alpha calculation is
overlapping between crtc and lm interface. It can
be handled cleanly at single stage and update on
layer mixer. The plane staging is also complex in
same API because same plane is staged multiple times
with multiple mixers. Such invalid configurations
are leading to underruns. This patch fixes the
issues, reduces the complexity of the code and
removes extra register updates on each composition
cycle.
Change-Id: I8ea1367be06963253011ebf7e00a7555a35c7d7c
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_ctl.h b/drivers/gpu/drm/msm/sde/sde_hw_ctl.h
index 6e08c8a..46f9a24 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_ctl.h
+++ b/drivers/gpu/drm/msm/sde/sde_hw_ctl.h
@@ -31,11 +31,9 @@
/**
* struct sde_hw_stage_cfg - blending stage cfg
* @stage
- * @border_enable
*/
struct sde_hw_stage_cfg {
- enum sde_sspp stage[SDE_STAGE_MAX][SDE_MAX_PIPES_PER_STAGE];
- u8 border_enable[CRTC_DUAL_MIXERS];
+ enum sde_sspp stage[CRTC_DUAL_MIXERS][SDE_STAGE_MAX][PIPES_PER_STAGE];
};
/**
@@ -98,12 +96,10 @@
int (*reset)(struct sde_hw_ctl *c);
- int (*get_bitmask_sspp)(struct sde_hw_ctl *ctx,
- u32 *flushbits,
+ uint32_t (*get_bitmask_sspp)(struct sde_hw_ctl *ctx,
enum sde_sspp blk);
- int (*get_bitmask_mixer)(struct sde_hw_ctl *ctx,
- u32 *flushbits,
+ uint32_t (*get_bitmask_mixer)(struct sde_hw_ctl *ctx,
enum sde_lm blk);
int (*get_bitmask_dspp)(struct sde_hw_ctl *ctx,