Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6:
[SPARC64]: Fix D-cache corruption in mremap
[SPARC64]: Make smp_processor_id() functional before start_kernel()
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index f14b2d0..95273de 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -376,7 +376,7 @@
ecc_mask = 0;
}
- if (cpu_arch <= CPU_ARCH_ARMv5TEJ) {
+ if (cpu_arch <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) {
for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
if (mem_types[i].prot_l1)
mem_types[i].prot_l1 |= PMD_BIT4;
@@ -631,7 +631,7 @@
pgd = init_mm.pgd;
base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT;
- if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ)
+ if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
base_pmdval |= PMD_BIT4;
for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) {
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index ee5fbb0..e8ff09f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -13,7 +13,7 @@
default SGI_IP22
config MIPS_MTX1
- bool "Support for 4G Systems MTX-1 board"
+ bool "4G Systems MTX-1 board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select SOC_AU1500
@@ -120,7 +120,7 @@
select SYS_SUPPORTS_LITTLE_ENDIAN
config MIPS_COBALT
- bool "Support for Cobalt Server"
+ bool "Cobalt Server"
select DMA_NONCOHERENT
select HW_HAS_PCI
select I8259
@@ -132,7 +132,7 @@
select SYS_SUPPORTS_LITTLE_ENDIAN
config MACH_DECSTATION
- bool "Support for DECstations"
+ bool "DECstations"
select BOOT_ELF32
select DMA_NONCOHERENT
select EARLY_PRINTK
@@ -158,7 +158,7 @@
otherwise choose R3000.
config MIPS_EV64120
- bool "Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)"
+ bool "Galileo EV64120 Evaluation board (EXPERIMENTAL)"
depends on EXPERIMENTAL
select DMA_NONCOHERENT
select HW_HAS_PCI
@@ -175,7 +175,7 @@
kernel for this platform.
config MIPS_EV96100
- bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)"
+ bool "Galileo EV96100 Evaluation board (EXPERIMENTAL)"
depends on EXPERIMENTAL
select DMA_NONCOHERENT
select HW_HAS_PCI
@@ -195,7 +195,7 @@
here if you wish to build a kernel for this platform.
config MIPS_IVR
- bool "Support for Globespan IVR board"
+ bool "Globespan IVR board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select ITE_BOARD_GEN
@@ -211,7 +211,7 @@
build a kernel for this platform.
config MIPS_ITE8172
- bool "Support for ITE 8172G board"
+ bool "ITE 8172G board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select ITE_BOARD_GEN
@@ -228,7 +228,7 @@
a kernel for this platform.
config MACH_JAZZ
- bool "Support for the Jazz family of machines"
+ bool "Jazz family of machines"
select ARC
select ARC32
select ARCH_MAY_HAVE_PC_FDC
@@ -246,7 +246,7 @@
Olivetti M700-10 workstations.
config LASAT
- bool "Support for LASAT Networks platforms"
+ bool "LASAT Networks platforms"
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_GT64120
@@ -258,7 +258,7 @@
select SYS_SUPPORTS_LITTLE_ENDIAN
config MIPS_ATLAS
- bool "Support for MIPS Atlas board"
+ bool "MIPS Atlas board"
select BOOT_ELF32
select DMA_NONCOHERENT
select IRQ_CPU
@@ -283,7 +283,7 @@
board.
config MIPS_MALTA
- bool "Support for MIPS Malta board"
+ bool "MIPS Malta board"
select ARCH_MAY_HAVE_PC_FDC
select BOOT_ELF32
select HAVE_STD_PC_SERIAL_PORT
@@ -311,7 +311,7 @@
board.
config MIPS_SEAD
- bool "Support for MIPS SEAD board (EXPERIMENTAL)"
+ bool "MIPS SEAD board (EXPERIMENTAL)"
depends on EXPERIMENTAL
select IRQ_CPU
select DMA_NONCOHERENT
@@ -328,7 +328,7 @@
board.
config MIPS_SIM
- bool 'Support for MIPS simulator (MIPSsim)'
+ bool 'MIPS simulator (MIPSsim)'
select DMA_NONCOHERENT
select IRQ_CPU
select SYS_HAS_CPU_MIPS32_R1
@@ -341,7 +341,7 @@
emulator.
config MOMENCO_JAGUAR_ATX
- bool "Support for Momentum Jaguar board"
+ bool "Momentum Jaguar board"
select BOOT_ELF32
select DMA_NONCOHERENT
select HW_HAS_PCI
@@ -361,7 +361,7 @@
Momentum Computer <http://www.momenco.com/>.
config MOMENCO_OCELOT
- bool "Support for Momentum Ocelot board"
+ bool "Momentum Ocelot board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
@@ -378,7 +378,7 @@
Momentum Computer <http://www.momenco.com/>.
config MOMENCO_OCELOT_3
- bool "Support for Momentum Ocelot-3 board"
+ bool "Momentum Ocelot-3 board"
select BOOT_ELF32
select DMA_NONCOHERENT
select HW_HAS_PCI
@@ -397,7 +397,7 @@
PMC-Sierra Rm79000 core.
config MOMENCO_OCELOT_C
- bool "Support for Momentum Ocelot-C board"
+ bool "Momentum Ocelot-C board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
@@ -414,7 +414,7 @@
Momentum Computer <http://www.momenco.com/>.
config MOMENCO_OCELOT_G
- bool "Support for Momentum Ocelot-G board"
+ bool "Momentum Ocelot-G board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
@@ -431,23 +431,23 @@
Momentum Computer <http://www.momenco.com/>.
config MIPS_XXS1500
- bool "Support for MyCable XXS1500 board"
+ bool "MyCable XXS1500 board"
select DMA_NONCOHERENT
select SOC_AU1500
select SYS_SUPPORTS_LITTLE_ENDIAN
config PNX8550_V2PCI
- bool "Support for Philips PNX8550 based Viper2-PCI board"
+ bool "Philips PNX8550 based Viper2-PCI board"
select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
config PNX8550_JBS
- bool "Support for Philips PNX8550 based JBS board"
+ bool "Philips PNX8550 based JBS board"
select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
config DDB5074
- bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)"
+ bool "NEC DDB Vrc-5074 (EXPERIMENTAL)"
depends on EXPERIMENTAL
select DDB5XXX_COMMON
select DMA_NONCOHERENT
@@ -465,7 +465,7 @@
evaluation board.
config DDB5476
- bool "Support for NEC DDB Vrc-5476"
+ bool "NEC DDB Vrc-5476"
select DDB5XXX_COMMON
select DMA_NONCOHERENT
select HAVE_STD_PC_SERIAL_PORT
@@ -486,7 +486,7 @@
IDE controller, PS2 keyboard, PS2 mouse, etc.
config DDB5477
- bool "Support for NEC DDB Vrc-5477"
+ bool "NEC DDB Vrc-5477"
select DDB5XXX_COMMON
select DMA_NONCOHERENT
select HW_HAS_PCI
@@ -504,13 +504,13 @@
ether port USB, AC97, PCI, etc.
config MACH_VR41XX
- bool "Support for NEC VR4100 series based machines"
+ bool "NEC VR41XX-based machines"
select SYS_HAS_CPU_VR41XX
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
config PMC_YOSEMITE
- bool "Support for PMC-Sierra Yosemite eval board"
+ bool "PMC-Sierra Yosemite eval board"
select DMA_COHERENT
select HW_HAS_PCI
select IRQ_CPU
@@ -527,7 +527,7 @@
manufactured by PMC-Sierra.
config QEMU
- bool "Support for Qemu"
+ bool "Qemu"
select DMA_COHERENT
select GENERIC_ISA_DMA
select HAVE_STD_PC_SERIAL_PORT
@@ -547,7 +547,7 @@
can be found at http://www.linux-mips.org/wiki/Qemu.
config SGI_IP22
- bool "Support for SGI IP22 (Indy/Indigo2)"
+ bool "SGI IP22 (Indy/Indigo2)"
select ARC
select ARC32
select BOOT_ELF32
@@ -567,7 +567,7 @@
that runs on these, say Y here.
config SGI_IP27
- bool "Support for SGI IP27 (Origin200/2000)"
+ bool "SGI IP27 (Origin200/2000)"
select ARC
select ARC64
select BOOT_ELF64
@@ -583,7 +583,7 @@
here.
config SGI_IP32
- bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
+ bool "SGI IP32 (O2) (EXPERIMENTAL)"
depends on EXPERIMENTAL
select ARC
select ARC32
@@ -604,7 +604,7 @@
If you want this kernel to run on SGI O2 workstation, say Y here.
config SIBYTE_BIGSUR
- bool "Support for Sibyte BCM91480B-BigSur"
+ bool "Sibyte BCM91480B-BigSur"
select BOOT_ELF32
select DMA_COHERENT
select PCI_DOMAINS
@@ -615,7 +615,7 @@
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_SWARM
- bool "Support for Sibyte BCM91250A-SWARM"
+ bool "Sibyte BCM91250A-SWARM"
select BOOT_ELF32
select DMA_COHERENT
select SIBYTE_SB1250
@@ -626,7 +626,7 @@
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_SENTOSA
- bool "Support for Sibyte BCM91250E-Sentosa"
+ bool "Sibyte BCM91250E-Sentosa"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -637,7 +637,7 @@
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_RHONE
- bool "Support for Sibyte BCM91125E-Rhone"
+ bool "Sibyte BCM91125E-Rhone"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -648,7 +648,7 @@
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_CARMEL
- bool "Support for Sibyte BCM91120x-Carmel"
+ bool "Sibyte BCM91120x-Carmel"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -659,7 +659,7 @@
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_PTSWARM
- bool "Support for Sibyte BCM91250PT-PTSWARM"
+ bool "Sibyte BCM91250PT-PTSWARM"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -671,7 +671,7 @@
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_LITTLESUR
- bool "Support for Sibyte BCM91250C2-LittleSur"
+ bool "Sibyte BCM91250C2-LittleSur"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -683,7 +683,7 @@
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_CRHINE
- bool "Support for Sibyte BCM91120C-CRhine"
+ bool "Sibyte BCM91120C-CRhine"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -694,7 +694,7 @@
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_CRHONE
- bool "Support for Sibyte BCM91125C-CRhone"
+ bool "Sibyte BCM91125C-CRhone"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
@@ -706,7 +706,7 @@
select SYS_SUPPORTS_LITTLE_ENDIAN
config SNI_RM200_PCI
- bool "Support for SNI RM200 PCI"
+ bool "SNI RM200 PCI"
select ARC
select ARC32
select ARCH_MAY_HAVE_PC_FDC
@@ -732,7 +732,7 @@
support this machine type.
config TOSHIBA_JMR3927
- bool "Support for Toshiba JMR-TX3927 board"
+ bool "Toshiba JMR-TX3927 board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_TX3927
@@ -743,7 +743,7 @@
select TOSHIBA_BOARDS
config TOSHIBA_RBTX4927
- bool "Support for Toshiba TBTX49[23]7 board"
+ bool "Toshiba TBTX49[23]7 board"
select DMA_NONCOHERENT
select HAS_TXX9_SERIAL
select HW_HAS_PCI
@@ -760,7 +760,7 @@
support this machine type
config TOSHIBA_RBTX4938
- bool "Support for Toshiba RBTX4938 board"
+ bool "Toshiba RBTX4938 board"
select HAVE_STD_PC_SERIAL_PORT
select DMA_NONCOHERENT
select GENERIC_ISA_DMA
@@ -1411,13 +1411,12 @@
config PAGE_SIZE_16KB
bool "16kB"
- depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
+ depends on !CPU_R3000 && !CPU_TX39XX
help
Using 16kB page size will result in higher performance kernel at
the price of higher memory consumption. This option is available on
- all non-R3000 family processor. Not that at the time of this
- writing this option is still high experimental; there are also
- issues with compatibility of user applications.
+ all non-R3000 family processors. Note that you will need a suitable
+ Linux distribution to support this.
config PAGE_SIZE_64KB
bool "64kB"
@@ -1426,8 +1425,7 @@
Using 64kB page size will result in higher performance kernel at
the price of higher memory consumption. This option is available on
all non-R3000 family processor. Not that at the time of this
- writing this option is still high experimental; there are also
- issues with compatibility of user applications.
+ writing this option is still high experimental.
endchoice
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c
index da61de7..afe05ec 100644
--- a/arch/mips/au1000/common/irq.c
+++ b/arch/mips/au1000/common/irq.c
@@ -68,6 +68,7 @@
extern void set_debug_traps(void);
extern irq_cpustat_t irq_stat [NR_CPUS];
+extern void mips_timer_interrupt(struct pt_regs *regs);
static void setup_local_irq(unsigned int irq, int type, int int_req);
static unsigned int startup_irq(unsigned int irq);
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index f85f152..f74d66a 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -116,6 +116,7 @@
null:
ack_r4ktimer(0);
+ irq_exit();
}
#ifdef CONFIG_PM
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 92b28b6..0facfaf 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -272,8 +272,8 @@
text("/* Linux sigcontext offsets. */");
offset("#define SC_REGS ", struct sigcontext, sc_regs);
offset("#define SC_FPREGS ", struct sigcontext, sc_fpregs);
- offset("#define SC_MDHI ", struct sigcontext, sc_hi);
- offset("#define SC_MDLO ", struct sigcontext, sc_lo);
+ offset("#define SC_MDHI ", struct sigcontext, sc_mdhi);
+ offset("#define SC_MDLO ", struct sigcontext, sc_mdlo);
offset("#define SC_PC ", struct sigcontext, sc_pc);
offset("#define SC_FPC_CSR ", struct sigcontext, sc_fpc_csr);
linefeed;
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 58b3b14..bef3e2d 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -121,6 +121,7 @@
case CPU_24K:
case CPU_25KF:
case CPU_34K:
+ case CPU_74K:
case CPU_PR4450:
cpu_wait = r4k_wait;
printk(" available.\n");
@@ -432,6 +433,15 @@
MIPS_CPU_LLSC;
c->tlbsize = 64;
break;
+ case PRID_IMP_R14000:
+ c->cputype = CPU_R14000;
+ c->isa_level = MIPS_CPU_ISA_IV;
+ c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
+ MIPS_CPU_FPU | MIPS_CPU_32FPR |
+ MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
+ MIPS_CPU_LLSC;
+ c->tlbsize = 64;
+ break;
}
}
@@ -593,6 +603,9 @@
case PRID_IMP_34K:
c->cputype = CPU_34K;
break;
+ case PRID_IMP_74K:
+ c->cputype = CPU_74K;
+ break;
}
}
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index d101d2f..a9c6de1 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -101,7 +101,7 @@
EMT
1:
mfc0 v1, CP0_TCSTATUS
- /* We set IXMT above, XOR should cler it here */
+ /* We set IXMT above, XOR should clear it here */
xori v1, v1, TCSTATUS_IXMT
or v1, v0, v1
mtc0 v1, CP0_TCSTATUS
diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S
index 10f28fb..5fd7a8a 100644
--- a/arch/mips/kernel/gdb-low.S
+++ b/arch/mips/kernel/gdb-low.S
@@ -54,9 +54,11 @@
*/
mfc0 k0, CP0_CAUSE
andi k0, k0, 0x7c
- add k1, k1, k0
- PTR_L k0, saved_vectors(k1)
- jr k0
+#ifdef CONFIG_64BIT
+ dsll k0, k0, 1
+#endif
+ PTR_L k1, saved_vectors(k0)
+ jr k1
nop
1:
move k0, sp
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 84ab959..9def554 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -42,6 +42,7 @@
[CPU_R8000] = "R8000",
[CPU_R10000] = "R10000",
[CPU_R12000] = "R12000",
+ [CPU_R14000] = "R14000",
[CPU_R4300] = "R4300",
[CPU_R4650] = "R4650",
[CPU_R4700] = "R4700",
@@ -74,6 +75,7 @@
[CPU_24K] = "MIPS 24K",
[CPU_25KF] = "MIPS 25Kf",
[CPU_34K] = "MIPS 34K",
+ [CPU_74K] = "MIPS 74K",
[CPU_VR4111] = "NEC VR4111",
[CPU_VR4121] = "NEC VR4121",
[CPU_VR4122] = "NEC VR4122",
diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h
index 3ca7862..ce6cb915 100644
--- a/arch/mips/kernel/signal-common.h
+++ b/arch/mips/kernel/signal-common.h
@@ -31,7 +31,6 @@
save_gp_reg(31);
#undef save_gp_reg
-#ifdef CONFIG_32BIT
err |= __put_user(regs->hi, &sc->sc_mdhi);
err |= __put_user(regs->lo, &sc->sc_mdlo);
if (cpu_has_dsp) {
@@ -43,20 +42,6 @@
err |= __put_user(mflo3(), &sc->sc_lo3);
err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
}
-#endif
-#ifdef CONFIG_64BIT
- err |= __put_user(regs->hi, &sc->sc_hi[0]);
- err |= __put_user(regs->lo, &sc->sc_lo[0]);
- if (cpu_has_dsp) {
- err |= __put_user(mfhi1(), &sc->sc_hi[1]);
- err |= __put_user(mflo1(), &sc->sc_lo[1]);
- err |= __put_user(mfhi2(), &sc->sc_hi[2]);
- err |= __put_user(mflo2(), &sc->sc_lo[2]);
- err |= __put_user(mfhi3(), &sc->sc_hi[3]);
- err |= __put_user(mflo3(), &sc->sc_lo[3]);
- err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
- }
-#endif
err |= __put_user(!!used_math(), &sc->sc_used_math);
@@ -92,7 +77,6 @@
current_thread_info()->restart_block.fn = do_no_restart_syscall;
err |= __get_user(regs->cp0_epc, &sc->sc_pc);
-#ifdef CONFIG_32BIT
err |= __get_user(regs->hi, &sc->sc_mdhi);
err |= __get_user(regs->lo, &sc->sc_mdlo);
if (cpu_has_dsp) {
@@ -104,20 +88,6 @@
err |= __get_user(treg, &sc->sc_lo3); mtlo3(treg);
err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
}
-#endif
-#ifdef CONFIG_64BIT
- err |= __get_user(regs->hi, &sc->sc_hi[0]);
- err |= __get_user(regs->lo, &sc->sc_lo[0]);
- if (cpu_has_dsp) {
- err |= __get_user(treg, &sc->sc_hi[1]); mthi1(treg);
- err |= __get_user(treg, &sc->sc_lo[1]); mthi1(treg);
- err |= __get_user(treg, &sc->sc_hi[2]); mthi2(treg);
- err |= __get_user(treg, &sc->sc_lo[2]); mthi2(treg);
- err |= __get_user(treg, &sc->sc_hi[3]); mthi3(treg);
- err |= __get_user(treg, &sc->sc_lo[3]); mthi3(treg);
- err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
- }
-#endif
#define restore_gp_reg(i) do { \
err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 2aeaa2f..8f4fdd9 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -280,27 +280,6 @@
char __user *name;
switch(cmd) {
- case SETNAME: {
- char nodename[__NEW_UTS_LEN + 1];
-
- if (!capable(CAP_SYS_ADMIN))
- return -EPERM;
-
- name = (char __user *) arg1;
-
- len = strncpy_from_user(nodename, name, __NEW_UTS_LEN);
- if (len < 0)
- return -EFAULT;
-
- down_write(&uts_sem);
- strncpy(system_utsname.nodename, nodename, len);
- nodename[__NEW_UTS_LEN] = '\0';
- strlcpy(system_utsname.nodename, nodename,
- sizeof(system_utsname.nodename));
- up_write(&uts_sem);
- return 0;
- }
-
case MIPS_ATOMIC_SET:
printk(KERN_CRIT "How did I get here?\n");
return -EINVAL;
@@ -313,9 +292,6 @@
case FLUSH_CACHE:
__flush_cache_all();
return 0;
-
- case MIPS_RDNVRAM:
- return -EIO;
}
return -EINVAL;
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 4901f0a..35cb08d 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -902,6 +902,7 @@
{
switch (current_cpu_data.cputype) {
case CPU_24K:
+ case CPU_34K:
case CPU_5KC:
write_c0_ecc(0x80000000);
back_to_back_c0_hazard();
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index 14fa00e..b84d1f9 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -151,23 +151,13 @@
/* This is the MIPS specific mdebug section. */
.mdebug : { *(.mdebug) }
- /* These are needed for ELF backends which have not yet been
- converted to the new style linker. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- /* DWARF debug sections.
- Symbols in the .debug DWARF section are relative to the beginning of the
- section so we begin .debug at 0. It's not clear yet what needs to happen
- for the others. */
- .debug 0 : { *(.debug) }
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- .line 0 : { *(.line) }
+
+ STABS_DEBUG
+
+ DWARF_DEBUG
+
/* These must appear regardless of . */
.gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
.gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
- .comment : { *(.comment) }
.note : { *(.note) }
}
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 4182e11..6b35417 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -29,6 +29,27 @@
#include <asm/war.h>
#include <asm/cacheflush.h> /* for run_uncached() */
+
+/*
+ * Special Variant of smp_call_function for use by cache functions:
+ *
+ * o No return value
+ * o collapses to normal function call on UP kernels
+ * o collapses to normal function call on systems with a single shared
+ * primary cache.
+ */
+static inline void r4k_on_each_cpu(void (*func) (void *info), void *info,
+ int retry, int wait)
+{
+ preempt_disable();
+
+#if !defined(CONFIG_MIPS_MT_SMP) && !defined(CONFIG_MIPS_MT_SMTC)
+ smp_call_function(func, info, retry, wait);
+#endif
+ func(info);
+ preempt_enable();
+}
+
/*
* Must die.
*/
@@ -299,7 +320,7 @@
if (!cpu_has_dc_aliases)
return;
- on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1);
+ r4k_on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1);
}
static inline void local_r4k___flush_cache_all(void * args)
@@ -314,13 +335,14 @@
case CPU_R4400MC:
case CPU_R10000:
case CPU_R12000:
+ case CPU_R14000:
r4k_blast_scache();
}
}
static void r4k___flush_cache_all(void)
{
- on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1);
+ r4k_on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1);
}
static inline void local_r4k_flush_cache_range(void * args)
@@ -341,7 +363,7 @@
static void r4k_flush_cache_range(struct vm_area_struct *vma,
unsigned long start, unsigned long end)
{
- on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1);
+ r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1);
}
static inline void local_r4k_flush_cache_mm(void * args)
@@ -370,7 +392,7 @@
if (!cpu_has_dc_aliases)
return;
- on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1);
+ r4k_on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1);
}
struct flush_cache_page_args {
@@ -461,7 +483,7 @@
args.addr = addr;
args.pfn = pfn;
- on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1);
+ r4k_on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1);
}
static inline void local_r4k_flush_data_cache_page(void * addr)
@@ -471,7 +493,7 @@
static void r4k_flush_data_cache_page(unsigned long addr)
{
- on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1);
+ r4k_on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1);
}
struct flush_icache_range_args {
@@ -514,7 +536,7 @@
args.start = start;
args.end = end;
- on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1);
+ r4k_on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1);
instruction_hazard();
}
@@ -590,7 +612,7 @@
args.vma = vma;
args.page = page;
- on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1);
+ r4k_on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1);
}
@@ -689,7 +711,7 @@
static void r4k_flush_cache_sigtramp(unsigned long addr)
{
- on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1);
+ r4k_on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1);
}
static void r4k_flush_icache_all(void)
@@ -812,6 +834,7 @@
case CPU_R10000:
case CPU_R12000:
+ case CPU_R14000:
icache_size = 1 << (12 + ((config & R10K_CONF_IC) >> 29));
c->icache.linesz = 64;
c->icache.ways = 2;
@@ -965,9 +988,11 @@
c->dcache.flags |= MIPS_CACHE_PINDEX;
case CPU_R10000:
case CPU_R12000:
+ case CPU_R14000:
case CPU_SB1:
break;
case CPU_24K:
+ case CPU_34K:
if (!(read_c0_config7() & (1 << 16)))
default:
if (c->dcache.waysize > PAGE_SIZE)
@@ -1091,6 +1116,7 @@
case CPU_R10000:
case CPU_R12000:
+ case CPU_R14000:
scache_size = 0x80000 << ((config & R10K_CONF_SS) >> 16);
c->scache.linesz = 64 << ((config >> 13) & 1);
c->scache.ways = 2;
diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c
index e4390dc..b7c7492 100644
--- a/arch/mips/mm/pg-r4k.c
+++ b/arch/mips/mm/pg-r4k.c
@@ -357,6 +357,7 @@
case CPU_R10000:
case CPU_R12000:
+ case CPU_R14000:
pref_src_mode = Pref_LoadStreamed;
pref_dst_mode = Pref_StoreStreamed;
break;
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 053dbac..54507be 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -875,6 +875,7 @@
case CPU_R10000:
case CPU_R12000:
+ case CPU_R14000:
case CPU_4KC:
case CPU_SB1:
case CPU_SB1A:
@@ -906,6 +907,7 @@
case CPU_4KEC:
case CPU_24K:
case CPU_34K:
+ case CPU_74K:
i_ehb(p);
tlbw(p);
break;
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index f2b4862..91b799d 100644
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -80,6 +80,7 @@
case CPU_24K:
case CPU_25KF:
case CPU_34K:
+ case CPU_74K:
case CPU_SB1:
case CPU_SB1A:
lmodel = &op_model_mipsxx;
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 95d488c..e7ce923 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -205,6 +205,10 @@
case CPU_34K:
op_model_mipsxx.cpu_type = "mips/34K";
break;
+
+ case CPU_74K:
+ op_model_mipsxx.cpu_type = "mips/74K";
+ break;
#endif
case CPU_5KC:
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c
index df2343e..c896ce8 100644
--- a/arch/powerpc/platforms/powermac/low_i2c.c
+++ b/arch/powerpc/platforms/powermac/low_i2c.c
@@ -1157,6 +1157,7 @@
/* some quirks for platform function decoding */
enum {
pmac_i2c_quirk_invmask = 0x00000001u,
+ pmac_i2c_quirk_skip = 0x00000002u,
};
static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
@@ -1172,6 +1173,15 @@
/* XXX Study device-tree's & apple drivers are get the quirks
* right !
*/
+ /* Workaround: It seems that running the clockspreading
+ * properties on the eMac will cause lockups during boot.
+ * The machine seems to work fine without that. So for now,
+ * let's make sure i2c-hwclock doesn't match about "imic"
+ * clocks and we'll figure out if we really need to do
+ * something special about those later.
+ */
+ { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
+ { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
{ "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
{ "i2c-cpu-voltage", NULL, 0},
{ "temp-monitor", NULL, 0 },
@@ -1198,6 +1208,8 @@
if (p->compatible &&
!device_is_compatible(np, p->compatible))
continue;
+ if (p->quirks & pmac_i2c_quirk_skip)
+ break;
callback(np, p->quirks);
break;
}
diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c
index 11ce6aa..8e9d848 100644
--- a/block/cfq-iosched.c
+++ b/block/cfq-iosched.c
@@ -133,6 +133,7 @@
mempool_t *crq_pool;
int rq_in_driver;
+ int hw_tag;
/*
* schedule slice state info
@@ -500,10 +501,13 @@
/*
* if queue was preempted, just add to front to be fair. busy_rr
- * isn't sorted.
+ * isn't sorted, but insert at the back for fairness.
*/
if (preempted || list == &cfqd->busy_rr) {
- list_add(&cfqq->cfq_list, list);
+ if (preempted)
+ list = list->prev;
+
+ list_add_tail(&cfqq->cfq_list, list);
return;
}
@@ -664,6 +668,15 @@
struct cfq_data *cfqd = q->elevator->elevator_data;
cfqd->rq_in_driver++;
+
+ /*
+ * If the depth is larger 1, it really could be queueing. But lets
+ * make the mark a little higher - idling could still be good for
+ * low queueing, and a low queueing number could also just indicate
+ * a SCSI mid layer like behaviour where limit+1 is often seen.
+ */
+ if (!cfqd->hw_tag && cfqd->rq_in_driver > 4)
+ cfqd->hw_tag = 1;
}
static void cfq_deactivate_request(request_queue_t *q, struct request *rq)
@@ -879,6 +892,13 @@
cfqq = list_entry_cfqq(cfqd->cur_rr.next);
/*
+ * If no new queues are available, check if the busy list has some
+ * before falling back to idle io.
+ */
+ if (!cfqq && !list_empty(&cfqd->busy_rr))
+ cfqq = list_entry_cfqq(cfqd->busy_rr.next);
+
+ /*
* if we have idle queues and no rt or be queues had pending
* requests, either allow immediate service if the grace period
* has passed or arm the idle grace timer
@@ -1458,7 +1478,8 @@
* set ->slice_left to allow preemption for a new process
*/
cfqq->slice_left = 2 * cfqd->cfq_slice_idle;
- cfq_mark_cfqq_idle_window(cfqq);
+ if (!cfqd->hw_tag)
+ cfq_mark_cfqq_idle_window(cfqq);
cfq_mark_cfqq_prio_changed(cfqq);
cfq_init_prio_data(cfqq);
}
@@ -1649,7 +1670,7 @@
{
int enable_idle = cfq_cfqq_idle_window(cfqq);
- if (!cic->ioc->task || !cfqd->cfq_slice_idle)
+ if (!cic->ioc->task || !cfqd->cfq_slice_idle || cfqd->hw_tag)
enable_idle = 0;
else if (sample_valid(cic->ttime_samples)) {
if (cic->ttime_mean > cfqd->cfq_slice_idle)
@@ -1740,14 +1761,24 @@
cfqq->next_crq = cfq_choose_req(cfqd, cfqq->next_crq, crq);
+ cic = crq->io_context;
+
/*
* we never wait for an async request and we don't allow preemption
* of an async request. so just return early
*/
- if (!cfq_crq_is_sync(crq))
+ if (!cfq_crq_is_sync(crq)) {
+ /*
+ * sync process issued an async request, if it's waiting
+ * then expire it and kick rq handling.
+ */
+ if (cic == cfqd->active_cic &&
+ del_timer(&cfqd->idle_slice_timer)) {
+ cfq_slice_expired(cfqd, 0);
+ cfq_start_queueing(cfqd, cfqq);
+ }
return;
-
- cic = crq->io_context;
+ }
cfq_update_io_thinktime(cfqd, cic);
cfq_update_io_seektime(cfqd, cic, crq);
@@ -2165,10 +2196,9 @@
* race with a non-idle queue, reset timer
*/
end = cfqd->last_end_request + CFQ_IDLE_GRACE;
- if (!time_after_eq(jiffies, end)) {
- cfqd->idle_class_timer.expires = end;
- add_timer(&cfqd->idle_class_timer);
- } else
+ if (!time_after_eq(jiffies, end))
+ mod_timer(&cfqd->idle_class_timer, end);
+ else
cfq_schedule_dispatch(cfqd);
spin_unlock_irqrestore(cfqd->queue->queue_lock, flags);
diff --git a/drivers/base/power/suspend.c b/drivers/base/power/suspend.c
index 662209d..2a769cc 100644
--- a/drivers/base/power/suspend.c
+++ b/drivers/base/power/suspend.c
@@ -8,7 +8,6 @@
*
*/
-#include <linux/vt_kern.h>
#include <linux/device.h>
#include <linux/kallsyms.h>
#include <linux/pm.h>
@@ -66,6 +65,7 @@
return error;
}
+
/**
* device_suspend - Save state and stop all devices in system.
* @state: Power state to put each device in.
@@ -85,9 +85,6 @@
{
int error = 0;
- if (!is_console_suspend_safe())
- return -EINVAL;
-
down(&dpm_sem);
down(&dpm_list_sem);
while (!list_empty(&dpm_active) && error == 0) {
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c
index b36eef0..02a7dd7 100644
--- a/drivers/char/ipmi/ipmi_si_intf.c
+++ b/drivers/char/ipmi/ipmi_si_intf.c
@@ -1184,20 +1184,20 @@
static void port_cleanup(struct smi_info *info)
{
unsigned int addr = info->io.addr_data;
- int mapsize;
+ int idx;
if (addr) {
- mapsize = ((info->io_size * info->io.regspacing)
- - (info->io.regspacing - info->io.regsize));
-
- release_region (addr, mapsize);
+ for (idx = 0; idx < info->io_size; idx++) {
+ release_region(addr + idx * info->io.regspacing,
+ info->io.regsize);
+ }
}
}
static int port_setup(struct smi_info *info)
{
unsigned int addr = info->io.addr_data;
- int mapsize;
+ int idx;
if (!addr)
return -ENODEV;
@@ -1225,16 +1225,22 @@
return -EINVAL;
}
- /* Calculate the total amount of memory to claim. This is an
- * unusual looking calculation, but it avoids claiming any
- * more memory than it has to. It will claim everything
- * between the first address to the end of the last full
- * register. */
- mapsize = ((info->io_size * info->io.regspacing)
- - (info->io.regspacing - info->io.regsize));
-
- if (request_region(addr, mapsize, DEVICE_NAME) == NULL)
- return -EIO;
+ /* Some BIOSes reserve disjoint I/O regions in their ACPI
+ * tables. This causes problems when trying to register the
+ * entire I/O region. Therefore we must register each I/O
+ * port separately.
+ */
+ for (idx = 0; idx < info->io_size; idx++) {
+ if (request_region(addr + idx * info->io.regspacing,
+ info->io.regsize, DEVICE_NAME) == NULL) {
+ /* Undo allocations */
+ while (idx--) {
+ release_region(addr + idx * info->io.regspacing,
+ info->io.regsize);
+ }
+ return -EIO;
+ }
+ }
return 0;
}
diff --git a/drivers/char/tpm/tpm_bios.c b/drivers/char/tpm/tpm_bios.c
index e45f0d3..a611972 100644
--- a/drivers/char/tpm/tpm_bios.c
+++ b/drivers/char/tpm/tpm_bios.c
@@ -105,6 +105,12 @@
"Non-Host Info"
};
+struct tcpa_pc_event {
+ u32 event_id;
+ u32 event_size;
+ u8 event_data[0];
+};
+
enum tcpa_pc_event_ids {
SMBIOS = 1,
BIS_CERT,
@@ -114,14 +120,15 @@
NVRAM,
OPTION_ROM_EXEC,
OPTION_ROM_CONFIG,
- OPTION_ROM_MICROCODE,
+ OPTION_ROM_MICROCODE = 10,
S_CRTM_VERSION,
S_CRTM_CONTENTS,
POST_CONTENTS,
+ HOST_TABLE_OF_DEVICES,
};
static const char* tcpa_pc_event_id_strings[] = {
- ""
+ "",
"SMBIOS",
"BIS Certificate",
"POST BIOS ",
@@ -130,11 +137,12 @@
"NVRAM",
"Option ROM",
"Option ROM config",
- "Option ROM microcode",
+ "",
+ "Option ROM microcode ",
"S-CRTM Version",
- "S-CRTM Contents",
- "S-CRTM POST Contents",
- "POST Contents",
+ "S-CRTM Contents ",
+ "POST Contents ",
+ "Table of Devices",
};
/* returns pointer to start of pos. entry of tcg log */
@@ -206,7 +214,7 @@
const char *name = "";
char data[40] = "";
int i, n_len = 0, d_len = 0;
- u32 event_id;
+ struct tcpa_pc_event *pc_event;
switch(event->event_type) {
case PREBOOT:
@@ -235,31 +243,32 @@
}
break;
case EVENT_TAG:
- event_id = be32_to_cpu(*((u32 *)event_entry));
+ pc_event = (struct tcpa_pc_event *)event_entry;
/* ToDo Row data -> Base64 */
- switch (event_id) {
+ switch (pc_event->event_id) {
case SMBIOS:
case BIS_CERT:
case CMOS:
case NVRAM:
case OPTION_ROM_EXEC:
case OPTION_ROM_CONFIG:
- case OPTION_ROM_MICROCODE:
case S_CRTM_VERSION:
- case S_CRTM_CONTENTS:
- case POST_CONTENTS:
- name = tcpa_pc_event_id_strings[event_id];
+ name = tcpa_pc_event_id_strings[pc_event->event_id];
n_len = strlen(name);
break;
+ /* hash data */
case POST_BIOS_ROM:
case ESCD:
- name = tcpa_pc_event_id_strings[event_id];
+ case OPTION_ROM_MICROCODE:
+ case S_CRTM_CONTENTS:
+ case POST_CONTENTS:
+ name = tcpa_pc_event_id_strings[pc_event->event_id];
n_len = strlen(name);
for (i = 0; i < 20; i++)
- d_len += sprintf(data, "%02x",
- event_entry[8 + i]);
+ d_len += sprintf(&data[2*i], "%02x",
+ pc_event->event_data[i]);
break;
default:
break;
@@ -275,53 +284,13 @@
static int tpm_binary_bios_measurements_show(struct seq_file *m, void *v)
{
+ struct tcpa_event *event = v;
+ char *data = v;
+ int i;
- char *eventname;
- char data[4];
- u32 help;
- int i, len;
- struct tcpa_event *event = (struct tcpa_event *) v;
- unsigned char *event_entry =
- (unsigned char *) (v + sizeof(struct tcpa_event));
-
- eventname = kmalloc(MAX_TEXT_EVENT, GFP_KERNEL);
- if (!eventname) {
- printk(KERN_ERR "%s: ERROR - No Memory for event name\n ",
- __func__);
- return -ENOMEM;
- }
-
- /* 1st: PCR used is in little-endian format (4 bytes) */
- help = le32_to_cpu(event->pcr_index);
- memcpy(data, &help, 4);
- for (i = 0; i < 4; i++)
+ for (i = 0; i < sizeof(struct tcpa_event) + event->event_size; i++)
seq_putc(m, data[i]);
- /* 2nd: SHA1 (20 bytes) */
- for (i = 0; i < 20; i++)
- seq_putc(m, event->pcr_value[i]);
-
- /* 3rd: event type identifier (4 bytes) */
- help = le32_to_cpu(event->event_type);
- memcpy(data, &help, 4);
- for (i = 0; i < 4; i++)
- seq_putc(m, data[i]);
-
- len = 0;
-
- len += get_event_name(eventname, event, event_entry);
-
- /* 4th: filename <= 255 + \'0' delimiter */
- if (len > TCG_EVENT_NAME_LEN_MAX)
- len = TCG_EVENT_NAME_LEN_MAX;
-
- for (i = 0; i < len; i++)
- seq_putc(m, eventname[i]);
-
- /* 5th: delimiter */
- seq_putc(m, '\0');
-
- kfree(eventname);
return 0;
}
diff --git a/drivers/char/vt.c b/drivers/char/vt.c
index acc5d47..6c94879 100644
--- a/drivers/char/vt.c
+++ b/drivers/char/vt.c
@@ -3238,14 +3238,6 @@
}
}
-int is_console_suspend_safe(void)
-{
- /* It is unsafe to suspend devices while X has control of the
- * hardware. Make sure we are running on a kernel-controlled console.
- */
- return vc_cons[fg_console].d->vc_mode == KD_TEXT;
-}
-
/*
* Visible symbols for modules
*/
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index 43b96e2..27c9eb9 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -345,17 +345,17 @@
static u8
sgiioc4_INB(unsigned long port)
{
- u8 reg = (u8) inb(port);
+ u8 reg = (u8) readb((void __iomem *) port);
if ((port & 0xFFF) == 0x11C) { /* Status register of IOC4 */
if (reg & 0x51) { /* Not busy...check for interrupt */
unsigned long other_ir = port - 0x110;
- unsigned int intr_reg = (u32) inl(other_ir);
+ unsigned int intr_reg = (u32) readl((void __iomem *) other_ir);
/* Clear the Interrupt, Error bits on the IOC4 */
if (intr_reg & 0x03) {
- outl(0x03, other_ir);
- intr_reg = (u32) inl(other_ir);
+ writel(0x03, (void __iomem *) other_ir);
+ intr_reg = (u32) readl((void __iomem *) other_ir);
}
}
}
@@ -606,6 +606,12 @@
hwif->ide_dma_host_off = &sgiioc4_ide_dma_host_off;
hwif->ide_dma_lostirq = &sgiioc4_ide_dma_lostirq;
hwif->ide_dma_timeout = &__ide_dma_timeout;
+
+ /*
+ * The IOC4 uses MMIO rather than Port IO.
+ * It also needs special workarounds for INB.
+ */
+ default_hwif_mmiops(hwif);
hwif->INB = &sgiioc4_INB;
}
@@ -743,6 +749,6 @@
module_init(ioc4_ide_init);
module_exit(ioc4_ide_exit);
-MODULE_AUTHOR("Aniket Malatpure - Silicon Graphics Inc. (SGI)");
+MODULE_AUTHOR("Aniket Malatpure/Jeremy Higdon");
MODULE_DESCRIPTION("IDE PCI driver module for SGI IOC4 Base-IO Card");
MODULE_LICENSE("GPL");
diff --git a/drivers/md/md.c b/drivers/md/md.c
index ec80291..f19b874 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -167,6 +167,15 @@
}
EXPORT_SYMBOL_GPL(md_new_event);
+/* Alternate version that can be called from interrupts
+ * when calling sysfs_notify isn't needed.
+ */
+void md_new_event_inintr(mddev_t *mddev)
+{
+ atomic_inc(&md_event_count);
+ wake_up(&md_event_waiters);
+}
+
/*
* Enables to iterate over all existing md arrays
* all_mddevs_lock protects this list.
@@ -4149,7 +4158,7 @@
set_bit(MD_RECOVERY_INTR, &mddev->recovery);
set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
md_wakeup_thread(mddev->thread);
- md_new_event(mddev);
+ md_new_event_inintr(mddev);
}
/* seq_file implementation /proc/mdstat */
diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c
index 3d04b2d..789450b 100644
--- a/drivers/video/au1100fb.c
+++ b/drivers/video/au1100fb.c
@@ -214,10 +214,13 @@
*/
int au1100fb_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, unsigned transp, struct fb_info *fbi)
{
- struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
- u32 *palette = fbdev->regs->lcd_pallettebase;
+ struct au1100fb_device *fbdev;
+ u32 *palette;
u32 value;
+ fbdev = to_au1100fb_device(fbi);
+ palette = fbdev->regs->lcd_pallettebase;
+
if (regno > (AU1100_LCD_NBR_PALETTE_ENTRIES - 1))
return -EINVAL;
@@ -316,9 +319,11 @@
*/
int au1100fb_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *fbi)
{
- struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
+ struct au1100fb_device *fbdev;
int dy;
+ fbdev = to_au1100fb_device(fbi);
+
print_dbg("fb_pan_display %p %p", var, fbi);
if (!var || !fbdev) {
@@ -382,10 +387,12 @@
*/
int au1100fb_fb_mmap(struct fb_info *fbi, struct vm_area_struct *vma)
{
- struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
+ struct au1100fb_device *fbdev;
unsigned int len;
unsigned long start=0, off;
+ fbdev = to_au1100fb_device(fbi);
+
if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) {
return -EINVAL;
}
@@ -467,7 +474,7 @@
if (!request_mem_region(au1100fb_fix.mmio_start, au1100fb_fix.mmio_len,
DRIVER_NAME)) {
- print_err("fail to lock memory region at 0x%08x",
+ print_err("fail to lock memory region at 0x%08lx",
au1100fb_fix.mmio_start);
return -EBUSY;
}
@@ -595,13 +602,13 @@
return 0;
}
-int au1100fb_drv_suspend(struct device *dev, u32 state, u32 level)
+int au1100fb_drv_suspend(struct device *dev, pm_message_t state)
{
/* TODO */
return 0;
}
-int au1100fb_drv_resume(struct device *dev, u32 level)
+int au1100fb_drv_resume(struct device *dev)
{
/* TODO */
return 0;
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c
index ca020719..953eb8c 100644
--- a/drivers/video/console/fbcon.c
+++ b/drivers/video/console/fbcon.c
@@ -2631,7 +2631,7 @@
scr_memcpyw((u16 *) q, (u16 *) p,
vc->vc_size_row);
}
- softback_in = p;
+ softback_in = softback_curr = p;
update_region(vc, vc->vc_origin,
logo_lines * vc->vc_cols);
}
diff --git a/drivers/video/maxinefb.c b/drivers/video/maxinefb.c
index 743e7ad..f85421b 100644
--- a/drivers/video/maxinefb.c
+++ b/drivers/video/maxinefb.c
@@ -55,7 +55,7 @@
};
static struct fb_fix_screeninfo maxinefb_fix = {
- .id = "Maxine onboard graphics 1024x768x8",
+ .id = "Maxine",
.smem_len = (1024*768),
.type = FB_TYPE_PACKED_PIXELS,
.visual = FB_VISUAL_PSEUDOCOLOR,
@@ -107,8 +107,6 @@
static struct fb_ops maxinefb_ops = {
.owner = THIS_MODULE,
- .fb_get_fix = gen_get_fix,
- .fb_get_var = gen_get_var,
.fb_setcolreg = maxinefb_setcolreg,
.fb_fillrect = cfb_fillrect,
.fb_copyarea = cfb_copyarea,
diff --git a/fs/ext3/resize.c b/fs/ext3/resize.c
index 8aac533..34b39e9 100644
--- a/fs/ext3/resize.c
+++ b/fs/ext3/resize.c
@@ -767,7 +767,6 @@
if (input->group != sbi->s_groups_count) {
ext3_warning(sb, __FUNCTION__,
"multiple resizers run on filesystem!");
- unlock_super(sb);
err = -EBUSY;
goto exit_journal;
}
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index 95b3abf..7c9568d 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -127,6 +127,12 @@
}
#endif
+#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
+#define cpu_is_xscale() 0
+#else
+#define cpu_is_xscale() 1
+#endif
+
#define set_cr(x) \
__asm__ __volatile__( \
"mcr p15, 0, %0, c1, c0, 0 @ set CR" \
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 818b9a9..dff2a0a 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -51,6 +51,7 @@
#define PRID_IMP_R4300 0x0b00
#define PRID_IMP_VR41XX 0x0c00
#define PRID_IMP_R12000 0x0e00
+#define PRID_IMP_R14000 0x0f00
#define PRID_IMP_R8000 0x1000
#define PRID_IMP_PR4450 0x1200
#define PRID_IMP_R4600 0x2000
@@ -87,6 +88,7 @@
#define PRID_IMP_24K 0x9300
#define PRID_IMP_34K 0x9500
#define PRID_IMP_24KE 0x9600
+#define PRID_IMP_74K 0x9700
/*
* These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
@@ -196,7 +198,9 @@
#define CPU_34K 60
#define CPU_PR4450 61
#define CPU_SB1A 62
-#define CPU_LAST 62
+#define CPU_74K 63
+#define CPU_R14000 64
+#define CPU_LAST 64
/*
* ISA Level encodings
diff --git a/include/asm-mips/futex.h b/include/asm-mips/futex.h
index a554089..12d118f 100644
--- a/include/asm-mips/futex.h
+++ b/include/asm-mips/futex.h
@@ -7,6 +7,7 @@
#include <linux/futex.h>
#include <asm/errno.h>
#include <asm/uaccess.h>
+#include <asm/war.h>
#ifdef CONFIG_SMP
#define __FUTEX_SMP_SYNC " sync \n"
@@ -16,30 +17,58 @@
#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
{ \
- __asm__ __volatile__( \
- " .set push \n" \
- " .set noat \n" \
- " .set mips3 \n" \
- "1: ll %1, (%3) # __futex_atomic_op1 \n" \
- " .set mips0 \n" \
- " " insn " \n" \
- " .set mips3 \n" \
- "2: sc $1, (%3) \n" \
- " beqzl $1, 1b \n" \
- __FUTEX_SMP_SYNC \
- "3: \n" \
- " .set pop \n" \
- " .set mips0 \n" \
- " .section .fixup,\"ax\" \n" \
- "4: li %0, %5 \n" \
- " j 2b \n" \
- " .previous \n" \
- " .section __ex_table,\"a\" \n" \
- " "__UA_ADDR "\t1b, 4b \n" \
- " "__UA_ADDR "\t2b, 4b \n" \
- " .previous \n" \
- : "=r" (ret), "=r" (oldval) \
- : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT)); \
+ if (cpu_has_llsc && R10000_LLSC_WAR) { \
+ __asm__ __volatile__( \
+ " .set push \n" \
+ " .set noat \n" \
+ " .set mips3 \n" \
+ "1: ll %1, (%3) # __futex_atomic_op \n" \
+ " .set mips0 \n" \
+ " " insn " \n" \
+ " .set mips3 \n" \
+ "2: sc $1, (%3) \n" \
+ " beqzl $1, 1b \n" \
+ __FUTEX_SMP_SYNC \
+ "3: \n" \
+ " .set pop \n" \
+ " .set mips0 \n" \
+ " .section .fixup,\"ax\" \n" \
+ "4: li %0, %5 \n" \
+ " j 2b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\" \n" \
+ " "__UA_ADDR "\t1b, 4b \n" \
+ " "__UA_ADDR "\t2b, 4b \n" \
+ " .previous \n" \
+ : "=r" (ret), "=r" (oldval) \
+ : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT)); \
+ } else if (cpu_has_llsc) { \
+ __asm__ __volatile__( \
+ " .set push \n" \
+ " .set noat \n" \
+ " .set mips3 \n" \
+ "1: ll %1, (%3) # __futex_atomic_op \n" \
+ " .set mips0 \n" \
+ " " insn " \n" \
+ " .set mips3 \n" \
+ "2: sc $1, (%3) \n" \
+ " beqz $1, 1b \n" \
+ __FUTEX_SMP_SYNC \
+ "3: \n" \
+ " .set pop \n" \
+ " .set mips0 \n" \
+ " .section .fixup,\"ax\" \n" \
+ "4: li %0, %5 \n" \
+ " j 2b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\" \n" \
+ " "__UA_ADDR "\t1b, 4b \n" \
+ " "__UA_ADDR "\t2b, 4b \n" \
+ " .previous \n" \
+ : "=r" (ret), "=r" (oldval) \
+ : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT)); \
+ } else \
+ ret = -ENOSYS; \
}
static inline int
@@ -102,7 +131,69 @@
static inline int
futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
{
- return -ENOSYS;
+ int retval;
+
+ if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
+ return -EFAULT;
+
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+ "# futex_atomic_cmpxchg_inatomic \n"
+ " .set push \n"
+ " .set noat \n"
+ " .set mips3 \n"
+ "1: ll %0, %2 \n"
+ " bne %0, %z3, 3f \n"
+ " .set mips0 \n"
+ " move $1, %z4 \n"
+ " .set mips3 \n"
+ "2: sc $1, %1 \n"
+ " beqzl $1, 1b \n"
+ __FUTEX_SMP_SYNC
+ "3: \n"
+ " .set pop \n"
+ " .section .fixup,\"ax\" \n"
+ "4: li %0, %5 \n"
+ " j 3b \n"
+ " .previous \n"
+ " .section __ex_table,\"a\" \n"
+ " "__UA_ADDR "\t1b, 4b \n"
+ " "__UA_ADDR "\t2b, 4b \n"
+ " .previous \n"
+ : "=&r" (retval), "=R" (*uaddr)
+ : "R" (*uaddr), "Jr" (oldval), "Jr" (newval), "i" (-EFAULT)
+ : "memory");
+ } else if (cpu_has_llsc) {
+ __asm__ __volatile__(
+ "# futex_atomic_cmpxchg_inatomic \n"
+ " .set push \n"
+ " .set noat \n"
+ " .set mips3 \n"
+ "1: ll %0, %2 \n"
+ " bne %0, %z3, 3f \n"
+ " .set mips0 \n"
+ " move $1, %z4 \n"
+ " .set mips3 \n"
+ "2: sc $1, %1 \n"
+ " beqz $1, 1b \n"
+ __FUTEX_SMP_SYNC
+ "3: \n"
+ " .set pop \n"
+ " .section .fixup,\"ax\" \n"
+ "4: li %0, %5 \n"
+ " j 3b \n"
+ " .previous \n"
+ " .section __ex_table,\"a\" \n"
+ " "__UA_ADDR "\t1b, 4b \n"
+ " "__UA_ADDR "\t2b, 4b \n"
+ " .previous \n"
+ : "=&r" (retval), "=R" (*uaddr)
+ : "R" (*uaddr), "Jr" (oldval), "Jr" (newval), "i" (-EFAULT)
+ : "memory");
+ } else
+ return -ENOSYS;
+
+ return retval;
}
#endif
diff --git a/include/asm-mips/inst.h b/include/asm-mips/inst.h
index e0745f4..1ed8d0f 100644
--- a/include/asm-mips/inst.h
+++ b/include/asm-mips/inst.h
@@ -6,6 +6,7 @@
* for more details.
*
* Copyright (C) 1996, 2000 by Ralf Baechle
+ * Copyright (C) 2006 by Thiemo Seufer
*/
#ifndef _ASM_INST_H
#define _ASM_INST_H
@@ -21,14 +22,14 @@
cop0_op, cop1_op, cop2_op, cop1x_op,
beql_op, bnel_op, blezl_op, bgtzl_op,
daddi_op, daddiu_op, ldl_op, ldr_op,
- major_1c_op, jalx_op, major_1e_op, major_1f_op,
+ spec2_op, jalx_op, mdmx_op, spec3_op,
lb_op, lh_op, lwl_op, lw_op,
lbu_op, lhu_op, lwr_op, lwu_op,
sb_op, sh_op, swl_op, sw_op,
sdl_op, sdr_op, swr_op, cache_op,
ll_op, lwc1_op, lwc2_op, pref_op,
lld_op, ldc1_op, ldc2_op, ld_op,
- sc_op, swc1_op, swc2_op, rdhwr_op,
+ sc_op, swc1_op, swc2_op, major_3b_op,
scd_op, sdc1_op, sdc2_op, sd_op
};
@@ -37,7 +38,7 @@
*/
enum spec_op {
sll_op, movc_op, srl_op, sra_op,
- sllv_op, srlv_op, srav_op, spec1_unused_op, /* Opcode 0x07 is unused */
+ sllv_op, pmon_op, srlv_op, srav_op,
jr_op, jalr_op, movz_op, movn_op,
syscall_op, break_op, spim_op, sync_op,
mfhi_op, mthi_op, mflo_op, mtlo_op,
@@ -55,6 +56,28 @@
};
/*
+ * func field of spec2 opcode.
+ */
+enum spec2_op {
+ madd_op, maddu_op, mul_op, spec2_3_unused_op,
+ msub_op, msubu_op, /* more unused ops */
+ clz_op = 0x20, clo_op,
+ dclz_op = 0x24, dclo_op,
+ sdbpp_op = 0x3f
+};
+
+/*
+ * func field of spec3 opcode.
+ */
+enum spec3_op {
+ ext_op, dextm_op, dextu_op, dext_op,
+ ins_op, dinsm_op, dinsu_op, dins_op,
+ bshfl_op = 0x20,
+ dbshfl_op = 0x24,
+ rdhwr_op = 0x3f
+};
+
+/*
* rt field of bcond opcodes.
*/
enum rt_op {
@@ -151,8 +174,8 @@
* func field for mad opcodes (MIPS IV).
*/
enum mad_func {
- madd_op = 0x08, msub_op = 0x0a,
- nmadd_op = 0x0c, nmsub_op = 0x0e
+ madd_fp_op = 0x08, msub_fp_op = 0x0a,
+ nmadd_fp_op = 0x0c, nmsub_fp_op = 0x0e
};
/*
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index a2ef579..5af7517 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -291,7 +291,7 @@
#define ST0_DL (_ULCAST_(1) << 24)
/*
- * Enable the MIPS DSP ASE
+ * Enable the MIPS MDMX and DSP ASEs
*/
#define ST0_MX 0x01000000
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index 69cebbd..f80fe75 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -90,10 +90,11 @@
#define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
#define pmd_page_kernel(pmd) pmd_val(pmd)
-#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
-#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
-
#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
+
+#define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
+#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
+
static inline void set_pte(pte_t *ptep, pte_t pte)
{
ptep->pte_high = pte.pte_high;
@@ -101,27 +102,35 @@
ptep->pte_low = pte.pte_low;
//printk("pte_high %x pte_low %x\n", ptep->pte_high, ptep->pte_low);
- if (pte_val(pte) & _PAGE_GLOBAL) {
+ if (pte.pte_low & _PAGE_GLOBAL) {
pte_t *buddy = ptep_buddy(ptep);
/*
* Make sure the buddy is global too (if it's !none,
* it better already be global)
*/
- if (pte_none(*buddy))
- buddy->pte_low |= _PAGE_GLOBAL;
+ if (pte_none(*buddy)) {
+ buddy->pte_low |= _PAGE_GLOBAL;
+ buddy->pte_high |= _PAGE_GLOBAL;
+ }
}
}
#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
+ pte_t null = __pte(0);
+
/* Preserve global status for the pair */
- if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
- set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
- else
- set_pte_at(mm, addr, ptep, __pte(0));
+ if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL)
+ null.pte_low = null.pte_high = _PAGE_GLOBAL;
+
+ set_pte_at(mm, addr, ptep, null);
}
#else
+
+#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
+#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
+
/*
* Certain architectures need to do special things when pte's
* within a page table are directly modified. Thus, the following
@@ -182,75 +191,76 @@
*/
static inline int pte_user(pte_t pte) { BUG(); return 0; }
#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
-static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; }
-static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; }
-static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; }
-static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; }
-static inline int pte_file(pte_t pte) { return (pte).pte_low & _PAGE_FILE; }
+static inline int pte_read(pte_t pte) { return pte.pte_low & _PAGE_READ; }
+static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
+static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
+static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
+static inline int pte_file(pte_t pte) { return pte.pte_low & _PAGE_FILE; }
+
static inline pte_t pte_wrprotect(pte_t pte)
{
- (pte).pte_low &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
- (pte).pte_high &= ~_PAGE_SILENT_WRITE;
+ pte.pte_low &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
+ pte.pte_high &= ~_PAGE_SILENT_WRITE;
return pte;
}
static inline pte_t pte_rdprotect(pte_t pte)
{
- (pte).pte_low &= ~(_PAGE_READ | _PAGE_SILENT_READ);
- (pte).pte_high &= ~_PAGE_SILENT_READ;
+ pte.pte_low &= ~(_PAGE_READ | _PAGE_SILENT_READ);
+ pte.pte_high &= ~_PAGE_SILENT_READ;
return pte;
}
static inline pte_t pte_mkclean(pte_t pte)
{
- (pte).pte_low &= ~(_PAGE_MODIFIED|_PAGE_SILENT_WRITE);
- (pte).pte_high &= ~_PAGE_SILENT_WRITE;
+ pte.pte_low &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
+ pte.pte_high &= ~_PAGE_SILENT_WRITE;
return pte;
}
static inline pte_t pte_mkold(pte_t pte)
{
- (pte).pte_low &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
- (pte).pte_high &= ~_PAGE_SILENT_READ;
+ pte.pte_low &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
+ pte.pte_high &= ~_PAGE_SILENT_READ;
return pte;
}
static inline pte_t pte_mkwrite(pte_t pte)
{
- (pte).pte_low |= _PAGE_WRITE;
- if ((pte).pte_low & _PAGE_MODIFIED) {
- (pte).pte_low |= _PAGE_SILENT_WRITE;
- (pte).pte_high |= _PAGE_SILENT_WRITE;
+ pte.pte_low |= _PAGE_WRITE;
+ if (pte.pte_low & _PAGE_MODIFIED) {
+ pte.pte_low |= _PAGE_SILENT_WRITE;
+ pte.pte_high |= _PAGE_SILENT_WRITE;
}
return pte;
}
static inline pte_t pte_mkread(pte_t pte)
{
- (pte).pte_low |= _PAGE_READ;
- if ((pte).pte_low & _PAGE_ACCESSED) {
- (pte).pte_low |= _PAGE_SILENT_READ;
- (pte).pte_high |= _PAGE_SILENT_READ;
+ pte.pte_low |= _PAGE_READ;
+ if (pte.pte_low & _PAGE_ACCESSED) {
+ pte.pte_low |= _PAGE_SILENT_READ;
+ pte.pte_high |= _PAGE_SILENT_READ;
}
return pte;
}
static inline pte_t pte_mkdirty(pte_t pte)
{
- (pte).pte_low |= _PAGE_MODIFIED;
- if ((pte).pte_low & _PAGE_WRITE) {
- (pte).pte_low |= _PAGE_SILENT_WRITE;
- (pte).pte_high |= _PAGE_SILENT_WRITE;
+ pte.pte_low |= _PAGE_MODIFIED;
+ if (pte.pte_low & _PAGE_WRITE) {
+ pte.pte_low |= _PAGE_SILENT_WRITE;
+ pte.pte_high |= _PAGE_SILENT_WRITE;
}
return pte;
}
static inline pte_t pte_mkyoung(pte_t pte)
{
- (pte).pte_low |= _PAGE_ACCESSED;
- if ((pte).pte_low & _PAGE_READ)
- (pte).pte_low |= _PAGE_SILENT_READ;
- (pte).pte_high |= _PAGE_SILENT_READ;
+ pte.pte_low |= _PAGE_ACCESSED;
+ if (pte.pte_low & _PAGE_READ)
+ pte.pte_low |= _PAGE_SILENT_READ;
+ pte.pte_high |= _PAGE_SILENT_READ;
return pte;
}
#else
diff --git a/include/asm-mips/sigcontext.h b/include/asm-mips/sigcontext.h
index 8edabb0..cefa657 100644
--- a/include/asm-mips/sigcontext.h
+++ b/include/asm-mips/sigcontext.h
@@ -55,8 +55,14 @@
struct sigcontext {
unsigned long sc_regs[32];
unsigned long sc_fpregs[32];
- unsigned long sc_hi[4];
- unsigned long sc_lo[4];
+ unsigned long sc_mdhi;
+ unsigned long sc_hi1;
+ unsigned long sc_hi2;
+ unsigned long sc_hi3;
+ unsigned long sc_mdlo;
+ unsigned long sc_lo1;
+ unsigned long sc_lo2;
+ unsigned long sc_lo3;
unsigned long sc_pc;
unsigned int sc_fpc_csr;
unsigned int sc_used_math;
diff --git a/include/linux/vt_kern.h b/include/linux/vt_kern.h
index 530ae3f..fab5aed 100644
--- a/include/linux/vt_kern.h
+++ b/include/linux/vt_kern.h
@@ -73,11 +73,6 @@
int vt_waitactive(int vt);
void change_console(struct vc_data *new_vc);
void reset_vc(struct vc_data *vc);
-#ifdef CONFIG_VT
-int is_console_suspend_safe(void);
-#else
-static inline int is_console_suspend_safe(void) { return 1; }
-#endif
/*
* vc_screen.c shares this temporary buffer with the console write code so that
diff --git a/include/net/compat.h b/include/net/compat.h
index 8662b8f..e65cbed 100644
--- a/include/net/compat.h
+++ b/include/net/compat.h
@@ -3,6 +3,8 @@
#include <linux/config.h>
+struct sock;
+
#if defined(CONFIG_COMPAT)
#include <linux/compat.h>
@@ -23,7 +25,6 @@
compat_int_t cmsg_type;
};
-struct sock;
extern int compat_sock_get_timestamp(struct sock *, struct timeval __user *);
#else /* defined(CONFIG_COMPAT) */
diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c
index b7f0388..01fa2ae 100644
--- a/kernel/hrtimer.c
+++ b/kernel/hrtimer.c
@@ -456,6 +456,7 @@
return ret;
}
+EXPORT_SYMBOL_GPL(hrtimer_start);
/**
* hrtimer_try_to_cancel - try to deactivate a timer
@@ -484,6 +485,7 @@
return ret;
}
+EXPORT_SYMBOL_GPL(hrtimer_try_to_cancel);
/**
* hrtimer_cancel - cancel a timer and wait for the handler to finish.
@@ -504,6 +506,7 @@
cpu_relax();
}
}
+EXPORT_SYMBOL_GPL(hrtimer_cancel);
/**
* hrtimer_get_remaining - get remaining time for the timer
@@ -522,6 +525,7 @@
return rem;
}
+EXPORT_SYMBOL_GPL(hrtimer_get_remaining);
#ifdef CONFIG_NO_IDLE_HZ
/**
@@ -580,6 +584,7 @@
timer->base = &bases[clock_id];
timer->node.rb_parent = HRTIMER_INACTIVE;
}
+EXPORT_SYMBOL_GPL(hrtimer_init);
/**
* hrtimer_get_res - get the timer resolution for a clock
@@ -599,6 +604,7 @@
return 0;
}
+EXPORT_SYMBOL_GPL(hrtimer_get_res);
/*
* Expire the per base hrtimer-queue:
diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
index 1ae2b2c..70df5c0 100644
--- a/mm/memory_hotplug.c
+++ b/mm/memory_hotplug.c
@@ -91,8 +91,8 @@
if (start_pfn < zone->zone_start_pfn)
zone->zone_start_pfn = start_pfn;
- if (end_pfn > old_zone_end_pfn)
- zone->spanned_pages = end_pfn - zone->zone_start_pfn;
+ zone->spanned_pages = max(old_zone_end_pfn, end_pfn) -
+ zone->zone_start_pfn;
zone_span_writeunlock(zone);
}
@@ -106,8 +106,8 @@
if (start_pfn < pgdat->node_start_pfn)
pgdat->node_start_pfn = start_pfn;
- if (end_pfn > old_pgdat_end_pfn)
- pgdat->node_spanned_pages = end_pfn - pgdat->node_start_pfn;
+ pgdat->node_spanned_pages = max(old_pgdat_end_pfn, end_pfn) -
+ pgdat->node_start_pfn;
}
int online_pages(unsigned long pfn, unsigned long nr_pages)
diff --git a/mm/slab.c b/mm/slab.c
index d31a06b..f1b644e 100644
--- a/mm/slab.c
+++ b/mm/slab.c
@@ -207,11 +207,6 @@
#define BUFCTL_ACTIVE (((kmem_bufctl_t)(~0U))-2)
#define SLAB_LIMIT (((kmem_bufctl_t)(~0U))-3)
-/* Max number of objs-per-slab for caches which use off-slab slabs.
- * Needed to avoid a possible looping condition in cache_grow().
- */
-static unsigned long offslab_limit;
-
/*
* struct slab
*
@@ -1356,12 +1351,6 @@
NULL, NULL);
}
- /* Inc off-slab bufctl limit until the ceiling is hit. */
- if (!(OFF_SLAB(sizes->cs_cachep))) {
- offslab_limit = sizes->cs_size - sizeof(struct slab);
- offslab_limit /= sizeof(kmem_bufctl_t);
- }
-
sizes->cs_dmacachep = kmem_cache_create(names->name_dma,
sizes->cs_size,
ARCH_KMALLOC_MINALIGN,
@@ -1780,6 +1769,7 @@
static size_t calculate_slab_order(struct kmem_cache *cachep,
size_t size, size_t align, unsigned long flags)
{
+ unsigned long offslab_limit;
size_t left_over = 0;
int gfporder;
@@ -1791,9 +1781,18 @@
if (!num)
continue;
- /* More than offslab_limit objects will cause problems */
- if ((flags & CFLGS_OFF_SLAB) && num > offslab_limit)
- break;
+ if (flags & CFLGS_OFF_SLAB) {
+ /*
+ * Max number of objs-per-slab for caches which
+ * use off-slab slabs. Needed to avoid a possible
+ * looping condition in cache_grow().
+ */
+ offslab_limit = size - sizeof(struct slab);
+ offslab_limit /= sizeof(kmem_bufctl_t);
+
+ if (num > offslab_limit)
+ break;
+ }
/* Found something acceptable - save it away */
cachep->num = num;