| commit | 4a268e0879c4044523757b6ac94b56fc7955a116 | [log] [tgz] |
|---|---|---|
| author | Sahitya Tummala <stummala@codeaurora.org> | Mon May 02 18:09:18 2011 +0530 |
| committer | Chris Ball <cjb@laptop.org> | Wed Oct 26 15:43:37 2011 -0400 |
| tree | 3397cdc9c1d95b215e6094e1629fc3a4e4c1ae30 | |
| parent | 4a92fe80becbbee650cfad8457ad0e5cd97ed974 [diff] |
mmc: msm_sdcc: Use MCI_INT_MASK0 for PIO interrupts Not all targets have IRQ1 line routed from the SD controller to the processor. So we cannot rely on IRQ1 for PIO interrupts. This patch moves all PIO interrupts to IRQ0 and enables the PIO mode. Signed-off-by: Murali Palnati <palnatim@codeaurora.org> Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Chris Ball <cjb@laptop.org>