Blackfin EMAC driver: Add phy abstraction layer supporting in bfin_emac driver
- add MDIO functions and register mdio bus
- add phy abstraction layer (PAL) functions and use PAL API
- test on STAMP537 board
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Acked-by: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
diff --git a/drivers/net/bfin_mac.h b/drivers/net/bfin_mac.h
index b827246..3a107ad 100644
--- a/drivers/net/bfin_mac.h
+++ b/drivers/net/bfin_mac.h
@@ -31,32 +31,6 @@
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-/*
- * PHY REGISTER NAMES
- */
-#define PHYREG_MODECTL 0x0000
-#define PHYREG_MODESTAT 0x0001
-#define PHYREG_PHYID1 0x0002
-#define PHYREG_PHYID2 0x0003
-#define PHYREG_ANAR 0x0004
-#define PHYREG_ANLPAR 0x0005
-#define PHYREG_ANER 0x0006
-#define PHYREG_NSR 0x0010
-#define PHYREG_LBREMR 0x0011
-#define PHYREG_REC 0x0012
-#define PHYREG_10CFG 0x0013
-#define PHYREG_PHY1_1 0x0014
-#define PHYREG_PHY1_2 0x0015
-#define PHYREG_PHY2 0x0016
-#define PHYREG_TW_1 0x0017
-#define PHYREG_TW_2 0x0018
-#define PHYREG_TEST 0x0019
-
-#define PHY_RESET 0x8000
-#define PHY_ANEG_EN 0x1000
-#define PHY_DUPLEX 0x0100
-#define PHY_SPD_SET 0x2000
-
#define BFIN_MAC_CSUM_OFFLOAD
struct dma_descriptor {
@@ -104,27 +78,18 @@
* can find out semi-useless statistics of how well the card is
* performing
*/
- int version;
+ struct net_device_stats stats;
- int FlowEnabled; /* record if data flow is active */
- int EtherIntIVG; /* IVG for the ethernet interrupt */
- int RXIVG; /* IVG for the RX completion */
- int TXIVG; /* IVG for the TX completion */
- int PhyAddr; /* PHY address */
- int OpMode; /* set these bits n the OPMODE regs */
- int Port10; /* set port speed to 10 Mbit/s */
- int GenChksums; /* IP checksums to be calculated */
- int NoRcveLnth; /* dont insert recv length at start of buffer */
- int StripPads; /* remove trailing pad bytes */
- int FullDuplex; /* set full duplex mode */
- int Negotiate; /* enable auto negotiation */
- int Loopback; /* loopback at the PHY */
- int Cache; /* Buffers may be cached */
- int FlowControl; /* flow control active */
- int CLKIN; /* clock in value in MHZ */
- unsigned short IntMask; /* interrupt mask */
unsigned char Mac[6]; /* MAC address of the board */
spinlock_t lock;
+
+ /* MII and PHY stuffs */
+ int old_link; /* used by bf537_adjust_link */
+ int old_speed;
+ int old_duplex;
+
+ struct phy_device *phydev;
+ struct mii_bus mii_bus;
};
extern void get_bf537_ether_addr(char *addr);