| commit | 4b3cbc82a04485f6400cb5b227798daaa8512a23 | [log] [tgz] |
|---|---|---|
| author | Tang Yuantian <yuantian.tang@freescale.com> | Mon Jan 13 16:16:35 2014 +0800 |
| committer | Scott Wood <scottwood@freescale.com> | Fri Jan 17 19:01:27 2014 -0600 |
| tree | b6817c7007c109b4686abd746504615bb2475005 | |
| parent | 9841c79c890cf7ef9ffa2c86c9924113c9a88244 [diff] |
clk: corenet: Adds the clock binding Adds the clock bindings for Freescale PowerPC CoreNet platforms Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> [scottwood@freescale.com: fixed clock-frequency in example] Signed-off-by: Scott Wood <scottwood@freescale.com>