tree cbb76688d63da313ef6c84ca4e87ddafe20d3ace
parent efc5120b8259243fa945d0028450c0a7a5a4b9ef
author Mark Rutland <mark.rutland@arm.com> 1435754161 +0100
committer Kevin Hilman <khilman@linaro.org> 1436391895 -0700

arm: dts: vexpress: describe all PMUs in TC2 dts

The dts for the CoreTile Express A15x2 A7x3 (TC2) only describes the
PMUs of the Cortex-A15 CPUs, and not the Cortex-A7 CPUs.

Now that we have a mechanism for describing disparate PMUs and their
interrupts in device tree, this patch makes use of these to describe the
PMUs for all CPUs in the system. For consistency, the existing A15 PMU
interrupt-affinity property is reflowed across two lines.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>