drm/msm/sde: add inline rotation support to drm plane
Add inline rotation support to drm plane. Inline rotation
reduces ddr usage by redirecting traffic between rotator
output and source pipe to system cache.
CRs-Fixed: 2009714
Change-Id: I9bb39b700d648ee936a1b61eca4bf5cd7b1b8d38
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_ctl.h b/drivers/gpu/drm/msm/sde/sde_hw_ctl.h
index 4d1170e..a4e3bfe 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_ctl.h
+++ b/drivers/gpu/drm/msm/sde/sde_hw_ctl.h
@@ -28,6 +28,20 @@
SDE_CTL_MODE_SEL_CMD
};
+/**
+ * sde_ctl_rot_op_mode - inline rotation mode
+ * SDE_CTL_ROT_OP_MODE_OFFLINE: offline rotation
+ * SDE_CTL_ROT_OP_MODE_RESERVED: reserved
+ * SDE_CTL_ROT_OP_MODE_INLINE_SYNC: inline rotation synchronous mode
+ * SDE_CTL_ROT_OP_MODE_INLINE_ASYNC: inline rotation asynchronous mode
+ */
+enum sde_ctl_rot_op_mode {
+ SDE_CTL_ROT_OP_MODE_OFFLINE,
+ SDE_CTL_ROT_OP_MODE_RESERVED,
+ SDE_CTL_ROT_OP_MODE_INLINE_SYNC,
+ SDE_CTL_ROT_OP_MODE_INLINE_ASYNC,
+};
+
struct sde_hw_ctl;
/**
* struct sde_hw_stage_cfg - blending stage cfg
@@ -57,6 +71,14 @@
};
/**
+ * struct sde_ctl_sbuf_cfg - control for stream buffer configuration
+ * @rot_op_mode: rotator operation mode
+ */
+struct sde_ctl_sbuf_cfg {
+ enum sde_ctl_rot_op_mode rot_op_mode;
+};
+
+/**
* struct sde_hw_ctl_ops - Interface to the wb Hw driver functions
* Assumption is these functions will be called after clocks are enabled
*/
@@ -69,6 +91,13 @@
void (*trigger_start)(struct sde_hw_ctl *ctx);
/**
+ * kickoff rotator operation for Sw controlled interfaces
+ * DSI cmd mode and WB interface are SW controlled
+ * @ctx : ctl path ctx pointer
+ */
+ void (*trigger_rot_start)(struct sde_hw_ctl *ctx);
+
+ /**
* Clear the value of the cached pending_flush_mask
* No effect on hardware
* @ctx : ctl path ctx pointer
@@ -140,6 +169,10 @@
u32 *flushbits,
enum sde_wb blk);
+ int (*get_bitmask_rot)(struct sde_hw_ctl *ctx,
+ u32 *flushbits,
+ enum sde_rot blk);
+
/**
* Set all blend stages to disabled
* @ctx : ctl path ctx pointer
@@ -154,6 +187,9 @@
*/
void (*setup_blendstage)(struct sde_hw_ctl *ctx,
enum sde_lm lm, struct sde_hw_stage_cfg *cfg, u32 index);
+
+ void (*setup_sbuf_cfg)(struct sde_hw_ctl *ctx,
+ struct sde_ctl_sbuf_cfg *cfg);
};
/**