tree c09663d2e291b26352eae5dec98982c9c4eefe71
parent 90e8d31c53890064962f1154405e1034be7ec9a1
author Eugeni Dodonov <eugeni.dodonov@intel.com> 1333035156 -0300
committer Daniel Vetter <daniel.vetter@ffwll.ch> 1333987444 +0200

drm/i915: add WRPLL clocks

The WR PLL can drive the DDI ports at fixed frequencies for HDMI, DVI, DP
and FDI.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>