sh: Fixup various PAGE_SIZE == 4096 assumptions.
There were a number of places that made evil PAGE_SIZE == 4k
assumptions that ended up breaking when trying to play with
8k and 64k page sizes, this fixes those up.
The most significant change is the way we load THREAD_SIZE,
previously this was done via:
mov #(THREAD_SIZE >> 8), reg
shll8 reg
to avoid a memory access and allow the immediate load. With
a 64k PAGE_SIZE, we're out of range for the immediate load
size without resorting to special instructions available in
later ISAs (movi20s and so on). The "workaround" for this is
to bump up the shift to 10 and insert a shll2, which gives a
bit more flexibility while still being much cheaper than a
memory access.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index fa62524..f87504a 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -47,8 +47,8 @@
#define PGDIR_MASK (~(PGDIR_SIZE-1))
/* Entries per level */
-#define PTRS_PER_PTE (1 << PTE_BITS)
-#define PTRS_PER_PGD (1 << PGDIR_BITS)
+#define PTRS_PER_PTE (PAGE_SIZE / 4)
+#define PTRS_PER_PGD (PAGE_SIZE / 4)
#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
#define FIRST_USER_ADDRESS 0
@@ -57,7 +57,7 @@
/*
* First 1MB map is used by fixed purpose.
- * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c)
+ * Currently only 4-entry (16kB) is used (see arch/sh/mm/cache.c)
*/
#define VMALLOC_START (P3SEG+0x00100000)
#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)