| commit | 5130216265f6f924a4ba8214787241be96d93467 | [log] [tgz] |
|---|---|---|
| author | Barry Song <Baohua.Song@csr.com> | Tue Jun 19 15:00:05 2012 +0800 |
| committer | Barry Song <Barry.Song@csr.com> | Mon Jul 02 10:59:07 2012 +0800 |
| tree | 8e05e98068f0380376735a8575af9bb42ab27502 | |
| parent | ca24a145573124732152daff105ba68cc9a2b545 [diff] |
PINCTRL: SiRF: add GPIO and GPIO irq support in CSR SiRFprimaII In SiRFprimaII, Each GPIO pin can be configured as input or output independently. If a GPIO is configured as input, it can also be enabled as an interrupt source (either edge or level triggered). These pins must be either MUXed as GPIO or other function pads. Signed-off-by: Yuping Luo <yuping.luo@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>