tree 6935ff6a0c599d8b145ab99cae02b3db1b0ad97e
parent d2011dc8d41b20dc0ec0bf741c61fe500dc8d0bc
author Imre Deak <imre.deak@intel.com> 1404207377 +0300
committer Daniel Vetter <daniel.vetter@ffwll.ch> 1404725616 +0200

drm/i915: gmch: factor out intel_set_memory_cxsr

This functionality will be also needed by an upcoming patch, so factor
it out. As a bonus this also makes things a bit more uniform across
platforms. Note that this also changes the register read-modify-write
to a simple write during disabling. This is what we do during enabling
anyway and according to the spec all the relevant bits are reserved-MBZ
or reserved with a 0 default value.

v2:
- unchanged
v3:
- fix missing cxsr disabling on pineview (Deepak)

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>