| commit | 527fad1bc519df8eedd397482febb51526e5d987 | [log] [tgz] |
|---|---|---|
| author | Laxman Dewangan <ldewangan@nvidia.com> | Tue Feb 12 20:47:59 2013 +0530 |
| committer | Stephen Warren <swarren@nvidia.com> | Wed Feb 13 11:17:03 2013 -0700 |
| tree | 003feaff3289f9d27292d2332710e951f142ea25 | |
| parent | 8364f5d96509e206f02a74bbdc2d4e3742cdefe4 [diff] |
clk: tegra: initialise parent of uart clocks Initialise the parent of UARTs to PLLP and disabling clock by default. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>