| commit | 53f676977dddaa6784dab7b058cfe8895e3c8772 | [log] [tgz] |
|---|---|---|
| author | Jayachandran C <jchandra@broadcom.com> | Wed Jan 07 16:58:28 2015 +0530 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Wed Apr 01 17:21:49 2015 +0200 |
| tree | 8f49568829fe71a39db9f0ee81555d22644ec3da | |
| parent | a3613be442aaf435d7d3b224c81cea0b0f702d6a [diff] |
MIPS: MSI: Update MSI handling for XLP The per-cpu interrupt ACK using EIRR has to be done just once after all the bits in the status register are processed. PIC ack has to be done once in case of MSI, and for every interrupt in case of MSI-X Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8887/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>