tree 83772480cc3a92f2d6c56aeeb567ea71ad9e9c7d
parent 4dcafb4215af49dca2effa311386290e6d951877
author Suzuki K. Poulose <Suzuki.Poulose@arm.com> 1516098203 +0000
committer Kyle Yan <kyan@codeaurora.org> 1518475070 -0800

arm64: Add work around for Arm Cortex-A55 Erratum 1024718

Some variants of the Arm Cortex-55 cores (r0p0, r0p1, r1p0) suffer
from an erratum 1024718, which causes incorrect updates when DBM/AP
bits in a page table entry is modified without a break-before-make
sequence. The work around is to disable the hardware DBM feature
on the affected cores. The hardware Access Flag management features
is not affected.

The hardware DBM feature is a non-conflicting capability, i.e, the
kernel could handle cores using the feature and those without having
the features running at the same time. So this work around is detected
at early boot time, rather than delaying it until the CPUs are brought
up into the kernel with MMU turned on. This also avoids other complexities
with late CPUs turning online, with or without the hardware DBM features.

Change-Id: Idcd77182befaba2b459ccf4f7424c8c4557089d5
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Patch-mainline: linux-arm-kernel @ 01/16/2018, 10:23
[kyan@codeaurora.org: resolve trivial merge conflicts]
Signed-off-by: Kyle Yan <kyan@codeaurora.org>