mmc: sdhci-msm: Move common definitions to header file
This is needed by Inline Crypto Engine (ICE) driver.
Change-Id: Ibfe151098f4f0395b5b9dbdc463723b8e0265487
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 872ee6b..a53cc8d 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -31,7 +31,6 @@
#include <linux/delay.h>
#include <linux/scatterlist.h>
#include <linux/slab.h>
-#include <linux/mmc/mmc.h>
#include <linux/mmc/slot-gpio.h>
#include <linux/dma-mapping.h>
#include <linux/iopoll.h>
@@ -41,7 +40,7 @@
#include <linux/pm_runtime.h>
#include <trace/events/mmc.h>
-#include "sdhci-pltfm.h"
+#include "sdhci-msm.h"
#define CORE_POWER 0x0
#define CORE_SW_RST (1 << 7)
@@ -166,6 +165,8 @@
#define CORE_DDR_CONFIG 0x1B8
#define DDR_CONFIG_POR_VAL 0x80040853
+#define MSM_MMC_DEFAULT_CPU_DMA_LATENCY 200 /* usecs */
+
/* 512 descriptors */
#define SDHCI_MSM_MAX_SEGMENTS (1 << 9)
#define SDHCI_MSM_MMC_CLK_GATE_DELAY 200 /* msecs */
@@ -201,136 +202,6 @@
/* root can write, others read */
module_param(disable_slots, int, S_IRUGO|S_IWUSR);
-/* This structure keeps information per regulator */
-struct sdhci_msm_reg_data {
- /* voltage regulator handle */
- struct regulator *reg;
- /* regulator name */
- const char *name;
- /* voltage level to be set */
- u32 low_vol_level;
- u32 high_vol_level;
- /* Load values for low power and high power mode */
- u32 lpm_uA;
- u32 hpm_uA;
-
- /* is this regulator enabled? */
- bool is_enabled;
- /* is this regulator needs to be always on? */
- bool is_always_on;
- /* is low power mode setting required for this regulator? */
- bool lpm_sup;
- bool set_voltage_sup;
-};
-
-#define MSM_MMC_DEFAULT_CPU_DMA_LATENCY 200 /* usecs */
-/*
- * This structure keeps information for all the
- * regulators required for a SDCC slot.
- */
-struct sdhci_msm_slot_reg_data {
- /* keeps VDD/VCC regulator info */
- struct sdhci_msm_reg_data *vdd_data;
- /* keeps VDD IO regulator info */
- struct sdhci_msm_reg_data *vdd_io_data;
-};
-
-struct sdhci_msm_gpio {
- u32 no;
- const char *name;
- bool is_enabled;
-};
-
-struct sdhci_msm_gpio_data {
- struct sdhci_msm_gpio *gpio;
- u8 size;
-};
-
-struct sdhci_msm_pin_data {
- /*
- * = 1 if controller pins are using gpios
- * = 0 if controller has dedicated MSM pads
- */
- u8 is_gpio;
- struct sdhci_msm_gpio_data *gpio_data;
-};
-
-struct sdhci_pinctrl_data {
- struct pinctrl *pctrl;
- struct pinctrl_state *pins_active;
- struct pinctrl_state *pins_sleep;
-};
-
-struct sdhci_msm_bus_voting_data {
- struct msm_bus_scale_pdata *bus_pdata;
- unsigned int *bw_vecs;
- unsigned int bw_vecs_size;
-};
-
-struct sdhci_msm_pltfm_data {
- /* Supported UHS-I Modes */
- u32 caps;
-
- /* More capabilities */
- u32 caps2;
-
- unsigned long mmc_bus_width;
- struct sdhci_msm_slot_reg_data *vreg_data;
- bool nonremovable;
- bool nonhotplug;
- bool largeaddressbus;
- bool pin_cfg_sts;
- struct sdhci_msm_pin_data *pin_data;
- struct sdhci_pinctrl_data *pctrl_data;
- u32 cpu_dma_latency_us;
- int status_gpio; /* card detection GPIO that is configured as IRQ */
- struct sdhci_msm_bus_voting_data *voting_data;
- u32 *sup_clk_table;
- unsigned char sup_clk_cnt;
- enum pm_qos_req_type cpu_affinity_type;
-};
-
-struct sdhci_msm_bus_vote {
- uint32_t client_handle;
- uint32_t curr_vote;
- int min_bw_vote;
- int max_bw_vote;
- bool is_max_bw_needed;
- struct delayed_work vote_work;
- struct device_attribute max_bus_bw;
-};
-
-struct sdhci_msm_host {
- struct platform_device *pdev;
- void __iomem *core_mem; /* MSM SDCC mapped address */
- int pwr_irq; /* power irq */
- struct clk *clk; /* main SD/MMC bus clock */
- struct clk *pclk; /* SDHC peripheral bus clock */
- struct clk *bus_clk; /* SDHC bus voter clock */
- struct clk *ff_clk; /* CDC calibration fixed feedback clock */
- struct clk *sleep_clk; /* CDC calibration sleep clock */
- atomic_t clks_on; /* Set if clocks are enabled */
- struct sdhci_msm_pltfm_data *pdata;
- struct mmc_host *mmc;
- struct sdhci_pltfm_data sdhci_msm_pdata;
- u32 curr_pwr_state;
- u32 curr_io_level;
- struct completion pwr_irq_completion;
- struct sdhci_msm_bus_vote msm_bus_vote;
- struct device_attribute polling;
- u32 clk_rate; /* Keeps track of current clock rate that is set */
- bool tuning_done;
- bool calibration_done;
- u8 saved_tuning_phase;
- bool en_auto_cmd21;
- struct device_attribute auto_cmd21_attr;
- atomic_t controller_clock;
- bool use_cdclp533;
- bool use_updated_dll_reset;
- bool use_14lpp_dll;
- u32 caps_0;
-};
-
enum vdd_io_level {
/* set vdd_io_data->low_vol_level */
VDD_IO_LOW,