| commit | 56a12a509296c87d6f149be86c6694d312b21d35 | [log] [tgz] |
|---|---|---|
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | Fri Jan 25 21:44:45 2013 +0200 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Sat Jan 26 17:32:03 2013 +0100 |
| tree | d50eb6be8db694c3ef35884b7d1c28991d83a6d4 | |
| parent | 67cfc2032b516e44b972abe30209234343e1f145 [diff] |
drm/i915: Include display_mmio_offset in sequencer index/data registers SR01 needs to be touched to disable VGA on non-UMS setups too. So the sequencer registers need to include the appripriate offset on VLV. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>