tree b0d943dd164abc2a58c3da43342615cf62609be4
parent cd1f08c7f64ce2093877ecafd21ee784c8ca2389
author Peter Ujfalusi <peter.ujfalusi@ti.com> 1331206456 +0200
committer Liam Girdwood <lrg@ti.com> 1331559263 +0000

ASoC: omap-mcbsp: Correct clock muxing for CLKR/FSR signals

Remove the no longer valid check for McBSP1 regarding to signal mux
selection (on OMAP4 McBSP4 has 6 pin setup).
Only clear the srgr2, pcr0 register configuration if the requested clock
configuration will actually going to touch it. In this way we can avoid
issues if the CLKR/FSR mux has been configured after the clock selection.

We are going to check for the valid McBSP port in the
omap_mcbsp_6pin_src_mux() function based on the validity of the mux_signal
callback (which is only valid for ports having 6 pin setup).

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@ti.com>