Pull bugzilla-1641 into release branch
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 975f029..17770b4 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -952,14 +952,10 @@
Format: <1-256>
maxcpus= [SMP] Maximum number of processors that an SMP kernel
- should make use of.
- Using "nosmp" or "maxcpus=0" will disable SMP
- entirely (the MPS table probe still happens, though).
- A command-line option of "maxcpus=<NUM>", where <NUM>
- is an integer greater than 0, limits the maximum number
- of CPUs activated in SMP mode to <NUM>.
- Using "maxcpus=1" on an SMP kernel is the trivial
- case of an SMP kernel with only one CPU.
+ should make use of. maxcpus=n : n >= 0 limits the
+ kernel to using 'n' processors. n=0 is a special case,
+ it is equivalent to "nosmp", which also disables
+ the IO APIC.
max_addr=[KMG] [KNL,BOOT,ia64] All physical memory greater than or
equal to this physical address is ignored.
@@ -1184,7 +1180,8 @@
nosep [BUGS=X86-32] Disables x86 SYSENTER/SYSEXIT support.
- nosmp [SMP] Tells an SMP kernel to act as a UP kernel.
+ nosmp [SMP] Tells an SMP kernel to act as a UP kernel,
+ and disable the IO APIC. legacy for "maxcpus=0".
nosoftlockup [KNL] Disable the soft-lockup detector.
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c
index 4b8a8da4..e2f4a1c 100644
--- a/arch/i386/kernel/io_apic.c
+++ b/arch/i386/kernel/io_apic.c
@@ -754,14 +754,6 @@
static int pirqs_enabled;
int skip_ioapic_setup;
-static int __init ioapic_setup(char *str)
-{
- skip_ioapic_setup = 1;
- return 1;
-}
-
-__setup("noapic", ioapic_setup);
-
static int __init ioapic_pirq_setup(char *str)
{
int i, max;
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index f57f8b9..966fa10 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -397,14 +397,12 @@
int skip_ioapic_setup;
int ioapic_force;
-/* dummy parsing: see setup.c */
-
-static int __init disable_ioapic_setup(char *str)
+static int __init parse_noapic(char *str)
{
- skip_ioapic_setup = 1;
+ disable_ioapic_setup();
return 0;
}
-early_param("noapic", disable_ioapic_setup);
+early_param("noapic", parse_noapic);
/* Actually the next is obsolete, but keep it for paranoid reasons -AK */
static int __init disable_timer_pin_setup(char *arg)
diff --git a/include/asm-i386/io_apic.h b/include/asm-i386/io_apic.h
index 3407640..dbe734d 100644
--- a/include/asm-i386/io_apic.h
+++ b/include/asm-i386/io_apic.h
@@ -150,7 +150,6 @@
#else /* !CONFIG_X86_IO_APIC */
#define io_apic_assign_pci_irqs 0
-static inline void disable_ioapic_setup(void) { }
#endif
#endif
diff --git a/include/asm-x86_64/io_apic.h b/include/asm-x86_64/io_apic.h
index 969d225..d9f2e54 100644
--- a/include/asm-x86_64/io_apic.h
+++ b/include/asm-x86_64/io_apic.h
@@ -109,6 +109,12 @@
/* 1 if "noapic" boot option passed */
extern int skip_ioapic_setup;
+static inline void disable_ioapic_setup(void)
+{
+ skip_ioapic_setup = 1;
+}
+
+
/*
* If we use the IO-APIC for IRQ routing, disable automatic
* assignment of PCI IRQ's.
diff --git a/init/main.c b/init/main.c
index d3bcb3b..cc0653e 100644
--- a/init/main.c
+++ b/init/main.c
@@ -146,9 +146,14 @@
* greater than 0, limits the maximum number of CPUs activated in
* SMP mode to <NUM>.
*/
+#ifndef CONFIG_X86_IO_APIC
+static inline void disable_ioapic_setup(void) {};
+#endif
+
static int __init nosmp(char *str)
{
max_cpus = 0;
+ disable_ioapic_setup();
return 0;
}
@@ -157,10 +162,13 @@
static int __init maxcpus(char *str)
{
get_option(&str, &max_cpus);
- return 1;
+ if (max_cpus == 0)
+ disable_ioapic_setup();
+
+ return 0;
}
-__setup("maxcpus=", maxcpus);
+early_param("maxcpus=", maxcpus);
#else
#define max_cpus NR_CPUS
#endif