drm/i915: Fix coding style for RPS
Introduced:
commit b8a5ff8d7c676a04e0da5ec16bb068dd39459042
Author: Jeff McGee <jeff.mcgee@intel.com>
Date: Tue Feb 4 11:37:01 2014 -0600
drm/i915: Update rps interrupt limits
Cc: Jeff McGee <jeff.mcgee@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index 0c741f4..e9ffefb 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -356,12 +356,12 @@
valleyview_set_rps(dev, val);
else
gen6_set_rps(dev, val);
- }
- else if (!IS_VALLEYVIEW(dev))
- /* We still need gen6_set_rps to process the new max_delay
- and update the interrupt limits even though frequency
- request is unchanged. */
+ } else if (!IS_VALLEYVIEW(dev)) {
+ /* We still need gen6_set_rps to process the new max_delay and
+ * update the interrupt limits even though frequency request is
+ * unchanged. */
gen6_set_rps(dev, dev_priv->rps.cur_delay);
+ }
mutex_unlock(&dev_priv->rps.hw_lock);
@@ -430,12 +430,12 @@
valleyview_set_rps(dev, val);
else
gen6_set_rps(dev, val);
- }
- else if (!IS_VALLEYVIEW(dev))
- /* We still need gen6_set_rps to process the new min_delay
- and update the interrupt limits even though frequency
- request is unchanged. */
+ } else if (!IS_VALLEYVIEW(dev)) {
+ /* We still need gen6_set_rps to process the new min_delay and
+ * update the interrupt limits even though frequency request is
+ * unchanged. */
gen6_set_rps(dev, dev_priv->rps.cur_delay);
+ }
mutex_unlock(&dev_priv->rps.hw_lock);