drm/msm/sde: parse csc type dtsi entry to select valid csc
msm8998 supports 10bit csc while msm8996 supports csc only.
This patch adds the dtsi entry to select the correct csc
type while parsing hardware catalog to configure the
valid csc hardware block.
Change-Id: I376f1e485a5de4a95d03e395e06d10b043036cb0
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
diff --git a/Documentation/devicetree/bindings/display/msm/sde.txt b/Documentation/devicetree/bindings/display/msm/sde.txt
index 086212f..498ae1d 100644
--- a/Documentation/devicetree/bindings/display/msm/sde.txt
+++ b/Documentation/devicetree/bindings/display/msm/sde.txt
@@ -109,6 +109,9 @@
It supports "qssedv3" and "qseedv2" entries for qseed
type. By default "qseedv2" is used if this optional property
is not defined.
+- qcom,sde-csc-type: A string entry indicates csc support on sspp and wb.
+ It supports "csc" and "csc-10bit" entries for csc
+ type.
- qcom,sde-highest-bank-bit: A u32 property to indicate GPU/Camera/Video highest memory
bank bit used for tile format buffers.
- qcom,sde-panic-per-pipe: Boolean property to indicate if panic signal
@@ -349,6 +352,7 @@
qcom,sde-sspp-scale-size = <0x100>;
qcom,sde-mixer-blendstages = <0x8>;
qcom,sde-qseed-type = "qseedv2";
+ qcom,sde-csc-type = "csc-10bit";
qcom,sde-highest-bank-bit = <15>;
qcom,sde-has-mixer-gc;
qcom,sde-sspp-max-rects = <1 1 1 1
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_catalog.c b/drivers/gpu/drm/msm/sde/sde_hw_catalog.c
index 3db12e4..6394f46 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_catalog.c
+++ b/drivers/gpu/drm/msm/sde/sde_hw_catalog.c
@@ -101,6 +101,7 @@
WB_LINEWIDTH,
BANK_BIT,
QSEED_TYPE,
+ CSC_TYPE,
PANIC_PER_PIPE,
CDP,
SRC_SPLIT,
@@ -262,6 +263,7 @@
{WB_LINEWIDTH, "qcom,sde-wb-linewidth", false, PROP_TYPE_U32},
{BANK_BIT, "qcom,sde-highest-bank-bit", false, PROP_TYPE_U32},
{QSEED_TYPE, "qcom,sde-qseed-type", false, PROP_TYPE_STRING},
+ {CSC_TYPE, "qcom,sde-csc-type", false, PROP_TYPE_STRING},
{PANIC_PER_PIPE, "qcom,sde-panic-per-pipe", false, PROP_TYPE_BOOL},
{CDP, "qcom,sde-has-cdp", false, PROP_TYPE_BOOL},
{SRC_SPLIT, "qcom,sde-has-src-split", false, PROP_TYPE_BOOL},
@@ -663,8 +665,15 @@
}
sblk->csc_blk.id = SDE_SSPP_CSC;
- set_bit(SDE_SSPP_CSC, &sspp->features);
- sblk->csc_blk.base = PROP_VALUE_ACCESS(prop_value, VIG_CSC_OFF, 0);
+ if (sde_cfg->csc_type == SDE_SSPP_CSC) {
+ set_bit(SDE_SSPP_CSC, &sspp->features);
+ sblk->csc_blk.base = PROP_VALUE_ACCESS(prop_value,
+ VIG_CSC_OFF, 0);
+ } else if (sde_cfg->csc_type == SDE_SSPP_CSC_10BIT) {
+ set_bit(SDE_SSPP_CSC_10BIT, &sspp->features);
+ sblk->csc_blk.base = PROP_VALUE_ACCESS(prop_value,
+ VIG_CSC_OFF, 0);
+ }
sblk->hsic_blk.id = SDE_SSPP_HSIC;
if (prop_exists[VIG_HSIC_PROP]) {
@@ -1811,6 +1820,12 @@
else if (!rc && !strcmp(type, "qseedv2"))
cfg->qseed_type = SDE_SSPP_SCALER_QSEED2;
+ rc = of_property_read_string(np, sde_prop[CSC_TYPE].prop_name, &type);
+ if (!rc && !strcmp(type, "csc"))
+ cfg->csc_type = SDE_SSPP_CSC;
+ else if (!rc && !strcmp(type, "csc-10bit"))
+ cfg->csc_type = SDE_SSPP_CSC_10BIT;
+
cfg->has_src_split = PROP_VALUE_ACCESS(prop_value, SRC_SPLIT, 0);
end:
kfree(prop_value);
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_catalog.h b/drivers/gpu/drm/msm/sde/sde_hw_catalog.h
index de60680..7282f75 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_catalog.h
+++ b/drivers/gpu/drm/msm/sde/sde_hw_catalog.h
@@ -609,6 +609,7 @@
* @max_wb_linewidth max writeback line width support.
* @highest_bank_bit highest memory bit setting for tile buffers.
* @qseed_type qseed2 or qseed3 support.
+ * @csc_type csc or csc_10bit support.
* @has_src_split source split feature status
* @has_cdp Client driver prefetch feature status
*/
@@ -621,6 +622,7 @@
u32 max_wb_linewidth;
u32 highest_bank_bit;
u32 qseed_type;
+ u32 csc_type;
bool has_src_split;
bool has_cdp;