| commit | 5bc357037476bf8d4623ab4ef0d1640b947c4625 | [log] [tgz] |
|---|---|---|
| author | Dan Carpenter <dan.carpenter@oracle.com> | Tue Aug 20 11:54:48 2013 +0300 |
| committer | Herbert Xu <herbert@gondor.apana.org.au> | Wed Aug 21 21:28:07 2013 +1000 |
| tree | 9abd9c9aa71d823649b4a58a37868c4b832b4d89 | |
| parent | 393e661d6167c1b7444704191ea1d01aa3447894 [diff] |
crypto: tegra-aes - bitwise vs logical and The bug here is that: while (eng_busy & (!icq_empty) & dma_busy) is never true because it's using bitwise instead of logical ANDs. The other bitwise AND conditions work as intended but I changed them as well for consistency. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>