tree 875ab809151d4a04a8349138b122a700c2819431
parent 6192f870abf25d6bb83cb5cb85b072b5dcc40ba4
author Russell King <rmk+kernel@armlinux.org.uk> 1511781762 +0000
committer Greg Kroah-Hartman <gregkh@linuxfoundation.org> 1513240096 +0100

ARM: avoid faulting on qemu

commit 3aaf33bebda8d4ffcc0fc8ef39e6c1ac68823b11 upstream.

When qemu starts a kernel in a bare environment, the default SCR has
the AW and FW bits clear, which means that the kernel can't modify
the PSR A or PSR F bits, and means that FIQs and imprecise aborts are
always masked.

When running uboot under qemu, the AW and FW SCR bits are set, and the
kernel functions normally - and this is how real hardware behaves.

Fix this for qemu by ignoring the FIQ bit.

Fixes: 8bafae202c82 ("ARM: BUG if jumping to usermode address in kernel mode")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Alex Shi <alex.shi@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>