commit | 5c992afcf8e4f91fac05d39b86c7f7922a50145c | [log] [tgz] |
---|---|---|
author | Andrew Bresticker <abrestic@chromium.org> | Wed May 14 17:32:59 2014 -0700 |
committer | Mike Turquette <mturquette@linaro.org> | Thu May 22 22:14:52 2014 -0700 |
tree | 349870dc6143624ca62f5cfa2aa9de3460095d20 | |
parent | 9d61707b1f83324fc30918787cb6ef101997ecbd [diff] |
clk: tegra: Fix xusb_hs_src clock hierarchy Currently the Tegra1x4 clock init code hard-codes the mux setting for xusb_hs_src and treats it as a fixed-factor clock. It is, however, a mux which can be parented by either xusb_ss_src/2 or pll_u_60M. Add the fixed-factor clock xusb_ss_div2 and put an entry in periph_clks[] for the xusb_hs_src mux. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>