clk: qcom: gcc-sdm845: Add additional frequencies for the SDCC clocks
Support running the SDCC2 and SDCC4 clock sources at additional
frequencies on SDM845.
Change-Id: Iff843400f6991f808b1d3d2225c3a42794730941
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c
index 8fc2345..b5477bd 100644
--- a/drivers/clk/qcom/gcc-sdm845.c
+++ b/drivers/clk/qcom/gcc-sdm845.c
@@ -796,7 +796,10 @@
};
static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = {
+ F(400000, P_BI_TCXO, 12, 1, 4),
F(19200000, P_BI_TCXO, 1, 0, 0),
+ F(25000000, P_GPLL0_OUT_MAIN, 12, 1, 2),
+ F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0),
F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0),
F(200000000, P_GPLL0_OUT_MAIN, 3, 0, 0),
{ }
@@ -824,8 +827,9 @@
};
static const struct freq_tbl ftbl_gcc_sdcc4_apps_clk_src[] = {
- F(9600000, P_BI_TCXO, 2, 0, 0),
+ F(400000, P_BI_TCXO, 12, 1, 4),
F(19200000, P_BI_TCXO, 1, 0, 0),
+ F(25000000, P_GPLL0_OUT_MAIN, 12, 1, 2),
F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0),
F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0),
{ }