Merge tag 'tegra-for-3.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
From Stephen Warren:
ARM: tegra: core SoC code enhancements
Various small clock initialization table and driver changes to support
WiFi modules, SPI controllers, and host1x (graphics/display hardware).
Various AHB/APB-related clocks were added to the Tegra30 clock driver.
The level 2 cache initialization is now driven by data from device tree,
and the cache configuration tweaked.
AUXDATA is added to support SPI controllers and host1x.
Code to decode Tegra's "speedo" process identification fuses is added.
This pull request is based on tegra-for-3.8-cleanup.
* tag 'tegra-for-3.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (26 commits)
ARM: tegra: Add Tegra30 host1x clock support
ARM: tegra: Add AUXDATA for Tegra30 host1x
ARM: tegra: Add Tegra20 host1x clock support
ARM: tegra: Add AUXDATA for Tegra20 host1x
ARM: tegra: Tegra30 speedo-based process identification
ARM: tegra: Add speedo-based process identification
ARM: tegra: flexible spare fuse read function
ARM: tegra: Implement 6395/1 for Tegra
ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dt
ARM: tegra: enable data prefetch on L2
ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dt
ARM: tegra: common: using OF api for L2 cache init
ARM: tegra: dt: add L2 cache controller
ARM: tegra30: clocks: add AHB and APB clocks
ARM: tegra: set up wlan clocks for tegra dt
ARM: tegra: move irammap.h to mach-tegra
ARM: tegra: move iomap.h to mach-tegra
ARM: tegra: remove <mach/dma.h>
ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/
ARM: tegra: remove unnecessary includes of <mach/*.h>
...
diff --git a/Documentation/arm/sunxi/README b/Documentation/arm/sunxi/README
new file mode 100644
index 0000000..87a1e8f
--- /dev/null
+++ b/Documentation/arm/sunxi/README
@@ -0,0 +1,19 @@
+ARM Allwinner SoCs
+==================
+
+This document lists all the ARM Allwinner SoCs that are currently
+supported in mainline by the Linux kernel. This document will also
+provide links to documentation and or datasheet for these SoCs.
+
+SunXi family
+------------
+
+ Flavors:
+ Allwinner A10 (sun4i)
+ Datasheet : http://dl.linux-sunxi.org/A10/A10%20Datasheet%20-%20v1.21%20%282012-04-06%29.pdf
+
+ Allwinner A13 (sun5i)
+ Datasheet : http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf
+
+ Core: Cortex A8
+ Linux kernel mach directory: arch/arm/mach-sunxi
\ No newline at end of file
diff --git a/Documentation/arm64/memory.txt b/Documentation/arm64/memory.txt
index dbbdcbb..4110cca 100644
--- a/Documentation/arm64/memory.txt
+++ b/Documentation/arm64/memory.txt
@@ -27,17 +27,17 @@
-----------------------------------------------------------------------
0000000000000000 0000007fffffffff 512GB user
-ffffff8000000000 ffffffbbfffcffff ~240GB vmalloc
+ffffff8000000000 ffffffbbfffeffff ~240GB vmalloc
-ffffffbbfffd0000 ffffffbcfffdffff 64KB [guard page]
-
-ffffffbbfffe0000 ffffffbcfffeffff 64KB PCI I/O space
-
-ffffffbbffff0000 ffffffbcffffffff 64KB [guard page]
+ffffffbbffff0000 ffffffbbffffffff 64KB [guard page]
ffffffbc00000000 ffffffbdffffffff 8GB vmemmap
-ffffffbe00000000 ffffffbffbffffff ~8GB [guard, future vmmemap]
+ffffffbe00000000 ffffffbffbbfffff ~8GB [guard, future vmmemap]
+
+ffffffbffbe00000 ffffffbffbe0ffff 64KB PCI I/O space
+
+ffffffbbffff0000 ffffffbcffffffff ~2MB [guard]
ffffffbffc000000 ffffffbfffffffff 64MB modules
diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt b/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt
new file mode 100644
index 0000000..fb7b5cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt
@@ -0,0 +1,9 @@
+Broadcom BCM11351 device tree bindings
+-------------------------------------------
+
+Boards with the bcm281xx SoC family (which includes bcm11130, bcm11140,
+bcm11351, bcm28145, bcm28155 SoCs) shall have the following properties:
+
+Required root node property:
+
+compatible = "bcm,bcm11351";
diff --git a/Documentation/devicetree/bindings/arm/calxeda.txt b/Documentation/devicetree/bindings/arm/calxeda.txt
index 4755caa..25fcf96 100644
--- a/Documentation/devicetree/bindings/arm/calxeda.txt
+++ b/Documentation/devicetree/bindings/arm/calxeda.txt
@@ -1,8 +1,15 @@
-Calxeda Highbank Platforms Device Tree Bindings
+Calxeda Platforms Device Tree Bindings
-----------------------------------------------
-Boards with Calxeda Cortex-A9 based Highbank SOC shall have the following
-properties.
+Boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC shall have the
+following properties.
Required root node properties:
- compatible = "calxeda,highbank";
+
+
+Boards with Calxeda Cortex-A15 based ECX-2000 SOC shall have the following
+properties.
+
+Required root node properties:
+ - compatible = "calxeda,ecx-2000";
diff --git a/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt b/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt
index f3cf43b..3614242 100644
--- a/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt
@@ -12,13 +12,13 @@
Examples:
i2c@83fc4000 { /* I2C2 on i.MX51 */
- compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+ compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
reg = <0x83fc4000 0x4000>;
interrupts = <63>;
};
i2c@70038000 { /* HS-I2C on i.MX51 */
- compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+ compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
reg = <0x70038000 0x4000>;
interrupts = <64>;
clock-frequency = <400000>;
diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-ic.txt
new file mode 100644
index 0000000..7f9fb85
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-ic.txt
@@ -0,0 +1,104 @@
+Allwinner Sunxi Interrupt Controller
+
+Required properties:
+
+- compatible : should be "allwinner,sunxi-ic"
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt source. The value shall be 1.
+
+The interrupt sources are as follows:
+
+0: ENMI
+1: UART0
+2: UART1
+3: UART2
+4: UART3
+5: IR0
+6: IR1
+7: I2C0
+8: I2C1
+9: I2C2
+10: SPI0
+11: SPI1
+12: SPI2
+13: SPDIF
+14: AC97
+15: TS
+16: I2S
+17: UART4
+18: UART5
+19: UART6
+20: UART7
+21: KEYPAD
+22: TIMER0
+23: TIMER1
+24: TIMER2
+25: TIMER3
+26: CAN
+27: DMA
+28: PIO
+29: TOUCH_PANEL
+30: AUDIO_CODEC
+31: LRADC
+32: SDMC0
+33: SDMC1
+34: SDMC2
+35: SDMC3
+36: MEMSTICK
+37: NAND
+38: USB0
+39: USB1
+40: USB2
+41: SCR
+42: CSI0
+43: CSI1
+44: LCDCTRL0
+45: LCDCTRL1
+46: MP
+47: DEFEBE0
+48: DEFEBE1
+49: PMU
+50: SPI3
+51: TZASC
+52: PATA
+53: VE
+54: SS
+55: EMAC
+56: SATA
+57: GPS
+58: HDMI
+59: TVE
+60: ACE
+61: TVD
+62: PS2_0
+63: PS2_1
+64: USB3
+65: USB4
+66: PLE_PFM
+67: TIMER4
+68: TIMER5
+69: GPU_GP
+70: GPU_GPMMU
+71: GPU_PP0
+72: GPU_PPMMU0
+73: GPU_PMU
+74: GPU_RSV0
+75: GPU_RSV1
+76: GPU_RSV2
+77: GPU_RSV3
+78: GPU_RSV4
+79: GPU_RSV5
+80: GPU_RSV6
+82: SYNC_TIMER0
+83: SYNC_TIMER1
+
+Example:
+
+intc: interrupt-controller {
+ compatible = "allwinner,sunxi-ic";
+ reg = <0x01c20400 0x400>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+};
diff --git a/Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt b/Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt
new file mode 100644
index 0000000..0c7b64e
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt
@@ -0,0 +1,17 @@
+Allwinner A1X SoCs Timer Controller
+
+Required properties:
+
+- compatible : should be "allwinner,sunxi-timer"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : The interrupt of the first timer
+- clocks: phandle to the source clock (usually a 24 MHz fixed clock)
+
+Example:
+
+timer {
+ compatible = "allwinner,sunxi-timer";
+ reg = <0x01c20c00 0x400>;
+ interrupts = <22>;
+ clocks = <&osc>;
+};
diff --git a/MAINTAINERS b/MAINTAINERS
index 59203e7..12bd27e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -685,6 +685,12 @@
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
+ARM/Allwinner A1X SoC support
+M: Maxime Ripard <maxime.ripard@free-electrons.com>
+L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S: Maintained
+F: arch/arm/mach-sunxi/
+
ARM/ATMEL AT91RM9200 AND AT91SAM ARM ARCHITECTURES
M: Andrew Victor <linux@maxim.org.za>
M: Nicolas Ferre <nicolas.ferre@atmel.com>
@@ -797,7 +803,6 @@
S: Maintained
T: git git://git.pengutronix.de/git/imx/linux-2.6.git
F: arch/arm/mach-imx/
-F: arch/arm/plat-mxc/
F: arch/arm/configs/imx*_defconfig
ARM/FREESCALE IMX6
diff --git a/Makefile b/Makefile
index a1ccf22..6edac73 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 7
SUBLEVEL = 0
-EXTRAVERSION = -rc4
+EXTRAVERSION = -rc5
NAME = Terrified Chipmunk
# *DOCUMENTATION*
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ade7e92..6c1d019 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -284,8 +284,8 @@
select MULTI_IRQ_HANDLER
select NEED_MACH_MEMORY_H
select PLAT_VERSATILE
- select PLAT_VERSATILE_FPGA_IRQ
select SPARSE_IRQ
+ select VERSATILE_FPGA_IRQ
help
Support for ARM's Integrator platform.
@@ -318,7 +318,7 @@
select PLAT_VERSATILE
select PLAT_VERSATILE_CLCD
select PLAT_VERSATILE_CLOCK
- select PLAT_VERSATILE_FPGA_IRQ
+ select VERSATILE_FPGA_IRQ
help
This enables support for ARM Ltd Versatile board.
@@ -364,10 +364,10 @@
config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
- select ARCH_USES_GETTIMEOFFSET
select CLKDEV_LOOKUP
select COMMON_CLK
select CPU_ARM720T
+ select GENERIC_CLOCKEVENTS
select NEED_MACH_MEMORY_H
help
Support for Cirrus Logic 711x/721x/731x based boards.
@@ -433,19 +433,6 @@
Support for systems based on the DC21285 companion chip
("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
-config ARCH_MXC
- bool "Freescale MXC/iMX-based"
- select ARCH_REQUIRE_GPIOLIB
- select CLKDEV_LOOKUP
- select CLKSRC_MMIO
- select GENERIC_CLOCKEVENTS
- select GENERIC_IRQ_CHIP
- select MULTI_IRQ_HANDLER
- select SPARSE_IRQ
- select USE_OF
- help
- Support for Freescale MXC/iMX-based family of processors
-
config ARCH_MXS
bool "Freescale MXS-based"
select ARCH_REQUIRE_GPIOLIB
@@ -1022,6 +1009,8 @@
source "arch/arm/mach-at91/Kconfig"
+source "arch/arm/mach-bcm/Kconfig"
+
source "arch/arm/mach-clps711x/Kconfig"
source "arch/arm/mach-cns3xxx/Kconfig"
@@ -1058,7 +1047,7 @@
source "arch/arm/mach-mv78xx0/Kconfig"
-source "arch/arm/plat-mxc/Kconfig"
+source "arch/arm/mach-imx/Kconfig"
source "arch/arm/mach-mxs/Kconfig"
@@ -1113,6 +1102,8 @@
source "arch/arm/mach-shmobile/Kconfig"
+source "arch/arm/mach-sunxi/Kconfig"
+
source "arch/arm/mach-prima2/Kconfig"
source "arch/arm/mach-tegra/Kconfig"
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index b0f3857..4c336c3 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -345,6 +345,13 @@
Say Y here if you want kernel low-level debugging support
on SOCFPGA based platforms.
+ config DEBUG_SUNXI_UART1
+ bool "Kernel low-level debugging messages via sunXi UART1"
+ depends on ARCH_SUNXI
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Allwinner A1X based platforms on the UART1.
+
config DEBUG_VEXPRESS_UART0_DETECT
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
depends on ARCH_VEXPRESS && CPU_CP15_MMU
@@ -412,10 +419,19 @@
config DEBUG_LL_INCLUDE
string
default "debug/icedcc.S" if DEBUG_ICEDCC
+ default "debug/imx.S" if DEBUG_IMX1_UART || \
+ DEBUG_IMX25_UART || \
+ DEBUG_IMX21_IMX27_UART || \
+ DEBUG_IMX31_IMX35_UART || \
+ DEBUG_IMX51_UART || \
+ DEBUG_IMX50_IMX53_UART ||\
+ DEBUG_IMX6Q_UART2 || \
+ DEBUG_IMX6Q_UART4
default "debug/highbank.S" if DEBUG_HIGHBANK_UART
default "debug/mvebu.S" if DEBUG_MVEBU_UART
default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
+ default "debug/sunxi.S" if DEBUG_SUNXI_UART1
default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
default "mach/debug-macro.S"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 5f914fc..58afa0d 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -137,6 +137,7 @@
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
machine-$(CONFIG_ARCH_AT91) += at91
+machine-$(CONFIG_ARCH_BCM) += bcm
machine-$(CONFIG_ARCH_BCM2835) += bcm2835
machine-$(CONFIG_ARCH_CLPS711X) += clps711x
machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
@@ -193,10 +194,10 @@
machine-$(CONFIG_ARCH_SPEAR3XX) += spear3xx
machine-$(CONFIG_MACH_SPEAR600) += spear6xx
machine-$(CONFIG_ARCH_ZYNQ) += zynq
+machine-$(CONFIG_ARCH_SUNXI) += sunxi
# Platform directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
-plat-$(CONFIG_ARCH_MXC) += mxc
plat-$(CONFIG_ARCH_OMAP) += omap
plat-$(CONFIG_ARCH_S3C64XX) += samsung
plat-$(CONFIG_ARCH_ZYNQ) += versatile
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f37cf9f..22e4ac9 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -17,6 +17,7 @@
usb_a9263.dtb \
usb_a9g20.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
+dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb
dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
dove-cubox.dtb \
dove-dove-db.dtb
@@ -24,7 +25,8 @@
exynos4210-smdkv310.dtb \
exynos4210-trats.dtb \
exynos5250-smdk5250.dtb
-dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb
+dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
+ ecx-2000.dtb
dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \
integratorcp.dtb
dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
@@ -84,6 +86,7 @@
spear310-evb.dtb \
spear320-evb.dtb
dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun5i-olinuxino.dtb
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/boot/dts/bcm11351-brt.dts b/arch/arm/boot/dts/bcm11351-brt.dts
new file mode 100644
index 0000000..248067c
--- /dev/null
+++ b/arch/arm/boot/dts/bcm11351-brt.dts
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2012 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+/include/ "bcm11351.dtsi"
+
+/ {
+ model = "BCM11351 BRT board";
+ compatible = "bcm,bcm11351-brt", "bcm,bcm11351";
+
+ memory {
+ reg = <0x80000000 0x40000000>; /* 1 GB */
+ };
+
+ uart@3e000000 {
+ status = "okay";
+ };
+
+};
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
new file mode 100644
index 0000000..ad13588
--- /dev/null
+++ b/arch/arm/boot/dts/bcm11351.dtsi
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2012 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "BCM11351 SoC";
+ compatible = "bcm,bcm11351";
+ interrupt-parent = <&gic>;
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8";
+ };
+
+ gic: interrupt-controller@3ff00100 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x3ff01000 0x1000>,
+ <0x3ff00100 0x100>;
+ };
+
+ uart@3e000000 {
+ compatible = "bcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
+ status = "disabled";
+ reg = <0x3e000000 0x1000>;
+ clock-frequency = <13000000>;
+ interrupts = <0x0 67 0x4>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ };
+
+ L2: l2-cache {
+ compatible = "arm,pl310-cache";
+ reg = <0x3ff20000 0x1000>;
+ cache-unified;
+ cache-level = <2>;
+ };
+};
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
new file mode 100644
index 0000000..46477ac
--- /dev/null
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -0,0 +1,104 @@
+/*
+ * Copyright 2011-2012 Calxeda, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+
+/* First 4KB has pen for secondary cores. */
+/memreserve/ 0x00000000 0x0001000;
+
+/ {
+ model = "Calxeda ECX-2000";
+ compatible = "calxeda,ecx-2000";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ clock-ranges;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "arm,cortex-a15";
+ reg = <0>;
+ clocks = <&a9pll>;
+ clock-names = "cpu";
+ };
+
+ cpu@1 {
+ compatible = "arm,cortex-a15";
+ reg = <1>;
+ clocks = <&a9pll>;
+ clock-names = "cpu";
+ };
+
+ cpu@2 {
+ compatible = "arm,cortex-a15";
+ reg = <2>;
+ clocks = <&a9pll>;
+ clock-names = "cpu";
+ };
+
+ cpu@3 {
+ compatible = "arm,cortex-a15";
+ reg = <3>;
+ clocks = <&a9pll>;
+ clock-names = "cpu";
+ };
+ };
+
+ memory@0 {
+ name = "memory";
+ device_type = "memory";
+ reg = <0x00000000 0x00000000 0x00000000 0xff800000>;
+ };
+
+ memory@200000000 {
+ name = "memory";
+ device_type = "memory";
+ reg = <0x00000002 0x00000000 0x00000003 0x00000000>;
+ };
+
+ soc {
+ ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>;
+
+ timer {
+ compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>,
+ <1 14 0xf08>,
+ <1 11 0xf08>,
+ <1 10 0xf08>;
+ };
+
+ intc: interrupt-controller@fff11000 {
+ compatible = "arm,cortex-a15-gic";
+ #interrupt-cells = <3>;
+ #size-cells = <0>;
+ #address-cells = <1>;
+ interrupt-controller;
+ interrupts = <1 9 0xf04>;
+ reg = <0xfff11000 0x1000>,
+ <0xfff12000 0x1000>,
+ <0xfff14000 0x2000>,
+ <0xfff16000 0x2000>;
+ };
+
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>;
+ };
+ };
+};
+
+/include/ "ecx-common.dtsi"
diff --git a/arch/arm/boot/dts/ecx-common.dtsi b/arch/arm/boot/dts/ecx-common.dtsi
new file mode 100644
index 0000000..d61b535
--- /dev/null
+++ b/arch/arm/boot/dts/ecx-common.dtsi
@@ -0,0 +1,237 @@
+/*
+ * Copyright 2011-2012 Calxeda, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/ {
+ chosen {
+ bootargs = "console=ttyAMA0";
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ interrupt-parent = <&intc>;
+
+ sata@ffe08000 {
+ compatible = "calxeda,hb-ahci";
+ reg = <0xffe08000 0x10000>;
+ interrupts = <0 83 4>;
+ dma-coherent;
+ calxeda,port-phys = <&combophy5 0 &combophy0 0
+ &combophy0 1 &combophy0 2
+ &combophy0 3>;
+ };
+
+ sdhci@ffe0e000 {
+ compatible = "calxeda,hb-sdhci";
+ reg = <0xffe0e000 0x1000>;
+ interrupts = <0 90 4>;
+ clocks = <&eclk>;
+ status = "disabled";
+ };
+
+ memory-controller@fff00000 {
+ compatible = "calxeda,hb-ddr-ctrl";
+ reg = <0xfff00000 0x1000>;
+ interrupts = <0 91 4>;
+ };
+
+ ipc@fff20000 {
+ compatible = "arm,pl320", "arm,primecell";
+ reg = <0xfff20000 0x1000>;
+ interrupts = <0 7 4>;
+ clocks = <&pclk>;
+ clock-names = "apb_pclk";
+ };
+
+ gpioe: gpio@fff30000 {
+ #gpio-cells = <2>;
+ compatible = "arm,pl061", "arm,primecell";
+ gpio-controller;
+ reg = <0xfff30000 0x1000>;
+ interrupts = <0 14 4>;
+ clocks = <&pclk>;
+ clock-names = "apb_pclk";
+ status = "disabled";
+ };
+
+ gpiof: gpio@fff31000 {
+ #gpio-cells = <2>;
+ compatible = "arm,pl061", "arm,primecell";
+ gpio-controller;
+ reg = <0xfff31000 0x1000>;
+ interrupts = <0 15 4>;
+ clocks = <&pclk>;
+ clock-names = "apb_pclk";
+ status = "disabled";
+ };
+
+ gpiog: gpio@fff32000 {
+ #gpio-cells = <2>;
+ compatible = "arm,pl061", "arm,primecell";
+ gpio-controller;
+ reg = <0xfff32000 0x1000>;
+ interrupts = <0 16 4>;
+ clocks = <&pclk>;
+ clock-names = "apb_pclk";
+ status = "disabled";
+ };
+
+ gpioh: gpio@fff33000 {
+ #gpio-cells = <2>;
+ compatible = "arm,pl061", "arm,primecell";
+ gpio-controller;
+ reg = <0xfff33000 0x1000>;
+ interrupts = <0 17 4>;
+ clocks = <&pclk>;
+ clock-names = "apb_pclk";
+ status = "disabled";
+ };
+
+ timer@fff34000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0xfff34000 0x1000>;
+ interrupts = <0 18 4>;
+ clocks = <&pclk>;
+ clock-names = "apb_pclk";
+ };
+
+ rtc@fff35000 {
+ compatible = "arm,pl031", "arm,primecell";
+ reg = <0xfff35000 0x1000>;
+ interrupts = <0 19 4>;
+ clocks = <&pclk>;
+ clock-names = "apb_pclk";
+ };
+
+ serial@fff36000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0xfff36000 0x1000>;
+ interrupts = <0 20 4>;
+ clocks = <&pclk>;
+ clock-names = "apb_pclk";
+ };
+
+ smic@fff3a000 {
+ compatible = "ipmi-smic";
+ device_type = "ipmi";
+ reg = <0xfff3a000 0x1000>;
+ interrupts = <0 24 4>;
+ reg-size = <4>;
+ reg-spacing = <4>;
+ };
+
+ sregs@fff3c000 {
+ compatible = "calxeda,hb-sregs";
+ reg = <0xfff3c000 0x1000>;
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ osc: oscillator {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <33333000>;
+ };
+
+ ddrpll: ddrpll {
+ #clock-cells = <0>;
+ compatible = "calxeda,hb-pll-clock";
+ clocks = <&osc>;
+ reg = <0x108>;
+ };
+
+ a9pll: a9pll {
+ #clock-cells = <0>;
+ compatible = "calxeda,hb-pll-clock";
+ clocks = <&osc>;
+ reg = <0x100>;
+ };
+
+ a9periphclk: a9periphclk {
+ #clock-cells = <0>;
+ compatible = "calxeda,hb-a9periph-clock";
+ clocks = <&a9pll>;
+ reg = <0x104>;
+ };
+
+ a9bclk: a9bclk {
+ #clock-cells = <0>;
+ compatible = "calxeda,hb-a9bus-clock";
+ clocks = <&a9pll>;
+ reg = <0x104>;
+ };
+
+ emmcpll: emmcpll {
+ #clock-cells = <0>;
+ compatible = "calxeda,hb-pll-clock";
+ clocks = <&osc>;
+ reg = <0x10C>;
+ };
+
+ eclk: eclk {
+ #clock-cells = <0>;
+ compatible = "calxeda,hb-emmc-clock";
+ clocks = <&emmcpll>;
+ reg = <0x114>;
+ };
+
+ pclk: pclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <150000000>;
+ };
+ };
+ };
+
+ dma@fff3d000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0xfff3d000 0x1000>;
+ interrupts = <0 92 4>;
+ clocks = <&pclk>;
+ clock-names = "apb_pclk";
+ };
+
+ ethernet@fff50000 {
+ compatible = "calxeda,hb-xgmac";
+ reg = <0xfff50000 0x1000>;
+ interrupts = <0 77 4 0 78 4 0 79 4>;
+ dma-coherent;
+ };
+
+ ethernet@fff51000 {
+ compatible = "calxeda,hb-xgmac";
+ reg = <0xfff51000 0x1000>;
+ interrupts = <0 80 4 0 81 4 0 82 4>;
+ dma-coherent;
+ };
+
+ combophy0: combo-phy@fff58000 {
+ compatible = "calxeda,hb-combophy";
+ #phy-cells = <1>;
+ reg = <0xfff58000 0x1000>;
+ phydev = <5>;
+ };
+
+ combophy5: combo-phy@fff5d000 {
+ compatible = "calxeda,hb-combophy";
+ #phy-cells = <1>;
+ reg = <0xfff5d000 0x1000>;
+ phydev = <31>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index 0c6fc34..a9ae5d3 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -69,16 +69,8 @@
reg = <0x00000000 0xff900000>;
};
- chosen {
- bootargs = "console=ttyAMA0";
- };
-
soc {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- interrupt-parent = <&intc>;
- ranges;
+ ranges = <0x00000000 0x00000000 0xffffffff>;
timer@fff10600 {
compatible = "arm,cortex-a9-twd-timer";
@@ -117,173 +109,6 @@
interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>;
};
- sata@ffe08000 {
- compatible = "calxeda,hb-ahci";
- reg = <0xffe08000 0x10000>;
- interrupts = <0 83 4>;
- calxeda,port-phys = <&combophy5 0 &combophy0 0
- &combophy0 1 &combophy0 2
- &combophy0 3>;
- dma-coherent;
- };
-
- sdhci@ffe0e000 {
- compatible = "calxeda,hb-sdhci";
- reg = <0xffe0e000 0x1000>;
- interrupts = <0 90 4>;
- clocks = <&eclk>;
- };
-
- memory-controller@fff00000 {
- compatible = "calxeda,hb-ddr-ctrl";
- reg = <0xfff00000 0x1000>;
- interrupts = <0 91 4>;
- };
-
- ipc@fff20000 {
- compatible = "arm,pl320", "arm,primecell";
- reg = <0xfff20000 0x1000>;
- interrupts = <0 7 4>;
- clocks = <&pclk>;
- clock-names = "apb_pclk";
- };
-
- gpioe: gpio@fff30000 {
- #gpio-cells = <2>;
- compatible = "arm,pl061", "arm,primecell";
- gpio-controller;
- reg = <0xfff30000 0x1000>;
- interrupts = <0 14 4>;
- clocks = <&pclk>;
- clock-names = "apb_pclk";
- };
-
- gpiof: gpio@fff31000 {
- #gpio-cells = <2>;
- compatible = "arm,pl061", "arm,primecell";
- gpio-controller;
- reg = <0xfff31000 0x1000>;
- interrupts = <0 15 4>;
- clocks = <&pclk>;
- clock-names = "apb_pclk";
- };
-
- gpiog: gpio@fff32000 {
- #gpio-cells = <2>;
- compatible = "arm,pl061", "arm,primecell";
- gpio-controller;
- reg = <0xfff32000 0x1000>;
- interrupts = <0 16 4>;
- clocks = <&pclk>;
- clock-names = "apb_pclk";
- };
-
- gpioh: gpio@fff33000 {
- #gpio-cells = <2>;
- compatible = "arm,pl061", "arm,primecell";
- gpio-controller;
- reg = <0xfff33000 0x1000>;
- interrupts = <0 17 4>;
- clocks = <&pclk>;
- clock-names = "apb_pclk";
- };
-
- timer {
- compatible = "arm,sp804", "arm,primecell";
- reg = <0xfff34000 0x1000>;
- interrupts = <0 18 4>;
- clocks = <&pclk>;
- clock-names = "apb_pclk";
- };
-
- rtc@fff35000 {
- compatible = "arm,pl031", "arm,primecell";
- reg = <0xfff35000 0x1000>;
- interrupts = <0 19 4>;
- clocks = <&pclk>;
- clock-names = "apb_pclk";
- };
-
- serial@fff36000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0xfff36000 0x1000>;
- interrupts = <0 20 4>;
- clocks = <&pclk>;
- clock-names = "apb_pclk";
- };
-
- smic@fff3a000 {
- compatible = "ipmi-smic";
- device_type = "ipmi";
- reg = <0xfff3a000 0x1000>;
- interrupts = <0 24 4>;
- reg-size = <4>;
- reg-spacing = <4>;
- };
-
- sregs@fff3c000 {
- compatible = "calxeda,hb-sregs";
- reg = <0xfff3c000 0x1000>;
-
- clocks {
- #address-cells = <1>;
- #size-cells = <0>;
-
- osc: oscillator {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <33333000>;
- };
-
- ddrpll: ddrpll {
- #clock-cells = <0>;
- compatible = "calxeda,hb-pll-clock";
- clocks = <&osc>;
- reg = <0x108>;
- };
-
- a9pll: a9pll {
- #clock-cells = <0>;
- compatible = "calxeda,hb-pll-clock";
- clocks = <&osc>;
- reg = <0x100>;
- };
-
- a9periphclk: a9periphclk {
- #clock-cells = <0>;
- compatible = "calxeda,hb-a9periph-clock";
- clocks = <&a9pll>;
- reg = <0x104>;
- };
-
- a9bclk: a9bclk {
- #clock-cells = <0>;
- compatible = "calxeda,hb-a9bus-clock";
- clocks = <&a9pll>;
- reg = <0x104>;
- };
-
- emmcpll: emmcpll {
- #clock-cells = <0>;
- compatible = "calxeda,hb-pll-clock";
- clocks = <&osc>;
- reg = <0x10C>;
- };
-
- eclk: eclk {
- #clock-cells = <0>;
- compatible = "calxeda,hb-emmc-clock";
- clocks = <&emmcpll>;
- reg = <0x114>;
- };
-
- pclk: pclk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <150000000>;
- };
- };
- };
sregs@fff3c200 {
compatible = "calxeda,hb-sregs-l2-ecc";
@@ -291,38 +116,7 @@
interrupts = <0 71 4 0 72 4>;
};
- dma@fff3d000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0xfff3d000 0x1000>;
- interrupts = <0 92 4>;
- clocks = <&pclk>;
- clock-names = "apb_pclk";
- };
-
- ethernet@fff50000 {
- compatible = "calxeda,hb-xgmac";
- reg = <0xfff50000 0x1000>;
- interrupts = <0 77 4 0 78 4 0 79 4>;
- };
-
- ethernet@fff51000 {
- compatible = "calxeda,hb-xgmac";
- reg = <0xfff51000 0x1000>;
- interrupts = <0 80 4 0 81 4 0 82 4>;
- };
-
- combophy0: combo-phy@fff58000 {
- compatible = "calxeda,hb-combophy";
- #phy-cells = <1>;
- reg = <0xfff58000 0x1000>;
- phydev = <5>;
- };
-
- combophy5: combo-phy@fff5d000 {
- compatible = "calxeda,hb-combophy";
- #phy-cells = <1>;
- reg = <0xfff5d000 0x1000>;
- phydev = <31>;
- };
};
};
+
+/include/ "ecx-common.dtsi"
diff --git a/arch/arm/boot/dts/imx27-3ds.dts b/arch/arm/boot/dts/imx27-3ds.dts
index 0a8978a..b01c0d7 100644
--- a/arch/arm/boot/dts/imx27-3ds.dts
+++ b/arch/arm/boot/dts/imx27-3ds.dts
@@ -23,10 +23,6 @@
soc {
aipi@10000000 { /* aipi */
- wdog@10002000 {
- status = "okay";
- };
-
uart1: serial@1000a000 {
fsl,uart-has-rtscts;
status = "okay";
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index 3e54f14..67d6727 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -113,7 +113,7 @@
i2c1: i2c@10012000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
+ compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
reg = <0x10012000 0x1000>;
interrupts = <12>;
status = "disabled";
@@ -205,7 +205,7 @@
i2c2: i2c@1001d000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
+ compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
reg = <0x1001d000 0x1000>;
interrupts = <1>;
status = "disabled";
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index cbd2b1c..567e7ee 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -22,6 +22,22 @@
};
soc {
+ display@di0 {
+ compatible = "fsl,imx-parallel-display";
+ crtcs = <&ipu 0>;
+ interface-pix-fmt = "rgb24";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu_disp1_1>;
+ };
+
+ display@di1 {
+ compatible = "fsl,imx-parallel-display";
+ crtcs = <&ipu 1>;
+ interface-pix-fmt = "rgb565";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu_disp2_1>;
+ };
+
aips@70000000 { /* aips-1 */
spba@70000000 {
esdhc@70004000 { /* ESDHC1 */
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 75d069f..44c7af7 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -62,6 +62,13 @@
interrupt-parent = <&tzic>;
ranges;
+ ipu: ipu@40000000 {
+ #crtc-cells = <1>;
+ compatible = "fsl,imx51-ipu";
+ reg = <0x40000000 0x20000000>;
+ interrupts = <11 10>;
+ };
+
aips@70000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
@@ -295,6 +302,66 @@
};
};
+ ipu_disp1 {
+ pinctrl_ipu_disp1_1: ipudisp1grp-1 {
+ fsl,pins = <
+ 528 0x5 /* MX51_PAD_DISP1_DAT0__DISP1_DAT0 */
+ 529 0x5 /* MX51_PAD_DISP1_DAT1__DISP1_DAT1 */
+ 530 0x5 /* MX51_PAD_DISP1_DAT2__DISP1_DAT2 */
+ 531 0x5 /* MX51_PAD_DISP1_DAT3__DISP1_DAT3 */
+ 532 0x5 /* MX51_PAD_DISP1_DAT4__DISP1_DAT4 */
+ 533 0x5 /* MX51_PAD_DISP1_DAT5__DISP1_DAT5 */
+ 535 0x5 /* MX51_PAD_DISP1_DAT6__DISP1_DAT6 */
+ 537 0x5 /* MX51_PAD_DISP1_DAT7__DISP1_DAT7 */
+ 539 0x5 /* MX51_PAD_DISP1_DAT8__DISP1_DAT8 */
+ 541 0x5 /* MX51_PAD_DISP1_DAT9__DISP1_DAT9 */
+ 543 0x5 /* MX51_PAD_DISP1_DAT10__DISP1_DAT10 */
+ 545 0x5 /* MX51_PAD_DISP1_DAT11__DISP1_DAT11 */
+ 547 0x5 /* MX51_PAD_DISP1_DAT12__DISP1_DAT12 */
+ 549 0x5 /* MX51_PAD_DISP1_DAT13__DISP1_DAT13 */
+ 551 0x5 /* MX51_PAD_DISP1_DAT14__DISP1_DAT14 */
+ 553 0x5 /* MX51_PAD_DISP1_DAT15__DISP1_DAT15 */
+ 555 0x5 /* MX51_PAD_DISP1_DAT16__DISP1_DAT16 */
+ 557 0x5 /* MX51_PAD_DISP1_DAT17__DISP1_DAT17 */
+ 559 0x5 /* MX51_PAD_DISP1_DAT18__DISP1_DAT18 */
+ 563 0x5 /* MX51_PAD_DISP1_DAT19__DISP1_DAT19 */
+ 567 0x5 /* MX51_PAD_DISP1_DAT20__DISP1_DAT20 */
+ 571 0x5 /* MX51_PAD_DISP1_DAT21__DISP1_DAT21 */
+ 575 0x5 /* MX51_PAD_DISP1_DAT22__DISP1_DAT22 */
+ 579 0x5 /* MX51_PAD_DISP1_DAT23__DISP1_DAT23 */
+ 584 0x5 /* MX51_PAD_DI1_PIN2__DI1_PIN2 (hsync) */
+ 583 0x5 /* MX51_PAD_DI1_PIN3__DI1_PIN3 (vsync) */
+ >;
+ };
+ };
+
+ ipu_disp2 {
+ pinctrl_ipu_disp2_1: ipudisp2grp-1 {
+ fsl,pins = <
+ 603 0x5 /* MX51_PAD_DISP2_DAT0__DISP2_DAT0 */
+ 608 0x5 /* MX51_PAD_DISP2_DAT1__DISP2_DAT1 */
+ 613 0x5 /* MX51_PAD_DISP2_DAT2__DISP2_DAT2 */
+ 614 0x5 /* MX51_PAD_DISP2_DAT3__DISP2_DAT3 */
+ 615 0x5 /* MX51_PAD_DISP2_DAT4__DISP2_DAT4 */
+ 616 0x5 /* MX51_PAD_DISP2_DAT5__DISP2_DAT5 */
+ 617 0x5 /* MX51_PAD_DISP2_DAT6__DISP2_DAT6 */
+ 622 0x5 /* MX51_PAD_DISP2_DAT7__DISP2_DAT7 */
+ 627 0x5 /* MX51_PAD_DISP2_DAT8__DISP2_DAT8 */
+ 633 0x5 /* MX51_PAD_DISP2_DAT9__DISP2_DAT9 */
+ 637 0x5 /* MX51_PAD_DISP2_DAT10__DISP2_DAT10 */
+ 643 0x5 /* MX51_PAD_DISP2_DAT11__DISP2_DAT11 */
+ 648 0x5 /* MX51_PAD_DISP2_DAT12__DISP2_DAT12 */
+ 652 0x5 /* MX51_PAD_DISP2_DAT13__DISP2_DAT13 */
+ 656 0x5 /* MX51_PAD_DISP2_DAT14__DISP2_DAT14 */
+ 661 0x5 /* MX51_PAD_DISP2_DAT15__DISP2_DAT15 */
+ 593 0x5 /* MX51_PAD_DI2_PIN2__DI2_PIN2 (hsync) */
+ 595 0x5 /* MX51_PAD_DI2_PIN3__DI2_PIN3 (vsync) */
+ 597 0x5 /* MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK */
+ 599 0x5 /* MX51_PAD_DI_GP4__DI2_PIN15 */
+ >;
+ };
+ };
+
uart1 {
pinctrl_uart1_1: uart1grp-1 {
fsl,pins = <
@@ -377,7 +444,7 @@
i2c@83fc4000 { /* I2C2 */
#address-cells = <1>;
#size-cells = <0>;
- compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+ compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
reg = <0x83fc4000 0x4000>;
interrupts = <63>;
status = "disabled";
@@ -386,7 +453,7 @@
i2c@83fc8000 { /* I2C1 */
#address-cells = <1>;
#size-cells = <0>;
- compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+ compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
reg = <0x83fc8000 0x4000>;
interrupts = <62>;
status = "disabled";
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 76ebb1a..8317a17 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -67,6 +67,13 @@
interrupt-parent = <&tzic>;
ranges;
+ ipu: ipu@18000000 {
+ #crtc-cells = <1>;
+ compatible = "fsl,imx53-ipu";
+ reg = <0x18000000 0x080000000>;
+ interrupts = <11 10>;
+ };
+
aips@50000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
@@ -432,7 +439,7 @@
i2c@53fec000 { /* I2C3 */
#address-cells = <1>;
#size-cells = <0>;
- compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
+ compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
reg = <0x53fec000 0x4000>;
interrupts = <64>;
status = "disabled";
@@ -488,7 +495,7 @@
i2c@63fc4000 { /* I2C2 */
#address-cells = <1>;
#size-cells = <0>;
- compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
+ compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
reg = <0x63fc4000 0x4000>;
interrupts = <63>;
status = "disabled";
@@ -497,7 +504,7 @@
i2c@63fc8000 { /* I2C1 */
#address-cells = <1>;
#size-cells = <0>;
- compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
+ compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
reg = <0x63fc8000 0x4000>;
interrupts = <62>;
status = "disabled";
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index f3990b0..69fe8f4 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -882,7 +882,7 @@
i2c@021a0000 { /* I2C1 */
#address-cells = <1>;
#size-cells = <0>;
- compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
+ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
reg = <0x021a0000 0x4000>;
interrupts = <0 36 0x04>;
clocks = <&clks 125>;
@@ -892,7 +892,7 @@
i2c@021a4000 { /* I2C2 */
#address-cells = <1>;
#size-cells = <0>;
- compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
+ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
reg = <0x021a4000 0x4000>;
interrupts = <0 37 0x04>;
clocks = <&clks 126>;
@@ -902,7 +902,7 @@
i2c@021a8000 { /* I2C3 */
#address-cells = <1>;
#size-cells = <0>;
- compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
+ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
reg = <0x021a8000 0x4000>;
interrupts = <0 38 0x04>;
clocks = <&clks 127>;
@@ -1001,5 +1001,23 @@
status = "disabled";
};
};
+
+ ipu1: ipu@02400000 {
+ #crtc-cells = <1>;
+ compatible = "fsl,imx6q-ipu";
+ reg = <0x02400000 0x400000>;
+ interrupts = <0 6 0x4 0 5 0x4>;
+ clocks = <&clks 130>, <&clks 131>, <&clks 132>;
+ clock-names = "bus", "di0", "di1";
+ };
+
+ ipu2: ipu@02800000 {
+ #crtc-cells = <1>;
+ compatible = "fsl,imx6q-ipu";
+ reg = <0x02800000 0x400000>;
+ interrupts = <0 8 0x4 0 7 0x4>;
+ clocks = <&clks 133>, <&clks 134>, <&clks 137>;
+ clock-names = "bus", "di0", "di1";
+ };
};
};
diff --git a/arch/arm/boot/dts/sh7377.dtsi b/arch/arm/boot/dts/sh7377.dtsi
deleted file mode 100644
index 767ee07..0000000
--- a/arch/arm/boot/dts/sh7377.dtsi
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Device Tree Source for the sh7377 SoC
- *
- * Copyright (C) 2012 Renesas Solutions Corp.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
- compatible = "renesas,sh7377";
-
- cpus {
- cpu@0 {
- compatible = "arm,cortex-a8";
- };
- };
-};
diff --git a/arch/arm/boot/dts/sun5i-olinuxino.dts b/arch/arm/boot/dts/sun5i-olinuxino.dts
new file mode 100644
index 0000000..3b1cce3
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-olinuxino.dts
@@ -0,0 +1,26 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "sun5i.dtsi"
+
+/ {
+ model = "Olimex A13-Olinuxino";
+ compatible = "olimex,a13-olinuxino", "allwinner,sun5i";
+
+ soc {
+ duart: uart@01c28400 {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
new file mode 100644
index 0000000..4bedf3e
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ interrupt-parent = <&intc>;
+
+ cpus {
+ cpu@0 {
+ compatible = "arm,cortex-a8";
+ };
+ };
+
+ chosen {
+ bootargs = "earlyprintk console=ttyS0,115200";
+ };
+
+ memory {
+ reg = <0x40000000 0x20000000>;
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ osc: oscillator {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ };
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x01c20000 0x300000>;
+ ranges;
+
+ timer@01c20c00 {
+ compatible = "allwinner,sunxi-timer";
+ reg = <0x01c20c00 0x400>;
+ interrupts = <22>;
+ clocks = <&osc>;
+ };
+
+ intc: interrupt-controller@01c20400 {
+ compatible = "allwinner,sunxi-ic";
+ reg = <0x01c20400 0x400>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ uart1: uart@01c28400 {
+ compatible = "ns8250";
+ reg = <0x01c28400 0x400>;
+ interrupts = <2>;
+ reg-shift = <2>;
+ clock-frequency = <24000000>;
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig
index f78d259..3d76407 100644
--- a/arch/arm/configs/armadillo800eva_defconfig
+++ b/arch/arm/configs/armadillo800eva_defconfig
@@ -7,6 +7,7 @@
# CONFIG_IPC_NS is not set
# CONFIG_PID_NS is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_PERF_EVENTS=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
new file mode 100644
index 0000000..e3bf2d6
--- /dev/null
+++ b/arch/arm/configs/bcm_defconfig
@@ -0,0 +1,114 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=19
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_BLK_CGROUP=y
+CONFIG_NAMESPACES=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_EFI_PARTITION=y
+CONFIG_ARCH_BCM=y
+CONFIG_ARM_THUMBEE=y
+CONFIG_ARM_ERRATA_743622=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_COMPACTION is not set
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_CMDLINE="console=ttyS0,115200n8 mem=128M"
+CONFIG_CPU_IDLE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_PM_RUNTIME=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_BLK_DEV is not set
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_INPUT_FF_MEMLESS=y
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+# CONFIG_SERIO is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+CONFIG_SERIAL_8250_DW=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+# CONFIG_HWMON is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+CONFIG_FB=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_USB_SUPPORT is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_CONFIGFS_FS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=110
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_LL=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC7=y
+CONFIG_XZ_DEC=y
+CONFIG_AVERAGE=y
diff --git a/arch/arm/configs/clps711x_defconfig b/arch/arm/configs/clps711x_defconfig
new file mode 100644
index 0000000..86209d1
--- /dev/null
+++ b/arch/arm/configs/clps711x_defconfig
@@ -0,0 +1,78 @@
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EMBEDDED=y
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_MSDOS_PARTITION is not set
+CONFIG_ARCH_CLPS711X=y
+CONFIG_ARCH_AUTCPU12=y
+CONFIG_ARCH_CDB89712=y
+CONFIG_ARCH_CLEP7312=y
+CONFIG_ARCH_EDB7211=y
+CONFIG_ARCH_P720T=y
+CONFIG_ARCH_FORTUNET=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IPV6 is not set
+CONFIG_IRDA=y
+CONFIG_IRTTY_SIR=y
+CONFIG_EP7211_DONGLE=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CDB89712=y
+CONFIG_MTD_AUTCPU12=y
+CONFIG_MTD_PLATRAM=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_AMD is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+CONFIG_CS89x0=y
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_FUJITSU is not set
+# CONFIG_NET_VENDOR_HP is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+# CONFIG_WLAN is not set
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_CLPS711X_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+CONFIG_FB=y
+CONFIG_FB_CLPS711X=y
+# CONFIG_USB_SUPPORT is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT2_FS=y
+CONFIG_MINIX_FS=y
+# CONFIG_NETWORK_FILESYSTEMS is not set
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/edb7211_defconfig b/arch/arm/configs/edb7211_defconfig
deleted file mode 100644
index d52ded35..0000000
--- a/arch/arm/configs/edb7211_defconfig
+++ /dev/null
@@ -1,27 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_HOTPLUG is not set
-CONFIG_ARCH_CLPS711X=y
-CONFIG_ARCH_EDB7211=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_NETDEVICES=y
-# CONFIG_INPUT is not set
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_VT is not set
-CONFIG_SERIAL_CLPS711X=y
-CONFIG_SERIAL_CLPS711X_CONSOLE=y
-CONFIG_EXT2_FS=y
-CONFIG_MINIX_FS=y
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_MSDOS_PARTITION is not set
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/fortunet_defconfig b/arch/arm/configs/fortunet_defconfig
deleted file mode 100644
index 840fced..0000000
--- a/arch/arm/configs/fortunet_defconfig
+++ /dev/null
@@ -1,28 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_HOTPLUG is not set
-CONFIG_ARCH_CLPS711X=y
-CONFIG_ARCH_FORTUNET=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_FPE_FASTFPE=y
-CONFIG_BINFMT_AOUT=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_MTD=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_BLK_DEV_RAM=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_CLPS711X=y
-CONFIG_SERIAL_CLPS711X_CONSOLE=y
-CONFIG_EXT2_FS=y
-CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index 78ed575..f71302c 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -18,7 +18,9 @@
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_MXC=y
-CONFIG_ARCH_IMX_V4_V5=y
+CONFIG_ARCH_MULTI_V4T=y
+CONFIG_ARCH_MULTI_V5=y
+# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MX1ADS=y
CONFIG_MACH_SCB9328=y
CONFIG_MACH_APF9328=y
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 394ded6..44f117a 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -17,6 +17,8 @@
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_MXC=y
+CONFIG_ARCH_MULTI_V6=y
+CONFIG_ARCH_MULTI_V7=y
CONFIG_MACH_MX31LILLY=y
CONFIG_MACH_MX31LITE=y
CONFIG_MACH_PCM037=y
diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
index 53382b6..f79b55c 100644
--- a/arch/arm/configs/marzen_defconfig
+++ b/arch/arm/configs/marzen_defconfig
@@ -69,6 +69,8 @@
CONFIG_SERIAL_SH_SCI_NR_UARTS=6
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_RCAR=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 35c1ed8..42f042e 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -64,7 +64,7 @@
static inline void __raw_writew(u16 val, volatile void __iomem *addr)
{
asm volatile("strh %1, %0"
- : "+Qo" (*(volatile u16 __force *)addr)
+ : "+Q" (*(volatile u16 __force *)addr)
: "r" (val));
}
@@ -72,7 +72,7 @@
{
u16 val;
asm volatile("ldrh %1, %0"
- : "+Qo" (*(volatile u16 __force *)addr),
+ : "+Q" (*(volatile u16 __force *)addr),
"=r" (val));
return val;
}
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index 05b8e82..e3f7572 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -10,7 +10,5 @@
extern void sched_clock_postinit(void);
extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
-extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
- unsigned long rate);
#endif
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
index 6a6f1e4..301c1db 100644
--- a/arch/arm/include/asm/vfpmacros.h
+++ b/arch/arm/include/asm/vfpmacros.h
@@ -27,9 +27,9 @@
#if __LINUX_ARM_ARCH__ <= 6
ldr \tmp, =elf_hwcap @ may not have MVFR regs
ldr \tmp, [\tmp, #0]
- tst \tmp, #HWCAP_VFPv3D16
- ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
- addne \base, \base, #32*4 @ step over unused register space
+ tst \tmp, #HWCAP_VFPD32
+ ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
+ addeq \base, \base, #32*4 @ step over unused register space
#else
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
@@ -51,9 +51,9 @@
#if __LINUX_ARM_ARCH__ <= 6
ldr \tmp, =elf_hwcap @ may not have MVFR regs
ldr \tmp, [\tmp, #0]
- tst \tmp, #HWCAP_VFPv3D16
- stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
- addne \base, \base, #32*4 @ step over unused register space
+ tst \tmp, #HWCAP_VFPD32
+ stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
+ addeq \base, \base, #32*4 @ step over unused register space
#else
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S
new file mode 100644
index 0000000..0b65d79
--- /dev/null
+++ b/arch/arm/include/debug/imx.S
@@ -0,0 +1,62 @@
+/* arch/arm/mach-imx/include/mach/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ * Copyright (C) 1994-1999 Russell King
+ * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifdef CONFIG_DEBUG_IMX1_UART
+#define UART_PADDR 0x00206000
+#elif defined (CONFIG_DEBUG_IMX25_UART)
+#define UART_PADDR 0x43f90000
+#elif defined (CONFIG_DEBUG_IMX21_IMX27_UART)
+#define UART_PADDR 0x1000a000
+#elif defined (CONFIG_DEBUG_IMX31_IMX35_UART)
+#define UART_PADDR 0x43f90000
+#elif defined (CONFIG_DEBUG_IMX51_UART)
+#define UART_PADDR 0x73fbc000
+#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
+#define UART_PADDR 0x53fbc000
+#elif defined (CONFIG_DEBUG_IMX6Q_UART2)
+#define UART_PADDR 0x021e8000
+#elif defined (CONFIG_DEBUG_IMX6Q_UART4)
+#define UART_PADDR 0x021f0000
+#endif
+
+/*
+ * FIXME: This is a copy of IMX_IO_P2V in hardware.h, and needs to
+ * stay sync with that. It's hard to maintain, and should be fixed
+ * globally for multi-platform build to use a fixed virtual address
+ * for low-level debug uart port across platforms.
+ */
+#define IMX_IO_P2V(x) ( \
+ (((x) & 0x80000000) >> 7) | \
+ (0xf4000000 + \
+ (((x) & 0x50000000) >> 6) + \
+ (((x) & 0x0b000000) >> 4) + \
+ (((x) & 0x000fffff))))
+
+#define UART_VADDR IMX_IO_P2V(UART_PADDR)
+
+ .macro addruart, rp, rv, tmp
+ ldr \rp, =UART_PADDR @ physical
+ ldr \rv, =UART_VADDR @ virtual
+ .endm
+
+ .macro senduart,rd,rx
+ str \rd, [\rx, #0x40] @ TXDATA
+ .endm
+
+ .macro waituart,rd,rx
+ .endm
+
+ .macro busyuart,rd,rx
+1002: ldr \rd, [\rx, #0x98] @ SR2
+ tst \rd, #1 << 3 @ TXDC
+ beq 1002b @ wait until transmit done
+ .endm
diff --git a/arch/arm/include/debug/sunxi.S b/arch/arm/include/debug/sunxi.S
new file mode 100644
index 0000000..3bf61ca
--- /dev/null
+++ b/arch/arm/include/debug/sunxi.S
@@ -0,0 +1,24 @@
+/*
+ * Early serial output macro for Allwinner A1X SoCs
+ *
+ * Copyright (C) 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifdef CONFIG_DEBUG_SUNXI_UART1
+#define SUNXI_UART_DEBUG_PHYS_BASE 0x01c28400
+#define SUNXI_UART_DEBUG_VIRT_BASE 0xf1c28400
+#endif
+
+ .macro addruart, rp, rv, tmp
+ ldr \rp, =SUNXI_UART_DEBUG_PHYS_BASE
+ ldr \rv, =SUNXI_UART_DEBUG_VIRT_BASE
+ .endm
+
+#define UART_SHIFT 2
+#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h
index f254f65..3688fd1 100644
--- a/arch/arm/include/uapi/asm/hwcap.h
+++ b/arch/arm/include/uapi/asm/hwcap.h
@@ -18,11 +18,12 @@
#define HWCAP_THUMBEE (1 << 11)
#define HWCAP_NEON (1 << 12)
#define HWCAP_VFPv3 (1 << 13)
-#define HWCAP_VFPv3D16 (1 << 14)
+#define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
#define HWCAP_TLS (1 << 15)
#define HWCAP_VFPv4 (1 << 16)
#define HWCAP_IDIVA (1 << 17)
#define HWCAP_IDIVT (1 << 18)
+#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index e21bac2..fc6692e 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -107,13 +107,6 @@
update_sched_clock();
}
-void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
- unsigned long rate)
-{
- setup_sched_clock(read, bits, rate);
- cd.needs_suspend = true;
-}
-
void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
{
unsigned long r, w;
@@ -189,18 +182,15 @@
static int sched_clock_suspend(void)
{
sched_clock_poll(sched_clock_timer.data);
- if (cd.needs_suspend)
- cd.suspended = true;
+ cd.suspended = true;
return 0;
}
static void sched_clock_resume(void)
{
- if (cd.needs_suspend) {
- cd.epoch_cyc = read_sched_clock();
- cd.epoch_cyc_copy = cd.epoch_cyc;
- cd.suspended = false;
- }
+ cd.epoch_cyc = read_sched_clock();
+ cd.epoch_cyc_copy = cd.epoch_cyc;
+ cd.suspended = false;
}
static struct syscore_ops sched_clock_ops = {
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index b22d700..999aa48 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -366,10 +366,8 @@
int err;
np = of_find_matching_node(NULL, twd_of_match);
- if (!np) {
- err = -ENODEV;
- goto out;
- }
+ if (!np)
+ return;
twd_ppi = irq_of_parse_and_map(np, 0);
if (!twd_ppi) {
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
new file mode 100644
index 0000000..48705c1
--- /dev/null
+++ b/arch/arm/mach-bcm/Kconfig
@@ -0,0 +1,19 @@
+config ARCH_BCM
+ bool "Broadcom SoC" if ARCH_MULTI_V7
+ depends on MMU
+ select ARCH_REQUIRE_GPIOLIB
+ select ARM_ERRATA_754322
+ select ARM_ERRATA_764369 if SMP
+ select ARM_GIC
+ select CPU_V7
+ select GENERIC_CLOCKEVENTS
+ select GENERIC_GPIO
+ select GENERIC_TIME
+ select GPIO_BCM
+ select SPARSE_IRQ
+ select TICK_ONESHOT
+ help
+ This enables support for system based on Broadcom SoCs.
+ It currently supports the 'BCM281XX' family, which includes
+ BCM11130, BCM11140, BCM11351, BCM28145 and
+ BCM28155 variants.
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
new file mode 100644
index 0000000..bbf4122
--- /dev/null
+++ b/arch/arm/mach-bcm/Makefile
@@ -0,0 +1,13 @@
+#
+# Copyright (C) 2012 Broadcom Corporation
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation version 2.
+#
+# This program is distributed "as is" WITHOUT ANY WARRANTY of any
+# kind, whether express or implied; without even the implied warranty
+# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+
+obj-$(CONFIG_ARCH_BCM) := board_bcm.o
diff --git a/arch/arm/mach-bcm/board_bcm.c b/arch/arm/mach-bcm/board_bcm.c
new file mode 100644
index 0000000..3a62f1b
--- /dev/null
+++ b/arch/arm/mach-bcm/board_bcm.c
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2012 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
+
+#include <asm/mach/time.h>
+
+static const struct of_device_id irq_match[] = {
+ {.compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+ {}
+};
+
+static void timer_init(void)
+{
+}
+
+static struct sys_timer timer = {
+ .init = timer_init,
+};
+
+static void __init init_irq(void)
+{
+ of_irq_init(irq_match);
+}
+
+static void __init board_init(void)
+{
+ of_platform_populate(NULL, of_default_bus_match_table, NULL,
+ &platform_bus);
+}
+
+static const char * const bcm11351_dt_compat[] = { "bcm,bcm11351", NULL, };
+
+DT_MACHINE_START(BCM11351_DT, "Broadcom Application Processor")
+ .init_irq = init_irq,
+ .timer = &timer,
+ .init_machine = board_init,
+ .dt_compat = bcm11351_dt_compat,
+ .handle_irq = gic_handle_irq,
+MACHINE_END
diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile
index 6da6940..9cf2d1c 100644
--- a/arch/arm/mach-clps711x/Makefile
+++ b/arch/arm/mach-clps711x/Makefile
@@ -12,6 +12,6 @@
obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o
obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o
obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o
-obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o
+obj-$(CONFIG_ARCH_EDB7211) += edb7211.o
obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o
obj-$(CONFIG_ARCH_P720T) += p720t.o
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index 3287191..214547b 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -39,19 +39,10 @@
#include "common.h"
-/*
- * The on-chip registers are given a size of 1MB so that a section can
- * be used to map them; this saves a page table. This is the place to
- * add mappings for ROM, expansion memory, PCMCIA, etc. (if static
- * mappings are chosen for those areas).
- *
-*/
-
static struct map_desc autcpu12_io_desc[] __initdata = {
- /* memory-mapped extra io and CS8900A Ethernet chip */
- /* ethernet chip */
- {
- .virtual = AUTCPU12_VIRT_CS8900A,
+ /* Memory-mapped extra io and CS8900A Ethernet chip */
+ {
+ .virtual = IO_ADDRESS(AUTCPU12_PHYS_CS8900A),
.pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A),
.length = SZ_1M,
.type = MT_DEVICE
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c
index c314f49..d90d25c 100644
--- a/arch/arm/mach-clps711x/cdb89712.c
+++ b/arch/arm/mach-clps711x/cdb89712.c
@@ -40,8 +40,8 @@
*/
static struct map_desc cdb89712_io_desc[] __initdata = {
{
- .virtual = ETHER_BASE,
- .pfn =__phys_to_pfn(ETHER_START),
+ .virtual = IO_ADDRESS(ETHER_PHYS_BASE),
+ .pfn = __phys_to_pfn(ETHER_PHYS_BASE),
.length = ETHER_SIZE,
.type = MT_DEVICE
}
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index 509243d..286d6e6 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -21,13 +21,14 @@
*/
#include <linux/io.h>
#include <linux/init.h>
+#include <linux/sizes.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
+#include <linux/clockchips.h>
#include <linux/clk-provider.h>
-#include <asm/sizes.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <asm/system_misc.h>
@@ -36,7 +37,6 @@
static struct clk *clk_pll, *clk_bus, *clk_uart, *clk_timerl, *clk_timerh,
*clk_tint, *clk_spi;
-static unsigned long latch;
/*
* This maps the generic CLPS711x registers
@@ -45,7 +45,7 @@
{
.virtual = (unsigned long)CLPS711X_VIRT_BASE,
.pfn = __phys_to_pfn(CLPS711X_PHYS_BASE),
- .length = SZ_1M,
+ .length = SZ_64K,
.type = MT_DEVICE
}
};
@@ -66,6 +66,10 @@
static void int1_ack(struct irq_data *d)
{
+}
+
+static void int1_eoi(struct irq_data *d)
+{
switch (d->irq) {
case IRQ_CSINT: clps_writel(0, COEOI); break;
case IRQ_TC1OI: clps_writel(0, TC1EOI); break;
@@ -86,7 +90,9 @@
}
static struct irq_chip int1_chip = {
+ .name = "Interrupt Vector 1 ",
.irq_ack = int1_ack,
+ .irq_eoi = int1_eoi,
.irq_mask = int1_mask,
.irq_unmask = int1_unmask,
};
@@ -102,6 +108,10 @@
static void int2_ack(struct irq_data *d)
{
+}
+
+static void int2_eoi(struct irq_data *d)
+{
switch (d->irq) {
case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
}
@@ -117,73 +127,93 @@
}
static struct irq_chip int2_chip = {
+ .name = "Interrupt Vector 2 ",
.irq_ack = int2_ack,
+ .irq_eoi = int2_eoi,
.irq_mask = int2_mask,
.irq_unmask = int2_unmask,
};
+struct clps711x_irqdesc {
+ int nr;
+ struct irq_chip *chip;
+ irq_flow_handler_t handle;
+};
+
+static struct clps711x_irqdesc clps711x_irqdescs[] __initdata = {
+ { IRQ_CSINT, &int1_chip, handle_fasteoi_irq, },
+ { IRQ_EINT1, &int1_chip, handle_level_irq, },
+ { IRQ_EINT2, &int1_chip, handle_level_irq, },
+ { IRQ_EINT3, &int1_chip, handle_level_irq, },
+ { IRQ_TC1OI, &int1_chip, handle_fasteoi_irq, },
+ { IRQ_TC2OI, &int1_chip, handle_fasteoi_irq, },
+ { IRQ_RTCMI, &int1_chip, handle_fasteoi_irq, },
+ { IRQ_TINT, &int1_chip, handle_fasteoi_irq, },
+ { IRQ_UTXINT1, &int1_chip, handle_level_irq, },
+ { IRQ_URXINT1, &int1_chip, handle_level_irq, },
+ { IRQ_UMSINT, &int1_chip, handle_fasteoi_irq, },
+ { IRQ_SSEOTI, &int1_chip, handle_level_irq, },
+ { IRQ_KBDINT, &int2_chip, handle_fasteoi_irq, },
+ { IRQ_SS2RX, &int2_chip, handle_level_irq, },
+ { IRQ_SS2TX, &int2_chip, handle_level_irq, },
+ { IRQ_UTXINT2, &int2_chip, handle_level_irq, },
+ { IRQ_URXINT2, &int2_chip, handle_level_irq, },
+};
+
void __init clps711x_init_irq(void)
{
unsigned int i;
- for (i = 0; i < NR_IRQS; i++) {
- if (INT1_IRQS & (1 << i)) {
- irq_set_chip_and_handler(i, &int1_chip,
- handle_level_irq);
- set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
- }
- if (INT2_IRQS & (1 << i)) {
- irq_set_chip_and_handler(i, &int2_chip,
- handle_level_irq);
- set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
- }
- }
-
- /*
- * Disable interrupts
- */
+ /* Disable interrupts */
clps_writel(0, INTMR1);
clps_writel(0, INTMR2);
+ clps_writel(0, INTMR3);
- /*
- * Clear down any pending interrupts
- */
+ /* Clear down any pending interrupts */
+ clps_writel(0, BLEOI);
+ clps_writel(0, MCEOI);
clps_writel(0, COEOI);
clps_writel(0, TC1EOI);
clps_writel(0, TC2EOI);
clps_writel(0, RTCEOI);
clps_writel(0, TEOI);
clps_writel(0, UMSEOI);
- clps_writel(0, SYNCIO);
clps_writel(0, KBDEOI);
+ clps_writel(0, SRXEOF);
+ clps_writel(0xffffffff, DAISR);
+
+ for (i = 0; i < ARRAY_SIZE(clps711x_irqdescs); i++) {
+ irq_set_chip_and_handler(clps711x_irqdescs[i].nr,
+ clps711x_irqdescs[i].chip,
+ clps711x_irqdescs[i].handle);
+ set_irq_flags(clps711x_irqdescs[i].nr,
+ IRQF_VALID | IRQF_PROBE);
+ }
}
-/*
- * gettimeoffset() returns time since last timer tick, in usecs.
- *
- * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
- * 'tick' is usecs per jiffy.
- */
-static unsigned long clps711x_gettimeoffset(void)
+static void clps711x_clockevent_set_mode(enum clock_event_mode mode,
+ struct clock_event_device *evt)
{
- unsigned long hwticks;
- hwticks = latch - (clps_readl(TC2D) & 0xffff);
- return (hwticks * (tick_nsec / 1000)) / latch;
}
-/*
- * IRQ handler for the timer
- */
-static irqreturn_t p720t_timer_interrupt(int irq, void *dev_id)
+static struct clock_event_device clockevent_clps711x = {
+ .name = "CLPS711x Clockevents",
+ .rating = 300,
+ .features = CLOCK_EVT_FEAT_PERIODIC,
+ .set_mode = clps711x_clockevent_set_mode,
+};
+
+static irqreturn_t clps711x_timer_interrupt(int irq, void *dev_id)
{
- timer_tick();
+ clockevent_clps711x.event_handler(&clockevent_clps711x);
+
return IRQ_HANDLED;
}
static struct irqaction clps711x_timer_irq = {
.name = "CLPS711x Timer Tick",
.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
- .handler = p720t_timer_interrupt,
+ .handler = clps711x_timer_interrupt,
};
static void add_fixed_clk(struct clk *clk, const char *name, int rate)
@@ -244,20 +274,19 @@
pr_info("CPU frequency set at %i Hz.\n", cpu);
- latch = (timh + HZ / 2) / HZ;
+ clps_writew(DIV_ROUND_CLOSEST(timh, HZ), TC2D);
tmp = clps_readl(SYSCON1);
tmp |= SYSCON1_TC2S | SYSCON1_TC2M;
clps_writel(tmp, SYSCON1);
- clps_writel(latch - 1, TC2D);
+ clockevents_config_and_register(&clockevent_clps711x, timh, 1, 0xffff);
setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
}
struct sys_timer clps711x_timer = {
.init = clps711x_timer_init,
- .offset = clps711x_gettimeoffset,
};
void clps711x_restart(char mode, const char *cmd)
diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211-arch.c
deleted file mode 100644
index 5fad0b4..0000000
--- a/arch/arm/mach-clps711x/edb7211-arch.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * linux/arch/arm/mach-clps711x/arch-edb7211.c
- *
- * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/init.h>
-#include <linux/memblock.h>
-#include <linux/types.h>
-#include <linux/string.h>
-
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include "common.h"
-
-extern void edb7211_map_io(void);
-
-/* Reserve screen memory region at the start of main system memory. */
-static void __init edb7211_reserve(void)
-{
- memblock_reserve(PHYS_OFFSET, 0x00020000);
-}
-
-static void __init
-fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi)
-{
- /*
- * Bank start addresses are not present in the information
- * passed in from the boot loader. We could potentially
- * detect them, but instead we hard-code them.
- *
- * Banks sizes _are_ present in the param block, but we're
- * not using that information yet.
- */
- mi->bank[0].start = 0xc0000000;
- mi->bank[0].size = 8*1024*1024;
- mi->bank[1].start = 0xc1000000;
- mi->bank[1].size = 8*1024*1024;
- mi->nr_banks = 2;
-}
-
-MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
- /* Maintainer: Jon McClintock */
- .atag_offset = 0x20100, /* 0xc0000000 - 0xc001ffff can be video RAM */
- .fixup = fixup_edb7211,
- .map_io = edb7211_map_io,
- .reserve = edb7211_reserve,
- .init_irq = clps711x_init_irq,
- .timer = &clps711x_timer,
- .restart = clps711x_restart,
-MACHINE_END
diff --git a/arch/arm/mach-clps711x/edb7211-mm.c b/arch/arm/mach-clps711x/edb7211-mm.c
deleted file mode 100644
index 4372f06..0000000
--- a/arch/arm/mach-clps711x/edb7211-mm.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * linux/arch/arm/mach-clps711x/mm.c
- *
- * Extra MM routines for the EDB7211 board
- *
- * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/bug.h>
-
-#include <mach/hardware.h>
-#include <asm/page.h>
-#include <asm/sizes.h>
-
-#include <asm/mach/map.h>
-
-extern void clps711x_map_io(void);
-
-/*
- * The on-chip registers are given a size of 1MB so that a section can
- * be used to map them; this saves a page table. This is the place to
- * add mappings for ROM, expansion memory, PCMCIA, etc. (if static
- * mappings are chosen for those areas).
- *
- * Here is a physical memory map (to be fleshed out later):
- *
- * Physical Address Size Description
- * ----------------- ----- ---------------------------------
- * c0000000-c001ffff 128KB reserved for video RAM [1]
- * c0020000-c0023fff 16KB parameters (see Documentation/arm/Setup)
- * c0024000-c0027fff 16KB swapper_pg_dir (task 0 page directory)
- * c0028000-... kernel image (TEXTADDR)
- *
- * [1] Unused pages should be given back to the VM; they are not yet.
- * The parameter block should also be released (not sure if this
- * happens).
- */
-static struct map_desc edb7211_io_desc[] __initdata = {
- { /* memory-mapped extra keyboard row */
- .virtual = EP7211_VIRT_EXTKBD,
- .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD),
- .length = SZ_1M,
- .type = MT_DEVICE,
- }, { /* and CS8900A Ethernet chip */
- .virtual = EP7211_VIRT_CS8900A,
- .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A),
- .length = SZ_1M,
- .type = MT_DEVICE,
- }, { /* flash banks */
- .virtual = EP7211_VIRT_FLASH1,
- .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1),
- .length = SZ_8M,
- .type = MT_DEVICE,
- }, {
- .virtual = EP7211_VIRT_FLASH2,
- .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2),
- .length = SZ_8M,
- .type = MT_DEVICE,
- }
-};
-
-void __init edb7211_map_io(void)
-{
- clps711x_map_io();
- iotable_init(edb7211_io_desc, ARRAY_SIZE(edb7211_io_desc));
-}
-
diff --git a/arch/arm/mach-clps711x/edb7211.c b/arch/arm/mach-clps711x/edb7211.c
new file mode 100644
index 0000000..88f4690
--- /dev/null
+++ b/arch/arm/mach-clps711x/edb7211.c
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/memblock.h>
+#include <linux/types.h>
+
+#include <asm/setup.h>
+#include <asm/mach/map.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+
+#include <mach/hardware.h>
+
+#include "common.h"
+
+#define VIDEORAM_SIZE SZ_128K
+
+static struct map_desc edb7211_io_desc[] __initdata = {
+ { /* Memory-mapped extra keyboard row */
+ .virtual = IO_ADDRESS(EP7211_PHYS_EXTKBD),
+ .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD),
+ .length = SZ_1M,
+ .type = MT_DEVICE,
+ }, { /* CS8900A Ethernet chip */
+ .virtual = IO_ADDRESS(EP7211_PHYS_CS8900A),
+ .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A),
+ .length = SZ_1M,
+ .type = MT_DEVICE,
+ }, { /* Flash bank 0 */
+ .virtual = IO_ADDRESS(EP7211_PHYS_FLASH1),
+ .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1),
+ .length = SZ_8M,
+ .type = MT_DEVICE,
+ }, { /* Flash bank 1 */
+ .virtual = IO_ADDRESS(EP7211_PHYS_FLASH2),
+ .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2),
+ .length = SZ_8M,
+ .type = MT_DEVICE,
+ },
+};
+
+void __init edb7211_map_io(void)
+{
+ clps711x_map_io();
+ iotable_init(edb7211_io_desc, ARRAY_SIZE(edb7211_io_desc));
+}
+
+/* Reserve screen memory region at the start of main system memory. */
+static void __init edb7211_reserve(void)
+{
+ memblock_reserve(PHYS_OFFSET, VIDEORAM_SIZE);
+}
+
+static void __init
+fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi)
+{
+ /*
+ * Bank start addresses are not present in the information
+ * passed in from the boot loader. We could potentially
+ * detect them, but instead we hard-code them.
+ *
+ * Banks sizes _are_ present in the param block, but we're
+ * not using that information yet.
+ */
+ mi->bank[0].start = 0xc0000000;
+ mi->bank[0].size = SZ_8M;
+ mi->bank[1].start = 0xc1000000;
+ mi->bank[1].size = SZ_8M;
+ mi->nr_banks = 2;
+}
+
+MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
+ /* Maintainer: Jon McClintock */
+ .atag_offset = VIDEORAM_SIZE + 0x100,
+ .fixup = fixup_edb7211,
+ .map_io = edb7211_map_io,
+ .reserve = edb7211_reserve,
+ .init_irq = clps711x_init_irq,
+ .timer = &clps711x_timer,
+ .restart = clps711x_restart,
+MACHINE_END
diff --git a/arch/arm/mach-clps711x/include/mach/autcpu12.h b/arch/arm/mach-clps711x/include/mach/autcpu12.h
index 1588a36..f95ce6f 100644
--- a/arch/arm/mach-clps711x/include/mach/autcpu12.h
+++ b/arch/arm/mach-clps711x/include/mach/autcpu12.h
@@ -20,12 +20,8 @@
#ifndef __ASM_ARCH_AUTCPU12_H
#define __ASM_ARCH_AUTCPU12_H
-/*
- * The CS8900A ethernet chip has its I/O registers wired to chip select 2
- * (nCS2). This is the mapping for it.
- */
-#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE /* physical */
-#define AUTCPU12_VIRT_CS8900A (0xfe000000) /* virtual */
+/* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */
+#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE
/*
* The flash bank is wired to chip select 0
@@ -34,11 +30,9 @@
/* offset for device specific information structure */
#define AUTCPU12_LCDINFO_OFFS (0x00010000)
-/*
-* Videomemory is the internal SRAM (CS 6)
-*/
+
+/* Videomemory in the internal SRAM (CS 6) */
#define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE
-#define AUTCPU12_VIRT_VIDEO (0xfd000000)
/*
* All special IO's are tied to CS1
diff --git a/arch/arm/mach-clps711x/include/mach/clps711x.h b/arch/arm/mach-clps711x/include/mach/clps711x.h
index c82e21c..aee352c 100644
--- a/arch/arm/mach-clps711x/include/mach/clps711x.h
+++ b/arch/arm/mach-clps711x/include/mach/clps711x.h
@@ -257,6 +257,9 @@
#define MEMCFG_BUS_WIDTH_16 (0)
#define MEMCFG_BUS_WIDTH_8 (3)
+#define MEMCFG_SQAEN (1 << 6)
+#define MEMCFG_CLKENB (1 << 7)
+
#define MEMCFG_WAITSTATE_8_3 (0 << 2)
#define MEMCFG_WAITSTATE_7_3 (1 << 2)
#define MEMCFG_WAITSTATE_6_3 (2 << 2)
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h
index 8497775..0a3df25 100644
--- a/arch/arm/mach-clps711x/include/mach/hardware.h
+++ b/arch/arm/mach-clps711x/include/mach/hardware.h
@@ -24,7 +24,10 @@
#include <mach/clps711x.h>
-#define CLPS711X_VIRT_BASE IOMEM(0xff000000)
+#define IO_ADDRESS(x) (0xdc000000 + (((x) & 0x03ffffff) | \
+ (((x) >> 2) & 0x3c000000)))
+
+#define CLPS711X_VIRT_BASE IOMEM(IO_ADDRESS(CLPS711X_PHYS_BASE))
#ifndef __ASSEMBLY__
#define clps_readb(off) readb(CLPS711X_VIRT_BASE + (off))
@@ -61,58 +64,25 @@
#define CS7_PHYS_BASE (0x00000000)
#endif
-#define SYSPLD_VIRT_BASE 0xfe000000
-#define SYSPLD_BASE SYSPLD_VIRT_BASE
-
#if defined (CONFIG_ARCH_CDB89712)
-#define ETHER_START 0x20000000
-#define ETHER_SIZE 0x1000
-#define ETHER_BASE 0xfe000000
+#define ETHER_PHYS_BASE CS2_PHYS_BASE
+#define ETHER_SIZE 0x1000
#endif
#if defined (CONFIG_ARCH_EDB7211)
-/*
- * The extra 8 lines of the keyboard matrix are wired to chip select 3 (nCS3)
- * and repeat across it. This is the mapping for it.
- *
- * In jumpered boot mode, nCS3 is mapped to 0x4000000, not 0x3000000. This
- * was cause for much consternation and headscratching. This should probably
- * be made a compile/run time kernel option.
- */
-#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE /* physical */
+/* The extra 8 lines of the keyboard matrix are wired to chip select 3 */
+#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE
-#define EP7211_VIRT_EXTKBD (0xfd000000) /* virtual */
+/* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */
+#define EP7211_PHYS_CS8900A CS2_PHYS_BASE
-
-/*
- * The CS8900A ethernet chip has its I/O registers wired to chip select 2
- * (nCS2). This is the mapping for it.
- *
- * In jumpered boot mode, nCS2 is mapped to 0x5000000, not 0x2000000. This
- * was cause for much consternation and headscratching. This should probably
- * be made a compile/run time kernel option.
- */
-#define EP7211_PHYS_CS8900A CS2_PHYS_BASE /* physical */
-
-#define EP7211_VIRT_CS8900A (0xfc000000) /* virtual */
-
-
-/*
- * The two flash banks are wired to chip selects 0 and 1. This is the mapping
- * for them.
- *
- * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running
- * in jumpered boot mode.
- */
-#define EP7211_PHYS_FLASH1 CS0_PHYS_BASE /* physical */
-#define EP7211_PHYS_FLASH2 CS1_PHYS_BASE /* physical */
-
-#define EP7211_VIRT_FLASH1 (0xfa000000) /* virtual */
-#define EP7211_VIRT_FLASH2 (0xfb000000) /* virtual */
+/* The two flash banks are wired to chip selects 0 and 1 */
+#define EP7211_PHYS_FLASH1 CS0_PHYS_BASE
+#define EP7211_PHYS_FLASH2 CS1_PHYS_BASE
#endif /* CONFIG_ARCH_EDB7211 */
diff --git a/arch/arm/mach-clps711x/include/mach/irqs.h b/arch/arm/mach-clps711x/include/mach/irqs.h
index 14d215f..1ea56db 100644
--- a/arch/arm/mach-clps711x/include/mach/irqs.h
+++ b/arch/arm/mach-clps711x/include/mach/irqs.h
@@ -34,8 +34,6 @@
#define IRQ_UMSINT 14
#define IRQ_SSEOTI 15
-#define INT1_IRQS (0x0000fff0)
-
/*
* Interrupts from INTSR2
*/
@@ -45,6 +43,4 @@
#define IRQ_UTXINT2 (16+12) /* bit 12 */
#define IRQ_URXINT2 (16+13) /* bit 13 */
-#define INT2_IRQS (0x30070000)
-
#define NR_IRQS 30
diff --git a/arch/arm/mach-clps711x/include/mach/syspld.h b/arch/arm/mach-clps711x/include/mach/syspld.h
index f7f4c12..9a43315 100644
--- a/arch/arm/mach-clps711x/include/mach/syspld.h
+++ b/arch/arm/mach-clps711x/include/mach/syspld.h
@@ -23,14 +23,9 @@
#define __ASM_ARCH_SYSPLD_H
#define SYSPLD_PHYS_BASE (0x10000000)
+#define SYSPLD_VIRT_BASE IO_ADDRESS(SYSPLD_PHYS_BASE)
-#ifndef __ASSEMBLY__
-#include <asm/types.h>
-
-#define SYSPLD_REG(type,off) (*(volatile type *)(SYSPLD_BASE + off))
-#else
-#define SYSPLD_REG(type,off) (off)
-#endif
+#define SYSPLD_REG(type, off) (*(volatile type *)(SYSPLD_VIRT_BASE + (off)))
#define PLD_INT SYSPLD_REG(u32, 0x000000)
#define PLD_INT_PENIRQ (1 << 5)
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index b752b58..dd89950 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -36,27 +36,19 @@
#include <asm/mach/map.h>
#include <mach/syspld.h>
-#include <asm/hardware/clps7111.h>
-
#include "common.h"
/*
- * Map the P720T system PLD. It occupies two address spaces:
- * SYSPLD_PHYS_BASE and SYSPLD_PHYS_BASE + 0x00400000
- * We map both here.
+ * Map the P720T system PLD. It occupies two address spaces:
+ * 0x10000000 and 0x10400000. We map both regions as one.
*/
static struct map_desc p720t_io_desc[] __initdata = {
{
.virtual = SYSPLD_VIRT_BASE,
.pfn = __phys_to_pfn(SYSPLD_PHYS_BASE),
- .length = SZ_1M,
- .type = MT_DEVICE
- }, {
- .virtual = 0xfe400000,
- .pfn = __phys_to_pfn(0x10400000),
- .length = SZ_1M,
- .type = MT_DEVICE
- }
+ .length = SZ_8M,
+ .type = MT_DEVICE,
+ },
};
static void __init
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 88ebea8..cdf8d07 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -324,7 +324,7 @@
if (IS_ERR(aemif))
WARN("%s: unable to get AEMIF clock\n", __func__);
else
- clk_enable(aemif);
+ clk_prepare_enable(aemif);
platform_add_devices(davinci_evm_devices,
ARRAY_SIZE(davinci_evm_devices));
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index 2f88103..d419545 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -246,7 +246,7 @@
if (IS_ERR(aemif))
WARN("%s: unable to get AEMIF clock\n", __func__);
else
- clk_enable(aemif);
+ clk_prepare_enable(aemif);
platform_add_devices(davinci_leopard_devices,
ARRAY_SIZE(davinci_leopard_devices));
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 1b4a8ad..5d49c75 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -478,7 +478,7 @@
aemif_clk = clk_get(NULL, "aemif");
if (IS_ERR(aemif_clk))
return;
- clk_enable(aemif_clk);
+ clk_prepare_enable(aemif_clk);
if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE,
"cpld") == NULL)
@@ -489,7 +489,7 @@
SECTION_SIZE);
fail:
pr_err("ERROR: can't map CPLD\n");
- clk_disable(aemif_clk);
+ clk_disable_unprepare(aemif_clk);
return;
}
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index f22572ce..a84dfcb 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -776,7 +776,7 @@
struct davinci_soc_info *soc_info = &davinci_soc_info;
aemif_clk = clk_get(NULL, "aemif");
- clk_enable(aemif_clk);
+ clk_prepare_enable(aemif_clk);
if (HAS_ATA) {
if (HAS_NAND || HAS_NOR)
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 144bf31..3e3e3af 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -188,7 +188,7 @@
struct davinci_soc_info *soc_info = &davinci_soc_info;
aemif_clk = clk_get(NULL, "aemif");
- clk_enable(aemif_clk);
+ clk_prepare_enable(aemif_clk);
if (HAS_ATA) {
if (HAS_NAND)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index b90c172..68c5fe0 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -212,6 +212,12 @@
.flags = ALWAYS_ENABLED,
};
+static struct clk pruss_clk = {
+ .name = "pruss",
+ .parent = &pll0_sysclk2,
+ .lpsc = DA8XX_LPSC0_PRUSS,
+};
+
static struct clk uart0_clk = {
.name = "uart0",
.parent = &pll0_sysclk2,
@@ -385,6 +391,7 @@
CLK(NULL, "tptc1", &tptc1_clk),
CLK(NULL, "tpcc1", &tpcc1_clk),
CLK(NULL, "tptc2", &tptc2_clk),
+ CLK("pruss_uio", "pruss", &pruss_clk),
CLK(NULL, "uart0", &uart0_clk),
CLK(NULL, "uart1", &uart1_clk),
CLK(NULL, "uart2", &uart2_clk),
@@ -781,12 +788,6 @@
.length = DA8XX_CP_INTC_SIZE,
.type = MT_DEVICE
},
- {
- .virtual = SRAM_VIRT,
- .pfn = __phys_to_pfn(DA8XX_ARM_RAM_BASE),
- .length = SZ_8K,
- .type = MT_DEVICE
- },
};
static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };
@@ -1239,8 +1240,8 @@
.gpio_irq = IRQ_DA8XX_GPIO0,
.serial_dev = &da8xx_serial_device,
.emac_pdata = &da8xx_emac_pdata,
- .sram_dma = DA8XX_ARM_RAM_BASE,
- .sram_len = SZ_8K,
+ .sram_dma = DA8XX_SHARED_RAM_BASE,
+ .sram_len = SZ_128K,
};
void __init da850_init(void)
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index bd2f72b..46c9a0c 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -22,6 +22,7 @@
#include <mach/time.h>
#include <mach/da8xx.h>
#include <mach/cpuidle.h>
+#include <mach/sram.h>
#include "clock.h"
#include "asp.h"
@@ -32,6 +33,7 @@
#define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */
#define DA8XX_I2C0_BASE 0x01c22000
#define DA8XX_RTC_BASE 0x01c23000
+#define DA8XX_PRUSS_MEM_BASE 0x01c30000
#define DA8XX_MMCSD0_BASE 0x01c40000
#define DA8XX_SPI0_BASE 0x01c41000
#define DA830_SPI1_BASE 0x01e12000
@@ -518,6 +520,75 @@
}
}
+static struct resource da8xx_pruss_resources[] = {
+ {
+ .start = DA8XX_PRUSS_MEM_BASE,
+ .end = DA8XX_PRUSS_MEM_BASE + 0xFFFF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = IRQ_DA8XX_EVTOUT0,
+ .end = IRQ_DA8XX_EVTOUT0,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = IRQ_DA8XX_EVTOUT1,
+ .end = IRQ_DA8XX_EVTOUT1,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = IRQ_DA8XX_EVTOUT2,
+ .end = IRQ_DA8XX_EVTOUT2,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = IRQ_DA8XX_EVTOUT3,
+ .end = IRQ_DA8XX_EVTOUT3,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = IRQ_DA8XX_EVTOUT4,
+ .end = IRQ_DA8XX_EVTOUT4,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = IRQ_DA8XX_EVTOUT5,
+ .end = IRQ_DA8XX_EVTOUT5,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = IRQ_DA8XX_EVTOUT6,
+ .end = IRQ_DA8XX_EVTOUT6,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = IRQ_DA8XX_EVTOUT7,
+ .end = IRQ_DA8XX_EVTOUT7,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct uio_pruss_pdata da8xx_uio_pruss_pdata = {
+ .pintc_base = 0x4000,
+};
+
+static struct platform_device da8xx_uio_pruss_dev = {
+ .name = "pruss_uio",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(da8xx_pruss_resources),
+ .resource = da8xx_pruss_resources,
+ .dev = {
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &da8xx_uio_pruss_pdata,
+ }
+};
+
+int __init da8xx_register_uio_pruss(void)
+{
+ da8xx_uio_pruss_pdata.sram_pool = sram_get_gen_pool();
+ return platform_device_register(&da8xx_uio_pruss_dev);
+}
+
static const struct display_panel disp_panel = {
QVGA,
16,
@@ -900,7 +971,7 @@
if (IS_ERR(da850_sata_clk))
return PTR_ERR(da850_sata_clk);
- ret = clk_enable(da850_sata_clk);
+ ret = clk_prepare_enable(da850_sata_clk);
if (ret)
goto err0;
@@ -931,7 +1002,7 @@
return 0;
err1:
- clk_disable(da850_sata_clk);
+ clk_disable_unprepare(da850_sata_clk);
err0:
clk_put(da850_sata_clk);
return ret;
@@ -939,7 +1010,7 @@
static void da850_sata_exit(struct device *dev)
{
- clk_disable(da850_sata_clk);
+ clk_disable_unprepare(da850_sata_clk);
clk_put(da850_sata_clk);
}
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index a255434..b49c3b7 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -758,12 +758,6 @@
.length = IO_SIZE,
.type = MT_DEVICE
},
- {
- .virtual = SRAM_VIRT,
- .pfn = __phys_to_pfn(0x00010000),
- .length = SZ_32K,
- .type = MT_MEMORY_NONCACHED,
- },
};
/* Contents of JTAG ID register used to identify exact cpu type */
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index b680c83..6c39805 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -985,12 +985,6 @@
.length = IO_SIZE,
.type = MT_DEVICE
},
- {
- .virtual = SRAM_VIRT,
- .pfn = __phys_to_pfn(0x00010000),
- .length = SZ_32K,
- .type = MT_MEMORY_NONCACHED,
- },
};
static struct resource dm365_ks_resources[] = {
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index cd0c8b1..9ab1f10 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -786,12 +786,6 @@
.length = IO_SIZE,
.type = MT_DEVICE
},
- {
- .virtual = SRAM_VIRT,
- .pfn = __phys_to_pfn(0x00008000),
- .length = SZ_16K,
- .type = MT_MEMORY_NONCACHED,
- },
};
/* Contents of JTAG ID register used to identify exact cpu type */
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 97c0f8e..ac7b431 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -756,12 +756,6 @@
.length = IO_SIZE,
.type = MT_DEVICE
},
- {
- .virtual = SRAM_VIRT,
- .pfn = __phys_to_pfn(0x00010000),
- .length = SZ_32K,
- .type = MT_MEMORY_NONCACHED,
- },
};
/* Contents of JTAG ID register used to identify exact cpu type */
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index bdc4aa8..046c723 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -104,8 +104,6 @@
static inline int davinci_pm_init(void) { return 0; }
#endif
-/* standard place to map on-chip SRAMs; they *may* support DMA */
-#define SRAM_VIRT 0xfffe0000
#define SRAM_SIZE SZ_128K
#endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index aaccdc4..700d311 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -26,6 +26,7 @@
#include <linux/platform_data/mmc-davinci.h>
#include <linux/platform_data/usb-davinci.h>
#include <linux/platform_data/spi-davinci.h>
+#include <linux/platform_data/uio_pruss.h>
#include <media/davinci/vpif_types.h>
@@ -72,6 +73,7 @@
#define DA8XX_AEMIF_CS2_BASE 0x60000000
#define DA8XX_AEMIF_CS3_BASE 0x62000000
#define DA8XX_AEMIF_CTL_BASE 0x68000000
+#define DA8XX_SHARED_RAM_BASE 0x80000000
#define DA8XX_ARM_RAM_BASE 0xffff0000
void __init da830_init(void);
@@ -86,6 +88,7 @@
int da8xx_register_usb20(unsigned mA, unsigned potpgt);
int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
int da8xx_register_emac(void);
+int da8xx_register_uio_pruss(void);
int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
int da850_register_mmcsd1(struct davinci_mmc_config *config);
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h
index 46b3cd1..2d9d921 100644
--- a/arch/arm/mach-davinci/include/mach/serial.h
+++ b/arch/arm/mach-davinci/include/mach/serial.h
@@ -43,6 +43,7 @@
};
extern int davinci_serial_init(struct davinci_uart_config *);
+extern int davinci_serial_setup_clk(unsigned instance, unsigned int *rate);
#endif
#endif /* __ASM_ARCH_SERIAL_H */
diff --git a/arch/arm/mach-davinci/include/mach/sram.h b/arch/arm/mach-davinci/include/mach/sram.h
index 111f7cc..4e5db56 100644
--- a/arch/arm/mach-davinci/include/mach/sram.h
+++ b/arch/arm/mach-davinci/include/mach/sram.h
@@ -24,4 +24,7 @@
extern void *sram_alloc(size_t len, dma_addr_t *dma);
extern void sram_free(void *addr, size_t len);
+/* Get the struct gen_pool * for use in platform data */
+extern struct gen_pool *sram_get_gen_pool(void);
+
#endif /* __MACH_SRAM_H */
diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c
index 1875740..f262581 100644
--- a/arch/arm/mach-davinci/serial.c
+++ b/arch/arm/mach-davinci/serial.c
@@ -70,11 +70,33 @@
UART_DM646X_SCR_TX_WATERMARK);
}
+/* Enable UART clock and obtain its rate */
+int __init davinci_serial_setup_clk(unsigned instance, unsigned int *rate)
+{
+ char name[16];
+ struct clk *clk;
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
+ struct device *dev = &soc_info->serial_dev->dev;
+
+ sprintf(name, "uart%d", instance);
+ clk = clk_get(dev, name);
+ if (IS_ERR(clk)) {
+ pr_err("%s:%d: failed to get UART%d clock\n",
+ __func__, __LINE__, instance);
+ return PTR_ERR(clk);
+ }
+
+ clk_prepare_enable(clk);
+
+ if (rate)
+ *rate = clk_get_rate(clk);
+
+ return 0;
+}
+
int __init davinci_serial_init(struct davinci_uart_config *info)
{
- int i;
- char name[16];
- struct clk *uart_clk;
+ int i, ret;
struct davinci_soc_info *soc_info = &davinci_soc_info;
struct device *dev = &soc_info->serial_dev->dev;
struct plat_serial8250_port *p = dev->platform_data;
@@ -87,16 +109,9 @@
if (!(info->enabled_uarts & (1 << i)))
continue;
- sprintf(name, "uart%d", i);
- uart_clk = clk_get(dev, name);
- if (IS_ERR(uart_clk)) {
- printk(KERN_ERR "%s:%d: failed to get UART%d clock\n",
- __func__, __LINE__, i);
+ ret = davinci_serial_setup_clk(i, &p->uartclk);
+ if (ret)
continue;
- }
-
- clk_enable(uart_clk);
- p->uartclk = clk_get_rate(uart_clk);
if (!p->membase && p->mapbase) {
p->membase = ioremap(p->mapbase, SZ_4K);
diff --git a/arch/arm/mach-davinci/sram.c b/arch/arm/mach-davinci/sram.c
index db0f778..c5f7ee5 100644
--- a/arch/arm/mach-davinci/sram.c
+++ b/arch/arm/mach-davinci/sram.c
@@ -10,6 +10,7 @@
*/
#include <linux/module.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <linux/genalloc.h>
#include <mach/common.h>
@@ -17,6 +18,11 @@
static struct gen_pool *sram_pool;
+struct gen_pool *sram_get_gen_pool(void)
+{
+ return sram_pool;
+}
+
void *sram_alloc(size_t len, dma_addr_t *dma)
{
unsigned long vaddr;
@@ -32,7 +38,7 @@
return NULL;
if (dma)
- *dma = dma_base + (vaddr - SRAM_VIRT);
+ *dma = gen_pool_virt_to_phys(sram_pool, vaddr);
return (void *)vaddr;
}
@@ -53,8 +59,10 @@
*/
static int __init sram_init(void)
{
+ phys_addr_t phys = davinci_soc_info.sram_dma;
unsigned len = davinci_soc_info.sram_len;
int status = 0;
+ void *addr;
if (len) {
len = min_t(unsigned, len, SRAM_SIZE);
@@ -62,8 +70,17 @@
if (!sram_pool)
status = -ENOMEM;
}
- if (sram_pool)
- status = gen_pool_add(sram_pool, SRAM_VIRT, len, -1);
+
+ if (sram_pool) {
+ addr = ioremap(phys, len);
+ if (!addr)
+ return -ENOMEM;
+ status = gen_pool_add_virt(sram_pool, (unsigned)addr,
+ phys, len, -1);
+ if (status < 0)
+ iounmap(addr);
+ }
+
WARN_ON(status < 0);
return status;
}
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 75da315..9847938 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -379,7 +379,7 @@
timer_clk = clk_get(NULL, "timer0");
BUG_ON(IS_ERR(timer_clk));
- clk_enable(timer_clk);
+ clk_prepare_enable(timer_clk);
/* init timer hw */
timer_init();
@@ -429,7 +429,7 @@
wd_clk = clk_get(&pdev->dev, NULL);
if (WARN_ON(IS_ERR(wd_clk)))
return;
- clk_enable(wd_clk);
+ clk_prepare_enable(wd_clk);
/* disable, internal clock source */
__raw_writel(0, base + TCR);
diff --git a/arch/arm/mach-highbank/Kconfig b/arch/arm/mach-highbank/Kconfig
index 0e1d0a4..551c97e 100644
--- a/arch/arm/mach-highbank/Kconfig
+++ b/arch/arm/mach-highbank/Kconfig
@@ -1,5 +1,5 @@
config ARCH_HIGHBANK
- bool "Calxeda ECX-1000 (Highbank)" if ARCH_MULTI_V7
+ bool "Calxeda ECX-1000/2000 (Highbank/Midway)" if ARCH_MULTI_V7
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_AMBA
select ARM_GIC
diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h
index 286ec82..068c687 100644
--- a/arch/arm/mach-highbank/core.h
+++ b/arch/arm/mach-highbank/core.h
@@ -1,3 +1,6 @@
+#ifndef __HIGHBANK_CORE_H
+#define __HIGHBANK_CORE_H
+
extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
extern void highbank_clocks_init(void);
extern void highbank_restart(char, const char *);
@@ -18,3 +21,5 @@
extern void highbank_cpu_die(unsigned int cpu);
extern struct smp_operations highbank_smp_ops;
+
+#endif
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 40e36a5..3e60e57 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -26,32 +26,22 @@
#include <linux/smp.h>
#include <linux/amba/bus.h>
+#include <asm/arch_timer.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
-#include <asm/smp_scu.h>
#include <asm/smp_twd.h>
#include <asm/hardware/arm_timer.h>
#include <asm/hardware/timer-sp.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include "core.h"
#include "sysregs.h"
void __iomem *sregs_base;
-
-#define HB_SCU_VIRT_BASE 0xfee00000
-void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE));
-
-static struct map_desc scu_io_desc __initdata = {
- .virtual = HB_SCU_VIRT_BASE,
- .pfn = 0, /* run-time */
- .length = SZ_4K,
- .type = MT_DEVICE,
-};
+void __iomem *scu_base_addr;
static void __init highbank_scu_map_io(void)
{
@@ -60,13 +50,11 @@
/* Get SCU base */
asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
- scu_io_desc.pfn = __phys_to_pfn(base);
- iotable_init(&scu_io_desc, 1);
+ scu_base_addr = ioremap(base, SZ_4K);
}
static void __init highbank_map_io(void)
{
- highbank_scu_map_io();
highbank_lluart_map_io();
}
@@ -83,6 +71,7 @@
}
const static struct of_device_id irq_match[] = {
+ { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, },
{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
{}
};
@@ -99,6 +88,9 @@
{
of_irq_init(irq_match);
+ if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
+ highbank_scu_map_io();
+
#ifdef CONFIG_CACHE_L2X0
/* Enable PL310 L2 Cache controller */
highbank_smc1(0x102, 0x1);
@@ -136,6 +128,9 @@
sp804_clockevents_init(timer_base, irq, "timer0");
twd_local_timer_of_register();
+
+ arch_timer_of_register();
+ arch_timer_sched_clock_init();
}
static struct sys_timer highbank_timer = {
@@ -145,7 +140,6 @@
static void highbank_power_off(void)
{
hignbank_set_pwr_shutdown();
- scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
while (1)
cpu_do_idle();
@@ -211,6 +205,7 @@
static const char *highbank_match[] __initconst = {
"calxeda,highbank",
+ "calxeda,ecx-2000",
NULL,
};
diff --git a/arch/arm/mach-highbank/hotplug.c b/arch/arm/mach-highbank/hotplug.c
index 2c1b8c3..7b60fac 100644
--- a/arch/arm/mach-highbank/hotplug.c
+++ b/arch/arm/mach-highbank/hotplug.c
@@ -14,13 +14,11 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/smp.h>
-#include <asm/smp_scu.h>
#include <asm/cacheflush.h>
#include "core.h"
+#include "sysregs.h"
extern void secondary_startup(void);
@@ -33,7 +31,7 @@
flush_cache_all();
highbank_set_cpu_jump(cpu, secondary_startup);
- scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
+ highbank_set_core_pwr();
cpu_do_idle();
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index fa9560e..1129957 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -42,9 +42,7 @@
*/
static void __init highbank_smp_init_cpus(void)
{
- unsigned int i, ncores;
-
- ncores = scu_get_core_count(scu_base_addr);
+ unsigned int i, ncores = 4;
/* sanity check */
if (ncores > NR_CPUS) {
@@ -65,7 +63,8 @@
{
int i;
- scu_enable(scu_base_addr);
+ if (scu_base_addr)
+ scu_enable(scu_base_addr);
/*
* Write the address of secondary startup into the jump table
diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c
index de866f2..74aa135 100644
--- a/arch/arm/mach-highbank/pm.c
+++ b/arch/arm/mach-highbank/pm.c
@@ -19,7 +19,6 @@
#include <linux/suspend.h>
#include <asm/proc-fns.h>
-#include <asm/smp_scu.h>
#include <asm/suspend.h>
#include "core.h"
@@ -35,8 +34,6 @@
{
hignbank_set_pwr_suspend();
highbank_set_cpu_jump(0, cpu_resume);
-
- scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
cpu_suspend(0, highbank_suspend_finish);
return 0;
diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h
index 0e91338..e13e8ea 100644
--- a/arch/arm/mach-highbank/sysregs.h
+++ b/arch/arm/mach-highbank/sysregs.h
@@ -17,6 +17,10 @@
#define _MACH_HIGHBANK__SYSREGS_H_
#include <linux/io.h>
+#include <linux/smp.h>
+#include <asm/smp_plat.h>
+#include <asm/smp_scu.h>
+#include "core.h"
extern void __iomem *sregs_base;
@@ -29,24 +33,39 @@
#define HB_PWR_HARD_RESET 2
#define HB_PWR_SHUTDOWN 3
+#define SREG_CPU_PWR_CTRL(c) (0x200 + ((c) * 4))
+
+static inline void highbank_set_core_pwr(void)
+{
+ int cpu = cpu_logical_map(smp_processor_id());
+ if (scu_base_addr)
+ scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
+ else
+ writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu));
+}
+
static inline void hignbank_set_pwr_suspend(void)
{
writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
+ highbank_set_core_pwr();
}
static inline void hignbank_set_pwr_shutdown(void)
{
writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ);
+ highbank_set_core_pwr();
}
static inline void hignbank_set_pwr_soft_reset(void)
{
writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
+ highbank_set_core_pwr();
}
static inline void hignbank_set_pwr_hard_reset(void)
{
writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
+ highbank_set_core_pwr();
}
#endif
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index 82c27230..194a5bb 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -14,7 +14,6 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/io.h>
-#include <asm/smp_scu.h>
#include <asm/proc-fns.h>
#include "core.h"
@@ -27,7 +26,6 @@
else
hignbank_set_pwr_soft_reset();
- scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
cpu_do_idle();
}
diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/mach-imx/3ds_debugboard.c
similarity index 99%
rename from arch/arm/plat-mxc/3ds_debugboard.c
rename to arch/arm/mach-imx/3ds_debugboard.c
index 5c10ad0..1343773 100644
--- a/arch/arm/plat-mxc/3ds_debugboard.c
+++ b/arch/arm/mach-imx/3ds_debugboard.c
@@ -21,7 +21,7 @@
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
-#include <mach/hardware.h>
+#include "hardware.h"
/* LAN9217 ethernet base address */
#define LAN9217_BASE_ADDR(n) (n + 0x0)
diff --git a/arch/arm/plat-mxc/include/mach/3ds_debugboard.h b/arch/arm/mach-imx/3ds_debugboard.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/3ds_debugboard.h
rename to arch/arm/mach-imx/3ds_debugboard.h
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 8d27658..4e24b8c 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,3 +1,70 @@
+config ARCH_MXC
+ bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
+ select ARCH_REQUIRE_GPIOLIB
+ select ARM_PATCH_PHYS_VIRT
+ select AUTO_ZRELADDR if !ZBOOT_ROM
+ select CLKDEV_LOOKUP
+ select CLKSRC_MMIO
+ select GENERIC_CLOCKEVENTS
+ select GENERIC_IRQ_CHIP
+ select MULTI_IRQ_HANDLER
+ select SPARSE_IRQ
+ select USE_OF
+ help
+ Support for Freescale MXC/iMX-based family of processors
+
+menu "Freescale i.MX support"
+ depends on ARCH_MXC
+
+config MXC_IRQ_PRIOR
+ bool "Use IRQ priority"
+ help
+ Select this if you want to use prioritized IRQ handling.
+ This feature prevents higher priority ISR to be interrupted
+ by lower priority IRQ even IRQF_DISABLED flag is not set.
+ This may be useful in embedded applications, where are strong
+ requirements for timing.
+ Say N here, unless you have a specialized requirement.
+
+config MXC_TZIC
+ bool
+
+config MXC_AVIC
+ bool
+
+config MXC_DEBUG_BOARD
+ bool "Enable MXC debug board(for 3-stack)"
+ help
+ The debug board is an integral part of the MXC 3-stack(PDK)
+ platforms, it can be attached or removed from the peripheral
+ board. On debug board, several debug devices(ethernet, UART,
+ buttons, LEDs and JTAG) are implemented. Between the MCU and
+ these devices, a CPLD is added as a bridge which performs
+ data/address de-multiplexing and decode, signal level shift,
+ interrupt control and various board functions.
+
+config HAVE_EPIT
+ bool
+
+config MXC_USE_EPIT
+ bool "Use EPIT instead of GPT"
+ depends on HAVE_EPIT
+ help
+ Use EPIT as the system timer on systems that have it. Normally you
+ don't have a reason to do so as the EPIT has the same features and
+ uses the same clocks as the GPT. Anyway, on some systems the GPT
+ may be in use for other purposes.
+
+config MXC_ULPI
+ bool
+
+config ARCH_HAS_RNGA
+ bool
+
+config IRAM_ALLOC
+ bool
+ select GENERIC_ALLOCATOR
+
config HAVE_IMX_GPC
bool
@@ -5,6 +72,12 @@
bool
config HAVE_IMX_SRC
+ def_bool y if SMP
+
+config IMX_HAVE_IOMUX_V1
+ bool
+
+config ARCH_MXC_IOMUX_V3
bool
config ARCH_MX1
@@ -104,7 +177,7 @@
select PINCTRL_IMX51
select SOC_IMX5
-if ARCH_IMX_V4_V5
+if ARCH_MULTI_V4T
comment "MX1 platforms:"
config MACH_MXLADS
@@ -133,6 +206,10 @@
help
Say Yes here if you are using the Armadeus APF9328 development board
+endif
+
+if ARCH_MULTI_V5
+
comment "MX21 platforms:"
config MACH_MX21ADS
@@ -317,6 +394,7 @@
select IMX_HAVE_PLATFORM_IMX_SSI
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MX2_CAMERA
+ select IMX_HAVE_PLATFORM_MX2_EMMA
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_MMC
select LEDS_GPIO_REGISTER
@@ -384,7 +462,7 @@
endif
-if ARCH_IMX_V6_V7
+if ARCH_MULTI_V6
comment "MX31 platforms:"
@@ -649,6 +727,10 @@
Include support for VPR200 platform. This includes specific
configurations for the board and its peripherals.
+endif
+
+if ARCH_MULTI_V7
+
comment "i.MX5 platforms:"
config MACH_MX50_RDP
@@ -739,6 +821,7 @@
select ARCH_MX5
select ARCH_MX53
select HAVE_CAN_FLEXCAN if CAN
+ select IMX_HAVE_PLATFORM_IMX2_WDT
select PINCTRL
select PINCTRL_IMX53
select SOC_IMX5
@@ -756,7 +839,6 @@
select HAVE_CAN_FLEXCAN if CAN
select HAVE_IMX_GPC
select HAVE_IMX_MMDC
- select HAVE_IMX_SRC
select HAVE_SMP
select MFD_SYSCON
select PINCTRL
@@ -766,3 +848,7 @@
This enables support for Freescale i.MX6 Quad processor.
endif
+
+source "arch/arm/mach-imx/devices/Kconfig"
+
+endmenu
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 895754a..fe47b71 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -1,3 +1,5 @@
+obj-y := time.o cpu.o system.o irq-common.o
+
obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o
obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o
@@ -15,6 +17,24 @@
obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
clk-pfd.o clk-busy.o clk.o
+obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
+obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
+
+obj-$(CONFIG_MXC_TZIC) += tzic.o
+obj-$(CONFIG_MXC_AVIC) += avic.o
+
+obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o
+obj-$(CONFIG_MXC_ULPI) += ulpi.o
+obj-$(CONFIG_MXC_USE_EPIT) += epit.o
+obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
+obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o
+obj-$(CONFIG_CPU_IDLE) += cpuidle.o
+
+ifdef CONFIG_SND_IMX_SOC
+obj-y += ssi-fiq.o
+obj-y += ssi-fiq-ksym.o
+endif
+
# Support for CMOS sensor interface
obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
@@ -89,3 +109,5 @@
obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
+
+obj-y += devices/
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/mach-imx/avic.c
similarity index 98%
rename from arch/arm/plat-mxc/avic.c
rename to arch/arm/mach-imx/avic.c
index cbd55c3..0eff23e 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/mach-imx/avic.c
@@ -22,12 +22,11 @@
#include <linux/irqdomain.h>
#include <linux/io.h>
#include <linux/of.h>
-#include <mach/common.h>
#include <asm/mach/irq.h>
#include <asm/exception.h>
-#include <mach/hardware.h>
-#include <mach/irqs.h>
+#include "common.h"
+#include "hardware.h"
#include "irq-common.h"
#define AVIC_INTCNTL 0x00 /* int control reg */
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lilly.h b/arch/arm/mach-imx/board-mx31lilly.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/board-mx31lilly.h
rename to arch/arm/mach-imx/board-mx31lilly.h
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lite.h b/arch/arm/mach-imx/board-mx31lite.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/board-mx31lite.h
rename to arch/arm/mach-imx/board-mx31lite.h
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/arch/arm/mach-imx/board-mx31moboard.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/board-mx31moboard.h
rename to arch/arm/mach-imx/board-mx31moboard.h
diff --git a/arch/arm/plat-mxc/include/mach/board-pcm038.h b/arch/arm/mach-imx/board-pcm038.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/board-pcm038.h
rename to arch/arm/mach-imx/board-pcm038.h
diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c
index 516ddee..15f9d22 100644
--- a/arch/arm/mach-imx/clk-imx1.c
+++ b/arch/arm/mach-imx/clk-imx1.c
@@ -22,9 +22,9 @@
#include <linux/clkdev.h>
#include <linux/err.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
#include "clk.h"
+#include "common.h"
+#include "hardware.h"
/* CCM register addresses */
#define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off)))
@@ -82,7 +82,8 @@
pr_err("imx1 clk %d: register failed with %ld\n",
i, PTR_ERR(clk[i]));
- clk_register_clkdev(clk[dma_gate], "ahb", "imx-dma");
+ clk_register_clkdev(clk[dma_gate], "ahb", "imx1-dma");
+ clk_register_clkdev(clk[hclk], "ipg", "imx1-dma");
clk_register_clkdev(clk[csi_gate], NULL, "mx1-camera.0");
clk_register_clkdev(clk[mma_gate], "mma", NULL);
clk_register_clkdev(clk[usbd_gate], NULL, "imx_udc.0");
@@ -94,18 +95,18 @@
clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1");
clk_register_clkdev(clk[per1], "per", "imx1-uart.2");
clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2");
- clk_register_clkdev(clk[hclk], NULL, "imx-i2c.0");
+ clk_register_clkdev(clk[hclk], NULL, "imx1-i2c.0");
clk_register_clkdev(clk[per2], "per", "imx1-cspi.0");
clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0");
clk_register_clkdev(clk[per2], "per", "imx1-cspi.1");
clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.1");
clk_register_clkdev(clk[per2], NULL, "imx-mmc.0");
- clk_register_clkdev(clk[per2], "per", "imx-fb.0");
- clk_register_clkdev(clk[dummy], "ipg", "imx-fb.0");
- clk_register_clkdev(clk[dummy], "ahb", "imx-fb.0");
+ clk_register_clkdev(clk[per2], "per", "imx1-fb.0");
+ clk_register_clkdev(clk[dummy], "ipg", "imx1-fb.0");
+ clk_register_clkdev(clk[dummy], "ahb", "imx1-fb.0");
clk_register_clkdev(clk[hclk], "mshc", NULL);
clk_register_clkdev(clk[per3], "ssi", NULL);
- clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0");
+ clk_register_clkdev(clk[clk32], NULL, "imx1-rtc.0");
clk_register_clkdev(clk[clko], "clko", NULL);
mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT);
diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c
index cf65148..d7ed660 100644
--- a/arch/arm/mach-imx/clk-imx21.c
+++ b/arch/arm/mach-imx/clk-imx21.c
@@ -25,9 +25,9 @@
#include <linux/module.h>
#include <linux/err.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
#include "clk.h"
+#include "common.h"
+#include "hardware.h"
#define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off)))
@@ -156,16 +156,16 @@
clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx21-cspi.1");
clk_register_clkdev(clk[per2], "per", "imx21-cspi.2");
clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx21-cspi.2");
- clk_register_clkdev(clk[per3], "per", "imx-fb.0");
- clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
- clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx-fb.0");
+ clk_register_clkdev(clk[per3], "per", "imx21-fb.0");
+ clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
+ clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx21-fb.0");
clk_register_clkdev(clk[usb_gate], "per", "imx21-hcd.0");
clk_register_clkdev(clk[usb_hclk_gate], "ahb", "imx21-hcd.0");
- clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand.0");
- clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx-dma");
- clk_register_clkdev(clk[dma_gate], "ipg", "imx-dma");
+ clk_register_clkdev(clk[nfc_gate], NULL, "imx21-nand.0");
+ clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx21-dma");
+ clk_register_clkdev(clk[dma_gate], "ipg", "imx21-dma");
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
- clk_register_clkdev(clk[i2c_gate], NULL, "imx-i2c.0");
+ clk_register_clkdev(clk[i2c_gate], NULL, "imx21-i2c.0");
clk_register_clkdev(clk[kpp_gate], NULL, "mxc-keypad");
clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
clk_register_clkdev(clk[brom_gate], "brom", NULL);
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index 01e2f84..bc88580 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -24,10 +24,10 @@
#include <linux/clkdev.h>
#include <linux/err.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/mx25.h>
#include "clk.h"
+#include "common.h"
+#include "hardware.h"
+#include "mx25.h"
#define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)
@@ -197,7 +197,7 @@
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc");
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
- clk_register_clkdev(clk[nfc_ipg_per], NULL, "mxc_nand.0");
+ clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0");
/* i.mx25 has the i.mx35 type cspi */
clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0");
clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1");
@@ -212,15 +212,15 @@
clk_register_clkdev(clk[per10], "per", "mxc_pwm.3");
clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad");
clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc");
- clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0");
- clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.1");
- clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.2");
+ clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.0");
+ clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.1");
+ clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.2");
clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0");
clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0");
clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0");
- clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx-fb.0");
- clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0");
- clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0");
+ clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx21-fb.0");
+ clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx21-fb.0");
+ clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx21-fb.0");
clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");
clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0");
clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1");
@@ -230,9 +230,9 @@
clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1");
clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1");
clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1");
- clk_register_clkdev(clk[csi_ipg_per], "per", "mx2-camera.0");
- clk_register_clkdev(clk[csi_ipg], "ipg", "mx2-camera.0");
- clk_register_clkdev(clk[csi_ahb], "ahb", "mx2-camera.0");
+ clk_register_clkdev(clk[csi_ipg_per], "per", "imx25-camera.0");
+ clk_register_clkdev(clk[csi_ipg], "ipg", "imx25-camera.0");
+ clk_register_clkdev(clk[csi_ahb], "ahb", "imx25-camera.0");
clk_register_clkdev(clk[dummy], "audmux", NULL);
clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0");
clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1");
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 366e5d5..4c1d1e4 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -6,9 +6,9 @@
#include <linux/clk-provider.h>
#include <linux/of.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
#include "clk.h"
+#include "common.h"
+#include "hardware.h"
#define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))
@@ -51,8 +51,10 @@
static const char *vpu_sel_clks[] = { "spll", "mpll_main2", };
static const char *cpu_sel_clks[] = { "mpll_main2", "mpll", };
+static const char *mpll_sel_clks[] = { "fpm", "mpll_osc_sel", };
+static const char *mpll_osc_sel_clks[] = { "ckih", "ckih_div1p5", };
static const char *clko_sel_clks[] = {
- "ckil", "prem", "ckih", "ckih",
+ "ckil", "fpm", "ckih", "ckih",
"ckih", "mpll", "spll", "cpu_div",
"ahb", "ipg", "per1_div", "per2_div",
"per3_div", "per4_div", "ssi1_div", "ssi2_div",
@@ -79,7 +81,8 @@
vpu_ahb_gate, fec_ahb_gate, emma_ahb_gate, emi_ahb_gate, dma_ahb_gate,
csi_ahb_gate, brom_ahb_gate, ata_ahb_gate, wdog_ipg_gate, usb_ipg_gate,
uart6_ipg_gate, uart5_ipg_gate, uart4_ipg_gate, uart3_ipg_gate,
- uart2_ipg_gate, uart1_ipg_gate, clk_max
+ uart2_ipg_gate, uart1_ipg_gate, ckih_div1p5, fpm, mpll_osc_sel,
+ mpll_sel, clk_max
};
static struct clk *clk[clk_max];
@@ -91,7 +94,15 @@
clk[dummy] = imx_clk_fixed("dummy", 0);
clk[ckih] = imx_clk_fixed("ckih", fref);
clk[ckil] = imx_clk_fixed("ckil", 32768);
- clk[mpll] = imx_clk_pllv1("mpll", "ckih", CCM_MPCTL0);
+ clk[fpm] = imx_clk_fixed_factor("fpm", "ckil", 1024, 1);
+ clk[ckih_div1p5] = imx_clk_fixed_factor("ckih_div1p5", "ckih", 2, 3);
+
+ clk[mpll_osc_sel] = imx_clk_mux("mpll_osc_sel", CCM_CSCR, 4, 1,
+ mpll_osc_sel_clks,
+ ARRAY_SIZE(mpll_osc_sel_clks));
+ clk[mpll_sel] = imx_clk_mux("mpll_sel", CCM_CSCR, 16, 1, mpll_sel_clks,
+ ARRAY_SIZE(mpll_sel_clks));
+ clk[mpll] = imx_clk_pllv1("mpll", "mpll_sel", CCM_MPCTL0);
clk[spll] = imx_clk_pllv1("spll", "ckih", CCM_SPCTL0);
clk[mpll_main2] = imx_clk_fixed_factor("mpll_main2", "mpll", 2, 3);
@@ -211,19 +222,20 @@
clk_register_clkdev(clk[gpt6_ipg_gate], "ipg", "imx-gpt.5");
clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.5");
clk_register_clkdev(clk[pwm_ipg_gate], NULL, "mxc_pwm.0");
- clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.0");
- clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "mxc-mmc.0");
- clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.1");
- clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.1");
- clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.2");
- clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.2");
+ clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.0");
+ clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "imx21-mmc.0");
+ clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.1");
+ clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1");
+ clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2");
+ clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2");
clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0");
clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1");
clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2");
- clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0");
- clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
- clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0");
- clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0");
+ clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0");
+ clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
+ clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0");
+ clk_register_clkdev(clk[csi_ahb_gate], "ahb", "imx27-camera.0");
+ clk_register_clkdev(clk[per4_gate], "per", "imx27-camera.0");
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");
@@ -238,27 +250,27 @@
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2");
clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
- clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0");
+ clk_register_clkdev(clk[nfc_baud_gate], NULL, "imx27-nand.0");
clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0");
clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0");
- clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx-dma");
- clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx-dma");
+ clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx27-dma");
+ clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx27-dma");
clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0");
clk_register_clkdev(clk[fec_ahb_gate], "ahb", "imx27-fec.0");
clk_register_clkdev(clk[wdog_ipg_gate], NULL, "imx2-wdt.0");
- clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx-i2c.0");
- clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1");
+ clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx21-i2c.0");
+ clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx21-i2c.1");
clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0");
clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad");
- clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "mx2-camera.0");
- clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "mx2-camera.0");
+ clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "imx27-camera.0");
+ clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "imx27-camera.0");
clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0");
clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0");
clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL);
clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL);
clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL);
clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL);
- clk_register_clkdev(clk[rtc_ipg_gate], NULL, "mxc_rtc");
+ clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc");
clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);
clk_register_clkdev(clk[cpu_div], "cpu", NULL);
clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index 1253af2..8be64e0 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -22,12 +22,11 @@
#include <linux/err.h>
#include <linux/of.h>
-#include <mach/hardware.h>
-#include <mach/mx31.h>
-#include <mach/common.h>
-
#include "clk.h"
+#include "common.h"
#include "crmregs-imx3.h"
+#include "hardware.h"
+#include "mx31.h"
static const char *mcu_main_sel[] = { "spll", "mpll", };
static const char *per_sel[] = { "per_div", "ipg", };
@@ -124,10 +123,10 @@
clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2");
clk_register_clkdev(clk[pwm_gate], "pwm", NULL);
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
- clk_register_clkdev(clk[rtc_gate], NULL, "mxc_rtc");
+ clk_register_clkdev(clk[rtc_gate], NULL, "imx21-rtc");
clk_register_clkdev(clk[epit1_gate], "epit", NULL);
clk_register_clkdev(clk[epit2_gate], "epit", NULL);
- clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0");
+ clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0");
clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
@@ -155,12 +154,12 @@
clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3");
clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4");
clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4");
- clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
- clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
- clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
+ clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
+ clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
+ clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
- clk_register_clkdev(clk[sdhc1_gate], NULL, "mxc-mmc.0");
- clk_register_clkdev(clk[sdhc2_gate], NULL, "mxc-mmc.1");
+ clk_register_clkdev(clk[sdhc1_gate], NULL, "imx31-mmc.0");
+ clk_register_clkdev(clk[sdhc2_gate], NULL, "imx31-mmc.1");
clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
clk_register_clkdev(clk[firi_gate], "firi", NULL);
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 177259b..66f3d65 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -14,11 +14,10 @@
#include <linux/of.h>
#include <linux/err.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-
#include "crmregs-imx3.h"
#include "clk.h"
+#include "common.h"
+#include "hardware.h"
struct arm_ahb_div {
unsigned char arm, ahb, sel;
@@ -226,9 +225,9 @@
clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");
clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");
clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
- clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
- clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
- clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
+ clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
+ clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
+ clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
@@ -256,7 +255,7 @@
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc");
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
- clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0");
+ clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
clk_prepare_enable(clk[spba_gate]);
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index a0bf848..73b241d 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -14,11 +14,10 @@
#include <linux/of.h>
#include <linux/err.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-
#include "crm-regs-imx5.h"
#include "clk.h"
+#include "common.h"
+#include "hardware.h"
/* Low-power Audio Playback Mode clock */
static const char *lp_apm_sel[] = { "osc", };
@@ -258,8 +257,8 @@
clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx35-cspi.2");
clk_register_clkdev(clk[pwm1_ipg_gate], "pwm", "mxc_pwm.0");
clk_register_clkdev(clk[pwm2_ipg_gate], "pwm", "mxc_pwm.1");
- clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
- clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
+ clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
+ clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.0");
clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.0");
clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.0");
@@ -272,7 +271,7 @@
clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc");
clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc");
clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc");
- clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand");
+ clk_register_clkdev(clk[nfc_gate], NULL, "imx51-nand");
clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
@@ -306,6 +305,10 @@
clk_prepare_enable(clk[spba]);
clk_prepare_enable(clk[emi_fast_gate]); /* fec */
clk_prepare_enable(clk[emi_slow_gate]); /* eim */
+ clk_prepare_enable(clk[mipi_hsc1_gate]);
+ clk_prepare_enable(clk[mipi_hsc2_gate]);
+ clk_prepare_enable(clk[mipi_esc_gate]);
+ clk_prepare_enable(clk[mipi_hsp_gate]);
clk_prepare_enable(clk[tmax1]);
clk_prepare_enable(clk[tmax2]); /* esdhc2, fec */
clk_prepare_enable(clk[tmax3]); /* esdhc1, esdhc4 */
@@ -345,14 +348,13 @@
mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
- clk_register_clkdev(clk[hsi2c_gate], NULL, "imx-i2c.2");
+ clk_register_clkdev(clk[hsi2c_gate], NULL, "imx21-i2c.2");
clk_register_clkdev(clk[mx51_mipi], "mipi_hsp", NULL);
clk_register_clkdev(clk[vpu_gate], NULL, "imx51-vpu.0");
clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");
- clk_register_clkdev(clk[ipu_gate], "bus", "imx51-ipu");
- clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx51-ipu");
- clk_register_clkdev(clk[ipu_di1_gate], "di1", "imx51-ipu");
- clk_register_clkdev(clk[ipu_gate], "hsp", "imx51-ipu");
+ clk_register_clkdev(clk[ipu_gate], "bus", "40000000.ipu");
+ clk_register_clkdev(clk[ipu_di0_gate], "di0", "40000000.ipu");
+ clk_register_clkdev(clk[ipu_di1_gate], "di1", "40000000.ipu");
clk_register_clkdev(clk[usb_phy_gate], "phy", "mxc-ehci.0");
clk_register_clkdev(clk[esdhc1_ipg_gate], "ipg", "sdhci-esdhc-imx51.0");
clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.0");
@@ -440,12 +442,12 @@
mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0");
- clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
+ clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0");
- clk_register_clkdev(clk[ipu_gate], "bus", "imx53-ipu");
- clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx53-ipu");
- clk_register_clkdev(clk[ipu_di1_gate], "di1", "imx53-ipu");
- clk_register_clkdev(clk[ipu_gate], "hsp", "imx53-ipu");
+ clk_register_clkdev(clk[ipu_gate], "bus", "18000000.ipu");
+ clk_register_clkdev(clk[ipu_di0_gate], "di0", "18000000.ipu");
+ clk_register_clkdev(clk[ipu_di1_gate], "di1", "18000000.ipu");
+ clk_register_clkdev(clk[ipu_gate], "hsp", "18000000.ipu");
clk_register_clkdev(clk[usb_phy1_gate], "usb_phy1", "mxc-ehci.0");
clk_register_clkdev(clk[esdhc1_ipg_gate], "ipg", "sdhci-esdhc-imx53.0");
clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.0");
@@ -467,6 +469,7 @@
clk_register_clkdev(clk[can1_serial_gate], "per", "53fc8000.can");
clk_register_clkdev(clk[can2_ipg_gate], "ipg", "53fcc000.can");
clk_register_clkdev(clk[can2_serial_gate], "per", "53fcc000.can");
+ clk_register_clkdev(clk[dummy], NULL, "53fa4000.rtc");
/* set SDHC root clock to 200MHZ*/
clk_set_rate(clk[esdhc_a_podf], 200000000);
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 3ec242f..a37756c 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -19,8 +19,9 @@
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
-#include <mach/common.h>
+
#include "clk.h"
+#include "common.h"
#define CCGR0 0x68
#define CCGR1 0x6c
@@ -104,7 +105,7 @@
static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", };
static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
-static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
+static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_pfd1_540m", };
static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c
index 02be731..abff350 100644
--- a/arch/arm/mach-imx/clk-pllv1.c
+++ b/arch/arm/mach-imx/clk-pllv1.c
@@ -4,10 +4,10 @@
#include <linux/slab.h>
#include <linux/kernel.h>
#include <linux/err.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
#include "clk.h"
+#include "common.h"
+#include "hardware.h"
/**
* pll v1
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/mach-imx/common.h
similarity index 98%
rename from arch/arm/plat-mxc/include/mach/common.h
rename to arch/arm/mach-imx/common.h
index ead9018..ef8db6b 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -79,6 +79,7 @@
extern int mx53_revision(void);
extern int mx53_display_revision(void);
extern void imx_set_aips(void __iomem *);
+extern int mxc_device_init(void);
enum mxc_cpu_pwr_mode {
WAIT_CLOCKED, /* wfi only */
diff --git a/arch/arm/mach-imx/cpu-imx25.c b/arch/arm/mach-imx/cpu-imx25.c
index 6914bcb..96ec64b 100644
--- a/arch/arm/mach-imx/cpu-imx25.c
+++ b/arch/arm/mach-imx/cpu-imx25.c
@@ -11,8 +11,9 @@
*/
#include <linux/module.h>
#include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/iim.h>
+
+#include "iim.h"
+#include "hardware.h"
static int mx25_cpu_rev = -1;
diff --git a/arch/arm/mach-imx/cpu-imx27.c b/arch/arm/mach-imx/cpu-imx27.c
index ff38e15..fe8d36f 100644
--- a/arch/arm/mach-imx/cpu-imx27.c
+++ b/arch/arm/mach-imx/cpu-imx27.c
@@ -24,7 +24,7 @@
#include <linux/io.h>
#include <linux/module.h>
-#include <mach/hardware.h>
+#include "hardware.h"
static int mx27_cpu_rev = -1;
static int mx27_cpu_partnumber;
diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c
index 3f2345f..fde1860 100644
--- a/arch/arm/mach-imx/cpu-imx31.c
+++ b/arch/arm/mach-imx/cpu-imx31.c
@@ -11,9 +11,10 @@
#include <linux/module.h>
#include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/iim.h>
-#include <mach/common.h>
+
+#include "common.h"
+#include "hardware.h"
+#include "iim.h"
static int mx31_cpu_rev = -1;
diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c
index 846e46e..ec3aaa0 100644
--- a/arch/arm/mach-imx/cpu-imx35.c
+++ b/arch/arm/mach-imx/cpu-imx35.c
@@ -10,8 +10,9 @@
*/
#include <linux/module.h>
#include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/iim.h>
+
+#include "hardware.h"
+#include "iim.h"
static int mx35_cpu_rev = -1;
diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c
index 8eb15a2..d887600 100644
--- a/arch/arm/mach-imx/cpu-imx5.c
+++ b/arch/arm/mach-imx/cpu-imx5.c
@@ -15,9 +15,10 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
-#include <mach/hardware.h>
#include <linux/io.h>
+#include "hardware.h"
+
static int mx5_cpu_rev = -1;
#define IIM_SREV 0x24
diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/mach-imx/cpu.c
similarity index 97%
rename from arch/arm/plat-mxc/cpu.c
rename to arch/arm/mach-imx/cpu.c
index 220dd6f..03fcbd0 100644
--- a/arch/arm/plat-mxc/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -1,7 +1,8 @@
#include <linux/module.h>
#include <linux/io.h>
-#include <mach/hardware.h>
+
+#include "hardware.h"
unsigned int __mxc_cpu_type;
EXPORT_SYMBOL(__mxc_cpu_type);
diff --git a/arch/arm/mach-imx/cpu_op-mx51.c b/arch/arm/mach-imx/cpu_op-mx51.c
index 7b92cd6..b9ef692 100644
--- a/arch/arm/mach-imx/cpu_op-mx51.c
+++ b/arch/arm/mach-imx/cpu_op-mx51.c
@@ -13,9 +13,10 @@
#include <linux/bug.h>
#include <linux/types.h>
-#include <mach/hardware.h>
#include <linux/kernel.h>
+#include "hardware.h"
+
static struct cpu_op mx51_cpu_op[] = {
{
.cpu_rate = 160000000,},
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/mach-imx/cpufreq.c
similarity index 99%
rename from arch/arm/plat-mxc/cpufreq.c
rename to arch/arm/mach-imx/cpufreq.c
index b5b6f80..36e8b39 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/mach-imx/cpufreq.c
@@ -22,7 +22,8 @@
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/slab.h>
-#include <mach/hardware.h>
+
+#include "hardware.h"
#define CLK32_FREQ 32768
#define NANOSECOND (1000 * 1000 * 1000)
diff --git a/arch/arm/plat-mxc/cpuidle.c b/arch/arm/mach-imx/cpuidle.c
similarity index 100%
rename from arch/arm/plat-mxc/cpuidle.c
rename to arch/arm/mach-imx/cpuidle.c
diff --git a/arch/arm/plat-mxc/include/mach/cpuidle.h b/arch/arm/mach-imx/cpuidle.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/cpuidle.h
rename to arch/arm/mach-imx/cpuidle.h
diff --git a/arch/arm/mach-imx/devices-imx1.h b/arch/arm/mach-imx/devices-imx1.h
index 3aad1e7..f9b5afc 100644
--- a/arch/arm/mach-imx/devices-imx1.h
+++ b/arch/arm/mach-imx/devices-imx1.h
@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/mx1.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
extern const struct imx_imx_fb_data imx1_imx_fb_data;
#define imx1_add_imx_fb(pdata) \
diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h
index 93ece55..bd93932 100644
--- a/arch/arm/mach-imx/devices-imx21.h
+++ b/arch/arm/mach-imx/devices-imx21.h
@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/mx21.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data;
#define imx21_add_imx21_hcd(pdata) \
diff --git a/arch/arm/mach-imx/devices-imx25.h b/arch/arm/mach-imx/devices-imx25.h
index f8e03dd..0d2922b 100644
--- a/arch/arm/mach-imx/devices-imx25.h
+++ b/arch/arm/mach-imx/devices-imx25.h
@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/mx25.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
extern const struct imx_fec_data imx25_fec_data;
#define imx25_add_fec(pdata) \
diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h
index 0482293..1309625 100644
--- a/arch/arm/mach-imx/devices-imx27.h
+++ b/arch/arm/mach-imx/devices-imx27.h
@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/mx27.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
extern const struct imx_fec_data imx27_fec_data;
#define imx27_add_fec(pdata) \
@@ -54,8 +53,10 @@
extern const struct imx_mx2_camera_data imx27_mx2_camera_data;
#define imx27_add_mx2_camera(pdata) \
imx_add_mx2_camera(&imx27_mx2_camera_data, pdata)
+
+extern const struct imx_mx2_emma_data imx27_mx2_emmaprp_data;
#define imx27_add_mx2_emmaprp() \
- imx_add_mx2_emmaprp(&imx27_mx2_camera_data)
+ imx_add_mx2_emmaprp(&imx27_mx2_emmaprp_data)
extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data;
#define imx27_add_mxc_ehci_otg(pdata) \
diff --git a/arch/arm/mach-imx/devices-imx31.h b/arch/arm/mach-imx/devices-imx31.h
index 8b2ceb4..e8d1611 100644
--- a/arch/arm/mach-imx/devices-imx31.h
+++ b/arch/arm/mach-imx/devices-imx31.h
@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/mx31.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data;
#define imx31_add_fsl_usb2_udc(pdata) \
diff --git a/arch/arm/mach-imx/devices-imx35.h b/arch/arm/mach-imx/devices-imx35.h
index c3e9f20..e2675f1 100644
--- a/arch/arm/mach-imx/devices-imx35.h
+++ b/arch/arm/mach-imx/devices-imx35.h
@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/mx35.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
extern const struct imx_fec_data imx35_fec_data;
#define imx35_add_fec(pdata) \
diff --git a/arch/arm/mach-imx/devices-imx50.h b/arch/arm/mach-imx/devices-imx50.h
index 7216667..2c29039 100644
--- a/arch/arm/mach-imx/devices-imx50.h
+++ b/arch/arm/mach-imx/devices-imx50.h
@@ -18,8 +18,7 @@
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
-#include <mach/mx50.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
extern const struct imx_imx_uart_1irq_data imx50_imx_uart_data[];
#define imx50_add_imx_uart(id, pdata) \
diff --git a/arch/arm/mach-imx/devices-imx51.h b/arch/arm/mach-imx/devices-imx51.h
index 9f17187..deee5ba 100644
--- a/arch/arm/mach-imx/devices-imx51.h
+++ b/arch/arm/mach-imx/devices-imx51.h
@@ -6,8 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/mx51.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
extern const struct imx_fec_data imx51_fec_data;
#define imx51_add_fec(pdata) \
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/mach-imx/devices/Kconfig
similarity index 96%
rename from arch/arm/plat-mxc/devices/Kconfig
rename to arch/arm/mach-imx/devices/Kconfig
index a35d984..9a8f1ca 100644
--- a/arch/arm/plat-mxc/devices/Kconfig
+++ b/arch/arm/mach-imx/devices/Kconfig
@@ -56,6 +56,9 @@
config IMX_HAVE_PLATFORM_MX2_CAMERA
bool
+config IMX_HAVE_PLATFORM_MX2_EMMA
+ bool
+
config IMX_HAVE_PLATFORM_MXC_EHCI
bool
diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/mach-imx/devices/Makefile
similarity index 95%
rename from arch/arm/plat-mxc/devices/Makefile
rename to arch/arm/mach-imx/devices/Makefile
index 76f3195..6acf37e 100644
--- a/arch/arm/plat-mxc/devices/Makefile
+++ b/arch/arm/mach-imx/devices/Makefile
@@ -1,3 +1,5 @@
+obj-y := devices.o
+
obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o
@@ -28,3 +30,4 @@
obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_AHCI) += platform-ahci-imx.o
+obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_EMMA) += platform-mx2-emma.o
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/mach-imx/devices/devices-common.h
similarity index 95%
rename from arch/arm/plat-mxc/include/mach/devices-common.h
rename to arch/arm/mach-imx/devices/devices-common.h
index eaf79d2..6277baf 100644
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/mach-imx/devices/devices-common.h
@@ -108,6 +108,7 @@
#include <linux/platform_data/video-imxfb.h>
struct imx_imx_fb_data {
+ const char *devid;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
@@ -118,6 +119,7 @@
#include <linux/platform_data/i2c-imx.h>
struct imx_imx_i2c_data {
+ const char *devid;
int id;
resource_size_t iobase;
resource_size_t iosize;
@@ -219,6 +221,7 @@
#include <linux/platform_data/camera-mx2.h>
struct imx_mx2_camera_data {
+ const char *devid;
resource_size_t iobasecsi;
resource_size_t iosizecsi;
resource_size_t irqcsi;
@@ -229,8 +232,15 @@
struct platform_device *__init imx_add_mx2_camera(
const struct imx_mx2_camera_data *data,
const struct mx2_camera_platform_data *pdata);
+
+
+struct imx_mx2_emma_data {
+ resource_size_t iobase;
+ resource_size_t iosize;
+ resource_size_t irq;
+};
struct platform_device *__init imx_add_mx2_emmaprp(
- const struct imx_mx2_camera_data *data);
+ const struct imx_mx2_emma_data *data);
#include <linux/platform_data/usb-ehci-mxc.h>
struct imx_mxc_ehci_data {
@@ -244,6 +254,7 @@
#include <linux/platform_data/mmc-mxcmmc.h>
struct imx_mxc_mmc_data {
+ const char *devid;
int id;
resource_size_t iobase;
resource_size_t iosize;
@@ -256,6 +267,7 @@
#include <linux/platform_data/mtd-mxc_nand.h>
struct imx_mxc_nand_data {
+ const char *devid;
/*
* id is traditionally 0, but -1 is more appropriate. We use -1 for new
* machines but don't change existing devices as the nand device usually
@@ -290,6 +302,7 @@
/* mxc_rtc */
struct imx_mxc_rtc_data {
+ const char *devid;
resource_size_t iobase;
resource_size_t irq;
};
@@ -326,7 +339,8 @@
const struct imx_spi_imx_data *data,
const struct spi_imx_master *pdata);
-struct platform_device *imx_add_imx_dma(void);
+struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase,
+ int irq, int irq_err);
struct platform_device *imx_add_imx_sdma(char *name,
resource_size_t iobase, int irq, struct sdma_platform_data *pdata);
diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/mach-imx/devices/devices.c
similarity index 92%
rename from arch/arm/plat-mxc/devices.c
rename to arch/arm/mach-imx/devices/devices.c
index 4d55a7a..1b37482 100644
--- a/arch/arm/plat-mxc/devices.c
+++ b/arch/arm/mach-imx/devices/devices.c
@@ -21,7 +21,6 @@
#include <linux/init.h>
#include <linux/err.h>
#include <linux/platform_device.h>
-#include <mach/common.h>
struct device mxc_aips_bus = {
.init_name = "mxc_aips",
@@ -33,7 +32,7 @@
.parent = &platform_bus,
};
-static int __init mxc_device_init(void)
+int __init mxc_device_init(void)
{
int ret;
@@ -46,4 +45,3 @@
done:
return ret;
}
-core_initcall(mxc_device_init);
diff --git a/arch/arm/plat-mxc/devices/platform-ahci-imx.c b/arch/arm/mach-imx/devices/platform-ahci-imx.c
similarity index 98%
rename from arch/arm/plat-mxc/devices/platform-ahci-imx.c
rename to arch/arm/mach-imx/devices/platform-ahci-imx.c
index ade4a1c..3d87dd9 100644
--- a/arch/arm/plat-mxc/devices/platform-ahci-imx.c
+++ b/arch/arm/mach-imx/devices/platform-ahci-imx.c
@@ -24,8 +24,9 @@
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_ahci_imx_data_entry_single(soc, _devid) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/mach-imx/devices/platform-fec.c
similarity index 96%
rename from arch/arm/plat-mxc/devices/platform-fec.c
rename to arch/arm/mach-imx/devices/platform-fec.c
index 0bae44e..2cb188a 100644
--- a/arch/arm/plat-mxc/devices/platform-fec.c
+++ b/arch/arm/mach-imx/devices/platform-fec.c
@@ -8,8 +8,9 @@
*/
#include <linux/dma-mapping.h>
#include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_fec_data_entry_single(soc, _devid) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-flexcan.c b/arch/arm/mach-imx/devices/platform-flexcan.c
similarity index 96%
rename from arch/arm/plat-mxc/devices/platform-flexcan.c
rename to arch/arm/mach-imx/devices/platform-flexcan.c
index 4e8497a..1078bf0 100644
--- a/arch/arm/plat-mxc/devices/platform-flexcan.c
+++ b/arch/arm/mach-imx/devices/platform-flexcan.c
@@ -5,8 +5,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
similarity index 96%
rename from arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c
rename to arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
index 848038f..37e4439 100644
--- a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c
+++ b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
@@ -7,8 +7,9 @@
* Free Software Foundation.
*/
#include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_fsl_usb2_udc_data_entry_single(soc) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c b/arch/arm/mach-imx/devices/platform-gpio-mxc.c
similarity index 95%
rename from arch/arm/plat-mxc/devices/platform-gpio-mxc.c
rename to arch/arm/mach-imx/devices/platform-gpio-mxc.c
index a7919a2..26483fa 100644
--- a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c
+++ b/arch/arm/mach-imx/devices/platform-gpio-mxc.c
@@ -6,7 +6,7 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/devices-common.h>
+#include "devices-common.h"
struct platform_device *__init mxc_register_gpio(char *name, int id,
resource_size_t iobase, resource_size_t iosize, int irq, int irq_high)
diff --git a/arch/arm/plat-mxc/devices/platform-gpio_keys.c b/arch/arm/mach-imx/devices/platform-gpio_keys.c
similarity index 94%
rename from arch/arm/plat-mxc/devices/platform-gpio_keys.c
rename to arch/arm/mach-imx/devices/platform-gpio_keys.c
index 1c53a53..4862825 100644
--- a/arch/arm/plat-mxc/devices/platform-gpio_keys.c
+++ b/arch/arm/mach-imx/devices/platform-gpio_keys.c
@@ -16,8 +16,9 @@
* Boston, MA 02110-1301, USA.
*/
#include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
struct platform_device *__init imx_add_gpio_keys(
const struct gpio_keys_platform_data *pdata)
diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/mach-imx/devices/platform-imx-dma.c
similarity index 63%
rename from arch/arm/plat-mxc/devices/platform-imx-dma.c
rename to arch/arm/mach-imx/devices/platform-imx-dma.c
index 7fa7e9c..ccdb5dc 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-dma.c
+++ b/arch/arm/mach-imx/devices/platform-imx-dma.c
@@ -6,12 +6,29 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/devices-common.h>
+#include "devices-common.h"
-struct platform_device __init __maybe_unused *imx_add_imx_dma(void)
+struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name,
+ resource_size_t iobase, int irq, int irq_err)
{
+ struct resource res[] = {
+ {
+ .start = iobase,
+ .end = iobase + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = irq,
+ .end = irq,
+ .flags = IORESOURCE_IRQ,
+ }, {
+ .start = irq_err,
+ .end = irq_err,
+ .flags = IORESOURCE_IRQ,
+ },
+ };
+
return platform_device_register_resndata(&mxc_ahb_bus,
- "imx-dma", -1, NULL, 0, NULL, 0);
+ name, -1, res, ARRAY_SIZE(res), NULL, 0);
}
struct platform_device __init __maybe_unused *imx_add_imx_sdma(char *name,
diff --git a/arch/arm/plat-mxc/devices/platform-imx-fb.c b/arch/arm/mach-imx/devices/platform-imx-fb.c
similarity index 79%
rename from arch/arm/plat-mxc/devices/platform-imx-fb.c
rename to arch/arm/mach-imx/devices/platform-imx-fb.c
index 2b0b5e0..10b0ed3 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-fb.c
+++ b/arch/arm/mach-imx/devices/platform-imx-fb.c
@@ -7,11 +7,13 @@
* Free Software Foundation.
*/
#include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
-#define imx_imx_fb_data_entry_single(soc, _size) \
+#include "../hardware.h"
+#include "devices-common.h"
+
+#define imx_imx_fb_data_entry_single(soc, _devid, _size) \
{ \
+ .devid = _devid, \
.iobase = soc ## _LCDC_BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_LCDC, \
@@ -19,22 +21,22 @@
#ifdef CONFIG_SOC_IMX1
const struct imx_imx_fb_data imx1_imx_fb_data __initconst =
- imx_imx_fb_data_entry_single(MX1, SZ_4K);
+ imx_imx_fb_data_entry_single(MX1, "imx1-fb", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX1 */
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_fb_data imx21_imx_fb_data __initconst =
- imx_imx_fb_data_entry_single(MX21, SZ_4K);
+ imx_imx_fb_data_entry_single(MX21, "imx21-fb", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX25
const struct imx_imx_fb_data imx25_imx_fb_data __initconst =
- imx_imx_fb_data_entry_single(MX25, SZ_16K);
+ imx_imx_fb_data_entry_single(MX25, "imx21-fb", SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_fb_data imx27_imx_fb_data __initconst =
- imx_imx_fb_data_entry_single(MX27, SZ_4K);
+ imx_imx_fb_data_entry_single(MX27, "imx21-fb", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX27 */
struct platform_device *__init imx_add_imx_fb(
diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/mach-imx/devices/platform-imx-i2c.c
similarity index 76%
rename from arch/arm/plat-mxc/devices/platform-imx-i2c.c
rename to arch/arm/mach-imx/devices/platform-imx-i2c.c
index 19ad580..8e30e57 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c
+++ b/arch/arm/mach-imx/devices/platform-imx-i2c.c
@@ -6,34 +6,35 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
-#define imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size) \
+#define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) \
{ \
+ .devid = _devid, \
.id = _id, \
.iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_I2C ## _hwid, \
}
-#define imx_imx_i2c_data_entry(soc, _id, _hwid, _size) \
- [_id] = imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size)
+#define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size) \
+ [_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size)
#ifdef CONFIG_SOC_IMX1
const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst =
- imx_imx_i2c_data_entry_single(MX1, 0, , SZ_4K);
+ imx_imx_i2c_data_entry_single(MX1, "imx1-i2c", 0, , SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX1 */
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst =
- imx_imx_i2c_data_entry_single(MX21, 0, , SZ_4K);
+ imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX25
const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = {
#define imx25_imx_i2c_data_entry(_id, _hwid) \
- imx_imx_i2c_data_entry(MX25, _id, _hwid, SZ_16K)
+ imx_imx_i2c_data_entry(MX25, "imx21-i2c", _id, _hwid, SZ_16K)
imx25_imx_i2c_data_entry(0, 1),
imx25_imx_i2c_data_entry(1, 2),
imx25_imx_i2c_data_entry(2, 3),
@@ -43,7 +44,7 @@
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
#define imx27_imx_i2c_data_entry(_id, _hwid) \
- imx_imx_i2c_data_entry(MX27, _id, _hwid, SZ_4K)
+ imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K)
imx27_imx_i2c_data_entry(0, 1),
imx27_imx_i2c_data_entry(1, 2),
};
@@ -52,7 +53,7 @@
#ifdef CONFIG_SOC_IMX31
const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = {
#define imx31_imx_i2c_data_entry(_id, _hwid) \
- imx_imx_i2c_data_entry(MX31, _id, _hwid, SZ_4K)
+ imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K)
imx31_imx_i2c_data_entry(0, 1),
imx31_imx_i2c_data_entry(1, 2),
imx31_imx_i2c_data_entry(2, 3),
@@ -62,7 +63,7 @@
#ifdef CONFIG_SOC_IMX35
const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
#define imx35_imx_i2c_data_entry(_id, _hwid) \
- imx_imx_i2c_data_entry(MX35, _id, _hwid, SZ_4K)
+ imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K)
imx35_imx_i2c_data_entry(0, 1),
imx35_imx_i2c_data_entry(1, 2),
imx35_imx_i2c_data_entry(2, 3),
@@ -72,7 +73,7 @@
#ifdef CONFIG_SOC_IMX50
const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = {
#define imx50_imx_i2c_data_entry(_id, _hwid) \
- imx_imx_i2c_data_entry(MX50, _id, _hwid, SZ_4K)
+ imx_imx_i2c_data_entry(MX50, "imx21-i2c", _id, _hwid, SZ_4K)
imx50_imx_i2c_data_entry(0, 1),
imx50_imx_i2c_data_entry(1, 2),
imx50_imx_i2c_data_entry(2, 3),
@@ -82,10 +83,11 @@
#ifdef CONFIG_SOC_IMX51
const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = {
#define imx51_imx_i2c_data_entry(_id, _hwid) \
- imx_imx_i2c_data_entry(MX51, _id, _hwid, SZ_4K)
+ imx_imx_i2c_data_entry(MX51, "imx21-i2c", _id, _hwid, SZ_4K)
imx51_imx_i2c_data_entry(0, 1),
imx51_imx_i2c_data_entry(1, 2),
{
+ .devid = "imx21-i2c",
.id = 2,
.iobase = MX51_HSI2C_DMA_BASE_ADDR,
.iosize = SZ_16K,
@@ -97,7 +99,7 @@
#ifdef CONFIG_SOC_IMX53
const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = {
#define imx53_imx_i2c_data_entry(_id, _hwid) \
- imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K)
+ imx_imx_i2c_data_entry(MX53, "imx21-i2c", _id, _hwid, SZ_4K)
imx53_imx_i2c_data_entry(0, 1),
imx53_imx_i2c_data_entry(1, 2),
imx53_imx_i2c_data_entry(2, 3),
@@ -120,7 +122,7 @@
},
};
- return imx_add_platform_device("imx-i2c", data->id,
+ return imx_add_platform_device(data->devid, data->id,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata));
}
diff --git a/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/arch/arm/mach-imx/devices/platform-imx-keypad.c
similarity index 96%
rename from arch/arm/plat-mxc/devices/platform-imx-keypad.c
rename to arch/arm/mach-imx/devices/platform-imx-keypad.c
index 479c3e9..8f22a4c 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-keypad.c
+++ b/arch/arm/mach-imx/devices/platform-imx-keypad.c
@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_imx_keypad_data_entry_single(soc, _size) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/mach-imx/devices/platform-imx-ssi.c
similarity index 98%
rename from arch/arm/plat-mxc/devices/platform-imx-ssi.c
rename to arch/arm/mach-imx/devices/platform-imx-ssi.c
index 21c6f30..bfcb8f3 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c
+++ b/arch/arm/mach-imx/devices/platform-imx-ssi.c
@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \
[_id] = { \
diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/mach-imx/devices/platform-imx-uart.c
similarity index 98%
rename from arch/arm/plat-mxc/devices/platform-imx-uart.c
rename to arch/arm/mach-imx/devices/platform-imx-uart.c
index d390f00..67bf866a 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-uart.c
+++ b/arch/arm/mach-imx/devices/platform-imx-uart.c
@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \
[_id] = { \
diff --git a/arch/arm/plat-mxc/devices/platform-imx2-wdt.c b/arch/arm/mach-imx/devices/platform-imx2-wdt.c
similarity index 97%
rename from arch/arm/plat-mxc/devices/platform-imx2-wdt.c
rename to arch/arm/mach-imx/devices/platform-imx2-wdt.c
index 5e07ef2..ec75d64 100644
--- a/arch/arm/plat-mxc/devices/platform-imx2-wdt.c
+++ b/arch/arm/mach-imx/devices/platform-imx2-wdt.c
@@ -7,8 +7,9 @@
* Free Software Foundation.
*/
#include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-imx21-hcd.c b/arch/arm/mach-imx/devices/platform-imx21-hcd.c
similarity index 94%
rename from arch/arm/plat-mxc/devices/platform-imx21-hcd.c
rename to arch/arm/mach-imx/devices/platform-imx21-hcd.c
index 5770a42..30c8161 100644
--- a/arch/arm/plat-mxc/devices/platform-imx21-hcd.c
+++ b/arch/arm/mach-imx/devices/platform-imx21-hcd.c
@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_imx21_hcd_data_entry_single(soc) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-imx27-coda.c b/arch/arm/mach-imx/devices/platform-imx27-coda.c
similarity index 93%
rename from arch/arm/plat-mxc/devices/platform-imx27-coda.c
rename to arch/arm/mach-imx/devices/platform-imx27-coda.c
index 8b12aac..25bebc2 100644
--- a/arch/arm/plat-mxc/devices/platform-imx27-coda.c
+++ b/arch/arm/mach-imx/devices/platform-imx27-coda.c
@@ -7,8 +7,8 @@
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
#ifdef CONFIG_SOC_IMX27
const struct imx_imx27_coda_data imx27_coda_data __initconst = {
diff --git a/arch/arm/plat-mxc/devices/platform-imx_udc.c b/arch/arm/mach-imx/devices/platform-imx_udc.c
similarity index 96%
rename from arch/arm/plat-mxc/devices/platform-imx_udc.c
rename to arch/arm/mach-imx/devices/platform-imx_udc.c
index 6fd675d..5ced7e4 100644
--- a/arch/arm/plat-mxc/devices/platform-imx_udc.c
+++ b/arch/arm/mach-imx/devices/platform-imx_udc.c
@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_imx_udc_data_entry_single(soc, _size) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c b/arch/arm/mach-imx/devices/platform-imxdi_rtc.c
similarity index 94%
rename from arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
rename to arch/arm/mach-imx/devices/platform-imxdi_rtc.c
index 805336f..5bb490d 100644
--- a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
+++ b/arch/arm/mach-imx/devices/platform-imxdi_rtc.c
@@ -7,8 +7,9 @@
* Free Software Foundation.
*/
#include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_imxdi_rtc_data_entry_single(soc) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-ipu-core.c b/arch/arm/mach-imx/devices/platform-ipu-core.c
similarity index 97%
rename from arch/arm/plat-mxc/devices/platform-ipu-core.c
rename to arch/arm/mach-imx/devices/platform-ipu-core.c
index d1e33cc..fc4dd7c 100644
--- a/arch/arm/plat-mxc/devices/platform-ipu-core.c
+++ b/arch/arm/mach-imx/devices/platform-ipu-core.c
@@ -7,8 +7,9 @@
* Free Software Foundation.
*/
#include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_ipu_core_entry_single(soc) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-mx1-camera.c b/arch/arm/mach-imx/devices/platform-mx1-camera.c
similarity index 94%
rename from arch/arm/plat-mxc/devices/platform-mx1-camera.c
rename to arch/arm/mach-imx/devices/platform-mx1-camera.c
index edcc581..2c67881 100644
--- a/arch/arm/plat-mxc/devices/platform-mx1-camera.c
+++ b/arch/arm/mach-imx/devices/platform-mx1-camera.c
@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_mx1_camera_data_entry_single(soc, _size) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-mx2-camera.c b/arch/arm/mach-imx/devices/platform-mx2-camera.c
similarity index 67%
rename from arch/arm/plat-mxc/devices/platform-mx2-camera.c
rename to arch/arm/mach-imx/devices/platform-mx2-camera.c
index 11eace9..b53e1f3 100644
--- a/arch/arm/plat-mxc/devices/platform-mx2-camera.c
+++ b/arch/arm/mach-imx/devices/platform-mx2-camera.c
@@ -6,17 +6,19 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
-#define imx_mx2_camera_data_entry_single(soc) \
+#define imx_mx2_camera_data_entry_single(soc, _devid) \
{ \
+ .devid = _devid, \
.iobasecsi = soc ## _CSI_BASE_ADDR, \
.iosizecsi = SZ_4K, \
.irqcsi = soc ## _INT_CSI, \
}
-#define imx_mx2_camera_data_entry_single_emma(soc) \
+#define imx_mx2_camera_data_entry_single_emma(soc, _devid) \
{ \
+ .devid = _devid, \
.iobasecsi = soc ## _CSI_BASE_ADDR, \
.iosizecsi = SZ_32, \
.irqcsi = soc ## _INT_CSI, \
@@ -27,12 +29,12 @@
#ifdef CONFIG_SOC_IMX25
const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst =
- imx_mx2_camera_data_entry_single(MX25);
+ imx_mx2_camera_data_entry_single(MX25, "imx25-camera");
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27
const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst =
- imx_mx2_camera_data_entry_single_emma(MX27);
+ imx_mx2_camera_data_entry_single_emma(MX27, "imx27-camera");
#endif /* ifdef CONFIG_SOC_IMX27 */
struct platform_device *__init imx_add_mx2_camera(
@@ -58,25 +60,8 @@
.flags = IORESOURCE_IRQ,
},
};
- return imx_add_platform_device_dmamask("mx2-camera", 0,
+ return imx_add_platform_device_dmamask(data->devid, 0,
res, data->iobaseemmaprp ? 4 : 2,
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
-struct platform_device *__init imx_add_mx2_emmaprp(
- const struct imx_mx2_camera_data *data)
-{
- struct resource res[] = {
- {
- .start = data->iobaseemmaprp,
- .end = data->iobaseemmaprp + data->iosizeemmaprp - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = data->irqemmaprp,
- .end = data->irqemmaprp,
- .flags = IORESOURCE_IRQ,
- },
- };
- return imx_add_platform_device_dmamask("m2m-emmaprp", 0,
- res, 2, NULL, 0, DMA_BIT_MASK(32));
-}
diff --git a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c b/arch/arm/mach-imx/devices/platform-mxc-ehci.c
similarity index 97%
rename from arch/arm/plat-mxc/devices/platform-mxc-ehci.c
rename to arch/arm/mach-imx/devices/platform-mxc-ehci.c
index 35851d8..5d4bbbf 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c
+++ b/arch/arm/mach-imx/devices/platform-mxc-ehci.c
@@ -7,8 +7,9 @@
* Free Software Foundation.
*/
#include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_mxc_ehci_data_entry_single(soc, _id, hs) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/arch/arm/mach-imx/devices/platform-mxc-mmc.c
similarity index 76%
rename from arch/arm/plat-mxc/devices/platform-mxc-mmc.c
rename to arch/arm/mach-imx/devices/platform-mxc-mmc.c
index e7b920b..b8203c7 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c
+++ b/arch/arm/mach-imx/devices/platform-mxc-mmc.c
@@ -7,24 +7,26 @@
* Free Software Foundation.
*/
#include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
-#define imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) \
+#include "../hardware.h"
+#include "devices-common.h"
+
+#define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) \
{ \
+ .devid = _devid, \
.id = _id, \
.iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_SDHC ## _hwid, \
.dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \
}
-#define imx_mxc_mmc_data_entry(soc, _id, _hwid, _size) \
- [_id] = imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size)
+#define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size) \
+ [_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size)
#ifdef CONFIG_SOC_IMX21
const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = {
#define imx21_mxc_mmc_data_entry(_id, _hwid) \
- imx_mxc_mmc_data_entry(MX21, _id, _hwid, SZ_4K)
+ imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K)
imx21_mxc_mmc_data_entry(0, 1),
imx21_mxc_mmc_data_entry(1, 2),
};
@@ -33,7 +35,7 @@
#ifdef CONFIG_SOC_IMX27
const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = {
#define imx27_mxc_mmc_data_entry(_id, _hwid) \
- imx_mxc_mmc_data_entry(MX27, _id, _hwid, SZ_4K)
+ imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K)
imx27_mxc_mmc_data_entry(0, 1),
imx27_mxc_mmc_data_entry(1, 2),
};
@@ -42,7 +44,7 @@
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = {
#define imx31_mxc_mmc_data_entry(_id, _hwid) \
- imx_mxc_mmc_data_entry(MX31, _id, _hwid, SZ_16K)
+ imx_mxc_mmc_data_entry(MX31, "imx31-mmc", _id, _hwid, SZ_16K)
imx31_mxc_mmc_data_entry(0, 1),
imx31_mxc_mmc_data_entry(1, 2),
};
@@ -67,7 +69,7 @@
.flags = IORESOURCE_DMA,
},
};
- return imx_add_platform_device_dmamask("mxc-mmc", data->id,
+ return imx_add_platform_device_dmamask(data->devid, data->id,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_nand.c b/arch/arm/mach-imx/devices/platform-mxc_nand.c
similarity index 74%
rename from arch/arm/plat-mxc/devices/platform-mxc_nand.c
rename to arch/arm/mach-imx/devices/platform-mxc_nand.c
index 95b75cc..7af1c53 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_nand.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_nand.c
@@ -7,18 +7,21 @@
* Free Software Foundation.
*/
#include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
-#define imx_mxc_nand_data_entry_single(soc, _size) \
+#include "../hardware.h"
+#include "devices-common.h"
+
+#define imx_mxc_nand_data_entry_single(soc, _devid, _size) \
{ \
+ .devid = _devid, \
.iobase = soc ## _NFC_BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_NFC \
}
-#define imx_mxc_nandv3_data_entry_single(soc, _size) \
+#define imx_mxc_nandv3_data_entry_single(soc, _devid, _size) \
{ \
+ .devid = _devid, \
.id = -1, \
.iobase = soc ## _NFC_BASE_ADDR, \
.iosize = _size, \
@@ -28,32 +31,32 @@
#ifdef CONFIG_SOC_IMX21
const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst =
- imx_mxc_nand_data_entry_single(MX21, SZ_4K);
+ imx_mxc_nand_data_entry_single(MX21, "imx21-nand", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX25
const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst =
- imx_mxc_nand_data_entry_single(MX25, SZ_8K);
+ imx_mxc_nand_data_entry_single(MX25, "imx25-nand", SZ_8K);
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27
const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst =
- imx_mxc_nand_data_entry_single(MX27, SZ_4K);
+ imx_mxc_nand_data_entry_single(MX27, "imx27-nand", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst =
- imx_mxc_nand_data_entry_single(MX31, SZ_4K);
+ imx_mxc_nand_data_entry_single(MX31, "imx27-nand", SZ_4K);
#endif
#ifdef CONFIG_SOC_IMX35
const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst =
- imx_mxc_nand_data_entry_single(MX35, SZ_8K);
+ imx_mxc_nand_data_entry_single(MX35, "imx25-nand", SZ_8K);
#endif
#ifdef CONFIG_SOC_IMX51
const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst =
- imx_mxc_nandv3_data_entry_single(MX51, SZ_16K);
+ imx_mxc_nandv3_data_entry_single(MX51, "imx51-nand", SZ_16K);
#endif
struct platform_device *__init imx_add_mxc_nand(
@@ -76,7 +79,7 @@
.flags = IORESOURCE_MEM,
},
};
- return imx_add_platform_device("mxc_nand", data->id,
+ return imx_add_platform_device(data->devid, data->id,
res, ARRAY_SIZE(res) - !data->axibase,
pdata, sizeof(*pdata));
}
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/mach-imx/devices/platform-mxc_pwm.c
similarity index 96%
rename from arch/arm/plat-mxc/devices/platform-mxc_pwm.c
rename to arch/arm/mach-imx/devices/platform-mxc_pwm.c
index b0c4ae2..dcd2897 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_pwm.c
@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_rnga.c b/arch/arm/mach-imx/devices/platform-mxc_rnga.c
similarity index 95%
rename from arch/arm/plat-mxc/devices/platform-mxc_rnga.c
rename to arch/arm/mach-imx/devices/platform-mxc_rnga.c
index b4b7612..c58404b 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_rnga.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_rnga.c
@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
struct imx_mxc_rnga_data {
resource_size_t iobase;
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_rtc.c b/arch/arm/mach-imx/devices/platform-mxc_rtc.c
similarity index 77%
rename from arch/arm/plat-mxc/devices/platform-mxc_rtc.c
rename to arch/arm/mach-imx/devices/platform-mxc_rtc.c
index a5c9ad5..c7fffaa 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_rtc.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_rtc.c
@@ -6,23 +6,24 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
-#define imx_mxc_rtc_data_entry_single(soc) \
+#define imx_mxc_rtc_data_entry_single(soc, _devid) \
{ \
+ .devid = _devid, \
.iobase = soc ## _RTC_BASE_ADDR, \
.irq = soc ## _INT_RTC, \
}
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_rtc_data imx31_mxc_rtc_data __initconst =
- imx_mxc_rtc_data_entry_single(MX31);
+ imx_mxc_rtc_data_entry_single(MX31, "imx21-rtc");
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_mxc_rtc_data imx35_mxc_rtc_data __initconst =
- imx_mxc_rtc_data_entry_single(MX35);
+ imx_mxc_rtc_data_entry_single(MX35, "imx21-rtc");
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_mxc_rtc(
@@ -40,6 +41,6 @@
},
};
- return imx_add_platform_device("mxc_rtc", -1,
+ return imx_add_platform_device(data->devid, -1,
res, ARRAY_SIZE(res), NULL, 0);
}
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_w1.c b/arch/arm/mach-imx/devices/platform-mxc_w1.c
similarity index 95%
rename from arch/arm/plat-mxc/devices/platform-mxc_w1.c
rename to arch/arm/mach-imx/devices/platform-mxc_w1.c
index 96fa5ea..88c18b7 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_w1.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_w1.c
@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_mxc_w1_data_entry_single(soc) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-pata_imx.c b/arch/arm/mach-imx/devices/platform-pata_imx.c
similarity index 96%
rename from arch/arm/plat-mxc/devices/platform-pata_imx.c
rename to arch/arm/mach-imx/devices/platform-pata_imx.c
index 70e2f2a..e4ec11c 100644
--- a/arch/arm/plat-mxc/devices/platform-pata_imx.c
+++ b/arch/arm/mach-imx/devices/platform-pata_imx.c
@@ -3,8 +3,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_pata_imx_data_entry_single(soc, _size) \
{ \
diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c
similarity index 97%
rename from arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
rename to arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c
index 3793e47..e66a4e3 100644
--- a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
+++ b/arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c
@@ -6,10 +6,11 @@
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
#include <linux/platform_data/mmc-esdhc-imx.h>
+#include "../hardware.h"
+#include "devices-common.h"
+
#define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \
{ \
.devid = _devid, \
diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/mach-imx/devices/platform-spi_imx.c
similarity index 98%
rename from arch/arm/plat-mxc/devices/platform-spi_imx.c
rename to arch/arm/mach-imx/devices/platform-spi_imx.c
index 9c50c14..8880bcb 100644
--- a/arch/arm/plat-mxc/devices/platform-spi_imx.c
+++ b/arch/arm/mach-imx/devices/platform-spi_imx.c
@@ -6,8 +6,8 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
#define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \
{ \
diff --git a/arch/arm/mach-imx/ehci-imx25.c b/arch/arm/mach-imx/ehci-imx25.c
index 412c583..27e40d1 100644
--- a/arch/arm/mach-imx/ehci-imx25.c
+++ b/arch/arm/mach-imx/ehci-imx25.c
@@ -15,10 +15,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
-
-#include <mach/hardware.h>
#include <linux/platform_data/usb-ehci-mxc.h>
+#include "hardware.h"
+
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX25_OTG_SIC_SHIFT 29
diff --git a/arch/arm/mach-imx/ehci-imx27.c b/arch/arm/mach-imx/ehci-imx27.c
index cd6e1f8..448d911 100644
--- a/arch/arm/mach-imx/ehci-imx27.c
+++ b/arch/arm/mach-imx/ehci-imx27.c
@@ -15,10 +15,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
-
-#include <mach/hardware.h>
#include <linux/platform_data/usb-ehci-mxc.h>
+#include "hardware.h"
+
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX27_OTG_SIC_SHIFT 29
diff --git a/arch/arm/mach-imx/ehci-imx31.c b/arch/arm/mach-imx/ehci-imx31.c
index 9a880c7..05de4e1 100644
--- a/arch/arm/mach-imx/ehci-imx31.c
+++ b/arch/arm/mach-imx/ehci-imx31.c
@@ -15,10 +15,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
-
-#include <mach/hardware.h>
#include <linux/platform_data/usb-ehci-mxc.h>
+#include "hardware.h"
+
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX31_OTG_SIC_SHIFT 29
diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c
index 779e16e..a596f70 100644
--- a/arch/arm/mach-imx/ehci-imx35.c
+++ b/arch/arm/mach-imx/ehci-imx35.c
@@ -15,10 +15,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
-
-#include <mach/hardware.h>
#include <linux/platform_data/usb-ehci-mxc.h>
+#include "hardware.h"
+
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX35_OTG_SIC_SHIFT 29
diff --git a/arch/arm/mach-imx/ehci-imx5.c b/arch/arm/mach-imx/ehci-imx5.c
index cf8d00e..e49710b 100644
--- a/arch/arm/mach-imx/ehci-imx5.c
+++ b/arch/arm/mach-imx/ehci-imx5.c
@@ -15,10 +15,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
-
-#include <mach/hardware.h>
#include <linux/platform_data/usb-ehci-mxc.h>
+#include "hardware.h"
+
#define MXC_OTG_OFFSET 0
#define MXC_H1_OFFSET 0x200
#define MXC_H2_OFFSET 0x400
diff --git a/arch/arm/plat-mxc/epit.c b/arch/arm/mach-imx/epit.c
similarity index 98%
rename from arch/arm/plat-mxc/epit.c
rename to arch/arm/mach-imx/epit.c
index 88726f4..04a5961 100644
--- a/arch/arm/plat-mxc/epit.c
+++ b/arch/arm/mach-imx/epit.c
@@ -51,10 +51,10 @@
#include <linux/clockchips.h>
#include <linux/clk.h>
#include <linux/err.h>
-
-#include <mach/hardware.h>
#include <asm/mach/time.h>
-#include <mach/common.h>
+
+#include "common.h"
+#include "hardware.h"
static struct clock_event_device clockevent_epit;
static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;
diff --git a/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h b/arch/arm/mach-imx/eukrea-baseboards.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/eukrea-baseboards.h
rename to arch/arm/mach-imx/eukrea-baseboards.h
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
index 98aef57..b4c7002 100644
--- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
@@ -29,11 +29,10 @@
#include <asm/mach/arch.h>
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
-#include <mach/hardware.h>
-
+#include "common.h"
#include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
static const int eukrea_mbimx27_pins[] __initconst = {
/* UART2 */
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
index 0b84666..e2b70f4c 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
@@ -26,14 +26,14 @@
#include <linux/spi/spi.h>
#include <video/platform_lcd.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx25.h>
-#include <mach/common.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <mach/mx25.h>
+#include "common.h"
#include "devices-imx25.h"
+#include "hardware.h"
+#include "iomux-mx25.h"
+#include "mx25.h"
static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
/* LCD */
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
index c6532a0..5a2d5ef 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
@@ -36,11 +36,10 @@
#include <asm/mach/time.h>
#include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-
+#include "common.h"
#include "devices-imx35.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
static const struct fb_videomode fb_modedb[] = {
{
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
index 8b0de30..9be6c1e 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
@@ -36,11 +36,10 @@
#include <asm/mach/time.h>
#include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx51.h>
-
+#include "common.h"
#include "devices-imx51.h"
+#include "hardware.h"
+#include "iomux-mx51.h"
static iomux_v3_cfg_t eukrea_mbimxsd51_pads[] = {
/* LED */
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/mach-imx/hardware.h
similarity index 93%
rename from arch/arm/plat-mxc/include/mach/hardware.h
rename to arch/arm/mach-imx/hardware.h
index ebf1065..3ce7fa3 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/mach-imx/hardware.h
@@ -105,20 +105,20 @@
#define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x))
-#include <mach/mxc.h>
+#include "mxc.h"
-#include <mach/mx6q.h>
-#include <mach/mx50.h>
-#include <mach/mx51.h>
-#include <mach/mx53.h>
-#include <mach/mx3x.h>
-#include <mach/mx31.h>
-#include <mach/mx35.h>
-#include <mach/mx2x.h>
-#include <mach/mx21.h>
-#include <mach/mx27.h>
-#include <mach/mx1.h>
-#include <mach/mx25.h>
+#include "mx6q.h"
+#include "mx50.h"
+#include "mx51.h"
+#include "mx53.h"
+#include "mx3x.h"
+#include "mx31.h"
+#include "mx35.h"
+#include "mx2x.h"
+#include "mx21.h"
+#include "mx27.h"
+#include "mx1.h"
+#include "mx25.h"
#define imx_map_entry(soc, name, _type) { \
.virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \
diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c
index b07b778..3dec962 100644
--- a/arch/arm/mach-imx/hotplug.c
+++ b/arch/arm/mach-imx/hotplug.c
@@ -13,7 +13,8 @@
#include <linux/errno.h>
#include <asm/cacheflush.h>
#include <asm/cp15.h>
-#include <mach/common.h>
+
+#include "common.h"
static inline void cpu_enter_lowpower(void)
{
diff --git a/arch/arm/plat-mxc/include/mach/iim.h b/arch/arm/mach-imx/iim.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/iim.h
rename to arch/arm/mach-imx/iim.h
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c
index e80d523..ebfae96 100644
--- a/arch/arm/mach-imx/imx27-dt.c
+++ b/arch/arm/mach-imx/imx27-dt.c
@@ -14,21 +14,22 @@
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/mx27.h>
+
+#include "common.h"
+#include "mx27.h"
static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {
OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART1_BASE_ADDR, "imx21-uart.0", NULL),
OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART2_BASE_ADDR, "imx21-uart.1", NULL),
OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART3_BASE_ADDR, "imx21-uart.2", NULL),
OF_DEV_AUXDATA("fsl,imx27-fec", MX27_FEC_BASE_ADDR, "imx27-fec.0", NULL),
- OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
- OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
+ OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx21-i2c.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx21-i2c.1", NULL),
OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI1_BASE_ADDR, "imx27-cspi.0", NULL),
OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI2_BASE_ADDR, "imx27-cspi.1", NULL),
OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL),
OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL),
- OF_DEV_AUXDATA("fsl,imx27-nand", MX27_NFC_BASE_ADDR, "mxc_nand.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx27-nand", MX27_NFC_BASE_ADDR, "imx27-nand.0", NULL),
{ /* sentinel */ }
};
diff --git a/arch/arm/mach-imx/imx31-dt.c b/arch/arm/mach-imx/imx31-dt.c
index a68ba20..af476de 100644
--- a/arch/arm/mach-imx/imx31-dt.c
+++ b/arch/arm/mach-imx/imx31-dt.c
@@ -14,8 +14,9 @@
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/mx31.h>
+
+#include "common.h"
+#include "mx31.h"
static const struct of_dev_auxdata imx31_auxdata_lookup[] __initconst = {
OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART1_BASE_ADDR,
diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c
index f233b4b..5074299 100644
--- a/arch/arm/mach-imx/imx51-dt.c
+++ b/arch/arm/mach-imx/imx51-dt.c
@@ -15,8 +15,9 @@
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/mx51.h>
+
+#include "common.h"
+#include "mx51.h"
/*
* Lookup table for attaching a specific name and platform_data pointer to
@@ -36,8 +37,8 @@
OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
- OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
- OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx21-i2c.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx21-i2c.1", NULL),
OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL),
OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
{ /* sentinel */ }
diff --git a/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h b/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h
deleted file mode 100644
index df5f522..0000000
--- a/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef __MACH_DMA_MX1_MX2_H__
-#define __MACH_DMA_MX1_MX2_H__
-/*
- * Don't use this header in new code, it will go away when all users are
- * converted to mach/dma-v1.h
- */
-
-#include <mach/dma-v1.h>
-
-#endif /* ifndef __MACH_DMA_MX1_MX2_H__ */
diff --git a/arch/arm/mach-imx/iomux-imx31.c b/arch/arm/mach-imx/iomux-imx31.c
index 82bd440..cabefbc 100644
--- a/arch/arm/mach-imx/iomux-imx31.c
+++ b/arch/arm/mach-imx/iomux-imx31.c
@@ -22,8 +22,9 @@
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/kernel.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
+
+#include "hardware.h"
+#include "iomux-mx3.h"
/*
* IOMUX register (base) addresses
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1.h b/arch/arm/mach-imx/iomux-mx1.h
similarity index 99%
rename from arch/arm/plat-mxc/include/mach/iomux-mx1.h
rename to arch/arm/mach-imx/iomux-mx1.h
index 6b1507c..95f4681 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx1.h
+++ b/arch/arm/mach-imx/iomux-mx1.h
@@ -18,7 +18,7 @@
#ifndef __MACH_IOMUX_MX1_H__
#define __MACH_IOMUX_MX1_H__
-#include <mach/iomux-v1.h>
+#include "iomux-v1.h"
#define PA0_AIN_SPI2_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
#define PA0_AF_ETMTRACESYNC (GPIO_PORTA | GPIO_AF | 0)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx21.h b/arch/arm/mach-imx/iomux-mx21.h
similarity index 98%
rename from arch/arm/plat-mxc/include/mach/iomux-mx21.h
rename to arch/arm/mach-imx/iomux-mx21.h
index 1495dfd..a70cffc 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx21.h
+++ b/arch/arm/mach-imx/iomux-mx21.h
@@ -18,8 +18,8 @@
#ifndef __MACH_IOMUX_MX21_H__
#define __MACH_IOMUX_MX21_H__
-#include <mach/iomux-mx2x.h>
-#include <mach/iomux-v1.h>
+#include "iomux-mx2x.h"
+#include "iomux-v1.h"
/* Primary GPIO pin functions */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/mach-imx/iomux-mx25.h
similarity index 99%
rename from arch/arm/plat-mxc/include/mach/iomux-mx25.h
rename to arch/arm/mach-imx/iomux-mx25.h
index c61ec0f..be51e83 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/mach-imx/iomux-mx25.h
@@ -19,7 +19,7 @@
#ifndef __MACH_IOMUX_MX25_H__
#define __MACH_IOMUX_MX25_H__
-#include <mach/iomux-v3.h>
+#include "iomux-v3.h"
/*
* IOMUX/PAD Bit field definitions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx27.h b/arch/arm/mach-imx/iomux-mx27.h
similarity index 99%
rename from arch/arm/plat-mxc/include/mach/iomux-mx27.h
rename to arch/arm/mach-imx/iomux-mx27.h
index d9f9a6e..218e99e 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx27.h
+++ b/arch/arm/mach-imx/iomux-mx27.h
@@ -19,8 +19,8 @@
#ifndef __MACH_IOMUX_MX27_H__
#define __MACH_IOMUX_MX27_H__
-#include <mach/iomux-mx2x.h>
-#include <mach/iomux-v1.h>
+#include "iomux-mx2x.h"
+#include "iomux-v1.h"
/* Primary GPIO pin functions */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/mach-imx/iomux-mx2x.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/iomux-mx2x.h
rename to arch/arm/mach-imx/iomux-mx2x.h
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/iomux-mx3.h
rename to arch/arm/mach-imx/iomux-mx3.h
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx35.h b/arch/arm/mach-imx/iomux-mx35.h
similarity index 99%
rename from arch/arm/plat-mxc/include/mach/iomux-mx35.h
rename to arch/arm/mach-imx/iomux-mx35.h
index 3117c18..90bfa6b 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx35.h
+++ b/arch/arm/mach-imx/iomux-mx35.h
@@ -19,7 +19,7 @@
#ifndef __MACH_IOMUX_MX35_H__
#define __MACH_IOMUX_MX35_H__
-#include <mach/iomux-v3.h>
+#include "iomux-v3.h"
/*
* The naming convention for the pad modes is MX35_PAD_<padname>__<padmode>
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx50.h b/arch/arm/mach-imx/iomux-mx50.h
similarity index 99%
rename from arch/arm/plat-mxc/include/mach/iomux-mx50.h
rename to arch/arm/mach-imx/iomux-mx50.h
index 98e7fd0..00f56e0 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx50.h
+++ b/arch/arm/mach-imx/iomux-mx50.h
@@ -19,7 +19,7 @@
#ifndef __MACH_IOMUX_MX50_H__
#define __MACH_IOMUX_MX50_H__
-#include <mach/iomux-v3.h>
+#include "iomux-v3.h"
#define MX50_ELCDIF_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/mach-imx/iomux-mx51.h
similarity index 99%
rename from arch/arm/plat-mxc/include/mach/iomux-mx51.h
rename to arch/arm/mach-imx/iomux-mx51.h
index 2623e7a..75bbcc4 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h
+++ b/arch/arm/mach-imx/iomux-mx51.h
@@ -13,7 +13,7 @@
#ifndef __MACH_IOMUX_MX51_H__
#define __MACH_IOMUX_MX51_H__
-#include <mach/iomux-v3.h>
+#include "iomux-v3.h"
#define __NA_ 0x000
diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/mach-imx/iomux-v1.c
similarity index 98%
rename from arch/arm/plat-mxc/iomux-v1.c
rename to arch/arm/mach-imx/iomux-v1.c
index 1f73963..2b156d1 100644
--- a/arch/arm/plat-mxc/iomux-v1.c
+++ b/arch/arm/mach-imx/iomux-v1.c
@@ -28,9 +28,10 @@
#include <linux/string.h>
#include <linux/gpio.h>
-#include <mach/hardware.h>
#include <asm/mach/map.h>
-#include <mach/iomux-v1.h>
+
+#include "hardware.h"
+#include "iomux-v1.h"
static void __iomem *imx_iomuxv1_baseaddr;
static unsigned imx_iomuxv1_numports;
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/mach-imx/iomux-v1.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/iomux-v1.h
rename to arch/arm/mach-imx/iomux-v1.h
diff --git a/arch/arm/plat-mxc/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c
similarity index 97%
rename from arch/arm/plat-mxc/iomux-v3.c
rename to arch/arm/mach-imx/iomux-v3.c
index 99a9cdb..9dae74b 100644
--- a/arch/arm/plat-mxc/iomux-v3.c
+++ b/arch/arm/mach-imx/iomux-v3.c
@@ -25,9 +25,10 @@
#include <linux/string.h>
#include <linux/gpio.h>
-#include <mach/hardware.h>
#include <asm/mach/map.h>
-#include <mach/iomux-v3.h>
+
+#include "hardware.h"
+#include "iomux-v3.h"
static void __iomem *base;
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/mach-imx/iomux-v3.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/iomux-v3.h
rename to arch/arm/mach-imx/iomux-v3.h
diff --git a/arch/arm/plat-mxc/include/mach/iram.h b/arch/arm/mach-imx/iram.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/iram.h
rename to arch/arm/mach-imx/iram.h
diff --git a/arch/arm/plat-mxc/iram_alloc.c b/arch/arm/mach-imx/iram_alloc.c
similarity index 98%
rename from arch/arm/plat-mxc/iram_alloc.c
rename to arch/arm/mach-imx/iram_alloc.c
index 074c386..6c80424 100644
--- a/arch/arm/plat-mxc/iram_alloc.c
+++ b/arch/arm/mach-imx/iram_alloc.c
@@ -22,7 +22,8 @@
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/genalloc.h>
-#include <mach/iram.h>
+
+#include "iram.h"
static unsigned long iram_phys_base;
static void __iomem *iram_virt_base;
diff --git a/arch/arm/plat-mxc/irq-common.c b/arch/arm/mach-imx/irq-common.c
similarity index 100%
rename from arch/arm/plat-mxc/irq-common.c
rename to arch/arm/mach-imx/irq-common.c
diff --git a/arch/arm/plat-mxc/irq-common.h b/arch/arm/mach-imx/irq-common.h
similarity index 94%
rename from arch/arm/plat-mxc/irq-common.h
rename to arch/arm/mach-imx/irq-common.h
index 6ccb3a1..5b2dabb 100644
--- a/arch/arm/plat-mxc/irq-common.h
+++ b/arch/arm/mach-imx/irq-common.h
@@ -19,6 +19,9 @@
#ifndef __PLAT_MXC_IRQ_COMMON_H__
#define __PLAT_MXC_IRQ_COMMON_H__
+/* all normal IRQs can be FIQs */
+#define FIQ_START 0
+
struct mxc_extra_irq
{
int (*set_priority)(unsigned char irq, unsigned char prio);
diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c
index c40a34c..5f15103 100644
--- a/arch/arm/mach-imx/lluart.c
+++ b/arch/arm/mach-imx/lluart.c
@@ -14,7 +14,8 @@
#include <asm/page.h>
#include <asm/sizes.h>
#include <asm/mach/map.h>
-#include <mach/hardware.h>
+
+#include "hardware.h"
static struct map_desc imx_lluart_desc = {
#ifdef CONFIG_DEBUG_IMX6Q_UART2
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index 7b99a79..5c9bd2c 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -25,11 +25,10 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx1.h>
-
+#include "common.h"
#include "devices-imx1.h"
+#include "hardware.h"
+#include "iomux-mx1.h"
static const int apf9328_pins[] __initconst = {
/* UART1 */
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 5985ed1..59bd6b0 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -41,19 +41,18 @@
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
-
+#include "common.h"
#include "devices-imx31.h"
#include "crmregs-imx3.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
static int armadillo5x0_pins[] = {
/* UART1 */
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c
index 9a98977..3a39d5a 100644
--- a/arch/arm/mach-imx/mach-bug.c
+++ b/arch/arm/mach-imx/mach-bug.c
@@ -19,15 +19,14 @@
#include <linux/init.h>
#include <linux/platform_device.h>
-#include <mach/iomux-mx3.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-
#include <asm/mach/time.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index 2bb9e18..12a3706 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -34,13 +34,12 @@
#include <asm/mach/time.h>
#include <asm/mach/map.h>
-#include <mach/eukrea-baseboards.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx27.h>
-#include <mach/ulpi.h>
-
+#include "common.h"
#include "devices-imx27.h"
+#include "eukrea-baseboards.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
+#include "ulpi.h"
static const int eukrea_cpuimx27_pins[] __initconst = {
/* UART1 */
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index d49b0ec..5a31bf8 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -37,12 +37,11 @@
#include <asm/mach/time.h>
#include <asm/mach/map.h>
-#include <mach/eukrea-baseboards.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-
+#include "common.h"
#include "devices-imx35.h"
+#include "eukrea-baseboards.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
diff --git a/arch/arm/mach-imx/mach-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c
index b87cc49..b727de0 100644
--- a/arch/arm/mach-imx/mach-cpuimx51sd.c
+++ b/arch/arm/mach-imx/mach-cpuimx51sd.c
@@ -26,18 +26,17 @@
#include <linux/spi/spi.h>
#include <linux/can/platform/mcp251x.h>
-#include <mach/eukrea-baseboards.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx51.h>
-
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include "common.h"
#include "devices-imx51.h"
#include "cpu_op-mx51.h"
+#include "eukrea-baseboards.h"
+#include "hardware.h"
+#include "iomux-mx51.h"
#define USBH1_RST IMX_GPIO_NR(2, 28)
#define ETH_RST IMX_GPIO_NR(2, 31)
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index 017bbb7..75027a5 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -27,18 +27,18 @@
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
-#include <mach/eukrea-baseboards.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/mx25.h>
-#include <mach/iomux-mx25.h>
+#include "common.h"
#include "devices-imx25.h"
+#include "eukrea-baseboards.h"
+#include "hardware.h"
+#include "iomux-mx25.h"
+#include "mx25.h"
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 141756f..b744226 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -40,11 +40,11 @@
#include <asm/mach/time.h>
#include <asm/system_info.h>
#include <asm/memblock.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx27.h>
+#include "common.h"
#include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
#define TVP5150_RSTN (GPIO_PORTC + 18)
#define TVP5150_PWDN (GPIO_PORTC + 19)
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c
index 7381387..53a8601 100644
--- a/arch/arm/mach-imx/mach-imx27ipcam.c
+++ b/arch/arm/mach-imx/mach-imx27ipcam.c
@@ -17,11 +17,11 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
+#include "hardware.h"
+#include "common.h"
#include "devices-imx27.h"
+#include "iomux-mx27.h"
static const int mx27ipcam_pins[] __initconst = {
/* UART1 */
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index 1f45b91..fc8dce9 100644
--- a/arch/arm/mach-imx/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -20,11 +20,11 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
+#include "common.h"
#include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
static const int mx27lite_pins[] __initconst = {
/* UART1 */
diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c
index 29711e9..e71e6261 100644
--- a/arch/arm/mach-imx/mach-imx53.c
+++ b/arch/arm/mach-imx/mach-imx53.c
@@ -19,8 +19,9 @@
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/mx53.h>
+
+#include "common.h"
+#include "mx53.h"
/*
* Lookup table for attaching a specific name and platform_data pointer to
@@ -42,9 +43,9 @@
OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
- OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
- OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
- OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx-i2c.2", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx21-i2c.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx21-i2c.1", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx21-i2c.2", NULL),
OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL),
OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
{ /* sentinel */ }
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 47c91f7..978b6dd 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -33,10 +33,10 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/system_misc.h>
-#include <mach/common.h>
-#include <mach/cpuidle.h>
-#include <mach/hardware.h>
+#include "common.h"
+#include "cpuidle.h"
+#include "hardware.h"
void imx6q_restart(char mode, const char *cmd)
{
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index 0330078..2e536ea5 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -36,11 +36,10 @@
#include <asm/mach/map.h>
#include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
#define KZM_ARM11_IO_ADDRESS(x) (IOMEM( \
IMX_IO_P2V_MODULE(x, MX31_CS4) ?: \
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index 667f359..06b4837 100644
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -23,11 +23,10 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx1.h>
-
+#include "common.h"
#include "devices-imx1.h"
+#include "hardware.h"
+#include "iomux-mx1.h"
static const int mx1ads_pins[] __initconst = {
/* UART1 */
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index ed22e3f..6adb313 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -18,15 +18,15 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/physmap.h>
#include <linux/gpio.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
-#include <mach/iomux-mx21.h>
+#include "common.h"
#include "devices-imx21.h"
+#include "hardware.h"
+#include "iomux-mx21.h"
/*
* Memory-mapped I/O on MX21ADS base board
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index ce247fd..b1b03aa 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -31,17 +31,17 @@
#include <linux/platform_device.h>
#include <linux/usb/otg.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/mx25.h>
-#include <mach/iomux-mx25.h>
+#include "common.h"
#include "devices-imx25.h"
+#include "hardware.h"
+#include "iomux-mx25.h"
+#include "mx25.h"
#define MX25PDK_CAN_PWDN IMX_GPIO_NR(4, 6)
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 05996f3..d0e547f 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -36,13 +36,13 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
-#include <mach/ulpi.h>
-#include <mach/3ds_debugboard.h>
+#include "3ds_debugboard.h"
+#include "common.h"
#include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
+#include "ulpi.h"
#define SD1_EN_GPIO IMX_GPIO_NR(2, 25)
#define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23)
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index 7dc59ba..3d036f5 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -21,15 +21,15 @@
#include <linux/mtd/physmap.h>
#include <linux/i2c.h>
#include <linux/irq.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
-#include <mach/iomux-mx27.h>
+#include "common.h"
#include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
/*
* Base address of PBC controller, CS4
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index 8915f93..bc301be 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -30,19 +30,19 @@
#include <media/soc_camera.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>
#include <asm/memblock.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/3ds_debugboard.h>
-#include <mach/ulpi.h>
+#include "3ds_debugboard.h"
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
static int mx31_3ds_pins[] = {
/* UART1 */
@@ -393,7 +393,7 @@
};
static struct regulator_consumer_supply vmmc2_consumers[] = {
- REGULATOR_SUPPLY("vmmc", "mxc-mmc.0"),
+ REGULATOR_SUPPLY("vmmc", "imx31-mmc.0"),
};
static struct regulator_init_data vmmc2_init = {
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index e774b07..8b56f88 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -28,8 +28,6 @@
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
#include <linux/mfd/wm8350/audio.h>
@@ -37,7 +35,10 @@
#include <linux/mfd/wm8350/pmic.h>
#endif
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
/* Base address of PBC controller */
#define PBC_BASE_ADDRESS MX31_CS4_BASE_ADDR_VIRT
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 34b9bf0..08b9965 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -42,13 +42,12 @@
#include <asm/mach/time.h>
#include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/board-mx31lilly.h>
-#include <mach/ulpi.h>
-
+#include "board-mx31lilly.h"
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
/*
* This file contains module-specific initialization routines for LILLY-1131.
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index ef57cff..bdcd92e 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -39,13 +39,12 @@
#include <asm/page.h>
#include <asm/setup.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/board-mx31lite.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
-
+#include "board-mx31lite.h"
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
/*
* This file contains the module-specific initialization routines.
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c
index 459e754..2517cfa 100644
--- a/arch/arm/mach-imx/mach-mx31moboard.c
+++ b/arch/arm/mach-imx/mach-mx31moboard.c
@@ -42,14 +42,14 @@
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <asm/memblock.h>
-#include <mach/board-mx31moboard.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
#include <linux/platform_data/asoc-imx-ssi.h>
+#include "board-mx31moboard.h"
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
static unsigned int moboard_pins[] = {
/* UART0 */
@@ -175,11 +175,11 @@
static struct regulator_consumer_supply sdhc_consumers[] = {
{
- .dev_name = "mxc-mmc.0",
+ .dev_name = "imx31-mmc.0",
.supply = "sdhc0_vcc",
},
{
- .dev_name = "mxc-mmc.1",
+ .dev_name = "imx31-mmc.1",
.supply = "sdhc1_vcc",
},
};
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index 504983c..5277da4 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -43,15 +43,15 @@
#include <asm/mach/map.h>
#include <asm/memblock.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-#include <mach/3ds_debugboard.h>
#include <video/platform_lcd.h>
#include <media/soc_camera.h>
+#include "3ds_debugboard.h"
+#include "common.h"
#include "devices-imx35.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
#define GPIO_MC9S08DZ60_GPS_ENABLE 0
#define GPIO_MC9S08DZ60_HDD_ENABLE 4
diff --git a/arch/arm/mach-imx/mach-mx50_rdp.c b/arch/arm/mach-imx/mach-mx50_rdp.c
index 42b66e8..0c1f88a 100644
--- a/arch/arm/mach-imx/mach-mx50_rdp.c
+++ b/arch/arm/mach-imx/mach-mx50_rdp.c
@@ -24,17 +24,16 @@
#include <linux/delay.h>
#include <linux/io.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx50.h>
-
#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include "common.h"
#include "devices-imx50.h"
+#include "hardware.h"
+#include "iomux-mx50.h"
#define FEC_EN IMX_GPIO_NR(6, 23)
#define FEC_RESET_B IMX_GPIO_NR(4, 12)
diff --git a/arch/arm/mach-imx/mach-mx51_3ds.c b/arch/arm/mach-imx/mach-mx51_3ds.c
index 9ee84a4..abc25bd 100644
--- a/arch/arm/mach-imx/mach-mx51_3ds.c
+++ b/arch/arm/mach-imx/mach-mx51_3ds.c
@@ -19,12 +19,11 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx51.h>
-#include <mach/3ds_debugboard.h>
-
+#include "3ds_debugboard.h"
+#include "common.h"
#include "devices-imx51.h"
+#include "hardware.h"
+#include "iomux-mx51.h"
#define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28)
diff --git a/arch/arm/mach-imx/mach-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c
index 7b31cbd..d9a84ca 100644
--- a/arch/arm/mach-imx/mach-mx51_babbage.c
+++ b/arch/arm/mach-imx/mach-mx51_babbage.c
@@ -20,17 +20,16 @@
#include <linux/spi/flash.h>
#include <linux/spi/spi.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx51.h>
-
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include "common.h"
#include "devices-imx51.h"
#include "cpu_op-mx51.h"
+#include "hardware.h"
+#include "iomux-mx51.h"
#define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7)
#define BABBAGE_USBH1_STP IMX_GPIO_NR(1, 27)
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index 0bf6d30..f4a8c7e 100644
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -21,17 +21,17 @@
#include <linux/mtd/physmap.h>
#include <linux/i2c.h>
#include <linux/irq.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <linux/gpio.h>
-#include <mach/iomux-mx27.h>
#include <linux/i2c/pca953x.h>
+#include "common.h"
#include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
static const int mxt_td60_pins[] __initconst = {
/* UART0 */
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index de8516b..eee369f 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -32,13 +32,13 @@
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx27.h>
#include <asm/mach/time.h>
-#include <mach/ulpi.h>
+#include "common.h"
#include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
+#include "ulpi.h"
#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c
index e3c4513..547fef1 100644
--- a/arch/arm/mach-imx/mach-pcm037.c
+++ b/arch/arm/mach-imx/mach-pcm037.c
@@ -42,13 +42,13 @@
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <asm/memblock.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
#include "pcm037.h"
+#include "ulpi.h"
static enum pcm037_board_variant pcm037_instance = PCM037_PCM970;
diff --git a/arch/arm/mach-imx/mach-pcm037_eet.c b/arch/arm/mach-imx/mach-pcm037_eet.c
index 11ffa81..8fd8255 100644
--- a/arch/arm/mach-imx/mach-pcm037_eet.c
+++ b/arch/arm/mach-imx/mach-pcm037_eet.c
@@ -11,13 +11,12 @@
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-
#include <asm/mach-types.h>
#include "pcm037.h"
+#include "common.h"
#include "devices-imx31.h"
+#include "iomux-mx3.h"
static unsigned int pcm037_eet_pins[] = {
/* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 95f49d9..4aa0d07 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -33,13 +33,12 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
-#include <mach/board-pcm038.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx27.h>
-#include <mach/ulpi.h>
-
+#include "board-pcm038.h"
+#include "common.h"
#include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
+#include "ulpi.h"
static const int pcm038_pins[] __initconst = {
/* UART1 */
@@ -212,7 +211,7 @@
static struct regulator_consumer_supply sdhc1_consumers[] = {
{
- .dev_name = "mxc-mmc.1",
+ .dev_name = "imx21-mmc.1",
.supply = "sdhc_vcc",
},
};
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c
index e4bd438..9244544 100644
--- a/arch/arm/mach-imx/mach-pcm043.c
+++ b/arch/arm/mach-imx/mach-pcm043.c
@@ -33,12 +33,11 @@
#include <asm/mach/time.h>
#include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-#include <mach/ulpi.h>
-
+#include "common.h"
#include "devices-imx35.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
+#include "ulpi.h"
static const struct fb_videomode fb_modedb[] = {
{
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c
index fb25fbd..96d9a91 100644
--- a/arch/arm/mach-imx/mach-qong.c
+++ b/arch/arm/mach-imx/mach-qong.c
@@ -21,17 +21,17 @@
#include <linux/mtd/nand.h>
#include <linux/gpio.h>
-#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
-#include <mach/common.h>
#include <asm/page.h>
#include <asm/setup.h>
-#include <mach/iomux-mx3.h>
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
/* FPGA defines */
#define QONG_FPGA_VERSION(major, minor, rev) \
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index 67ff38e..fc97040 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -20,11 +20,10 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx1.h>
-
+#include "common.h"
#include "devices-imx1.h"
+#include "hardware.h"
+#include "iomux-mx1.h"
/*
* This scb9328 has a 32MiB flash
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c
index 39eb796..3aecf91 100644
--- a/arch/arm/mach-imx/mach-vpr200.c
+++ b/arch/arm/mach-imx/mach-vpr200.c
@@ -28,15 +28,14 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/mfd/mc13xxx.h>
+#include "common.h"
#include "devices-imx35.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
#define GPIO_LCDPWR IMX_GPIO_NR(1, 2)
#define GPIO_PMIC_INT IMX_GPIO_NR(2, 0)
diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c
index 6d60d51..7a14667 100644
--- a/arch/arm/mach-imx/mm-imx1.c
+++ b/arch/arm/mach-imx/mm-imx1.c
@@ -22,9 +22,10 @@
#include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-v1.h>
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v1.h"
static struct map_desc imx_io_desc[] __initdata = {
imx_map_entry(MX1, IO, MT_DEVICE),
@@ -58,5 +59,7 @@
MX1_GPIO_INT_PORTC, 0);
mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256,
MX1_GPIO_INT_PORTD, 0);
+ imx_add_imx_dma("imx1-dma", MX1_DMA_BASE_ADDR,
+ MX1_DMA_INT, MX1_DMA_ERR);
pinctrl_provide_dummies();
}
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
index d056dad..d8ccd3a 100644
--- a/arch/arm/mach-imx/mm-imx21.c
+++ b/arch/arm/mach-imx/mm-imx21.c
@@ -21,12 +21,13 @@
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/pinctrl/machine.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/devices-common.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
-#include <mach/iomux-v1.h>
+
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v1.h"
/* MX21 memory map definition */
static struct map_desc imx21_io_desc[] __initdata = {
@@ -81,6 +82,8 @@
void __init imx21_soc_init(void)
{
+ mxc_device_init();
+
mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
mxc_register_gpio("imx21-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
mxc_register_gpio("imx21-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
@@ -89,7 +92,8 @@
mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
pinctrl_provide_dummies();
- imx_add_imx_dma();
+ imx_add_imx_dma("imx21-dma", MX21_DMA_BASE_ADDR,
+ MX21_INT_DMACH0, 0); /* No ERR irq */
platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res,
ARRAY_SIZE(imx21_audmux_res));
}
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c
index f3f5c65..9357707 100644
--- a/arch/arm/mach-imx/mm-imx25.c
+++ b/arch/arm/mach-imx/mm-imx25.c
@@ -24,11 +24,11 @@
#include <asm/pgtable.h>
#include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/devices-common.h>
-#include <mach/hardware.h>
-#include <mach/mx25.h>
-#include <mach/iomux-v3.h>
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v3.h"
+#include "mx25.h"
/*
* This table defines static virtual address mappings for I/O regions.
@@ -89,6 +89,8 @@
void __init imx25_soc_init(void)
{
+ mxc_device_init();
+
/* i.mx25 has the i.mx35 type gpio */
mxc_register_gpio("imx35-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0);
mxc_register_gpio("imx35-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
index e7e24af..4f1be65 100644
--- a/arch/arm/mach-imx/mm-imx27.c
+++ b/arch/arm/mach-imx/mm-imx27.c
@@ -21,12 +21,13 @@
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/pinctrl/machine.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/devices-common.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
-#include <mach/iomux-v1.h>
+
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v1.h"
/* MX27 memory map definition */
static struct map_desc imx27_io_desc[] __initdata = {
@@ -81,6 +82,8 @@
void __init imx27_soc_init(void)
{
+ mxc_device_init();
+
/* i.mx27 has the i.mx21 type gpio */
mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
@@ -90,7 +93,8 @@
mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
pinctrl_provide_dummies();
- imx_add_imx_dma();
+ imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR,
+ MX27_INT_DMACH0, 0); /* No ERR irq */
/* imx27 has the imx21 type audmux */
platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res,
ARRAY_SIZE(imx27_audmux_res));
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index b5deb05..cefa047 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -26,12 +26,11 @@
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/devices-common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-v3.h>
-
+#include "common.h"
#include "crmregs-imx3.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v3.h"
void __iomem *mx3_ccm_base;
@@ -175,6 +174,8 @@
imx3_init_l2x0();
+ mxc_device_init();
+
mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0);
mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0);
mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0);
@@ -271,6 +272,8 @@
imx3_init_l2x0();
+ mxc_device_init();
+
mxc_register_gpio("imx35-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
mxc_register_gpio("imx35-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
mxc_register_gpio("imx35-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index acb0aad..79d71cf 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -18,10 +18,10 @@
#include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/devices-common.h>
-#include <mach/iomux-v3.h>
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v3.h"
/*
* Define the MX50 memory map.
@@ -81,8 +81,28 @@
mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR));
}
+/*
+ * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by
+ * the Freescale marketing division. However this did not remove the
+ * hardware from the chip which still needs to be configured for proper
+ * IPU support.
+ */
+static void __init imx51_ipu_mipi_setup(void)
+{
+ void __iomem *hsc_addr;
+ hsc_addr = MX51_IO_ADDRESS(MX51_MIPI_HSC_BASE_ADDR);
+
+ /* setup MIPI module to legacy mode */
+ __raw_writel(0xf00, hsc_addr);
+
+ /* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */
+ __raw_writel(__raw_readl(hsc_addr + 0x800) | 0x30ff,
+ hsc_addr + 0x800);
+}
+
void __init imx51_init_early(void)
{
+ imx51_ipu_mipi_setup();
mxc_set_cpu_type(MXC_CPU_MX51);
mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
@@ -138,6 +158,8 @@
void __init imx50_soc_init(void)
{
+ mxc_device_init();
+
/* i.mx50 has the i.mx35 type gpio */
mxc_register_gpio("imx35-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
mxc_register_gpio("imx35-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
@@ -153,6 +175,8 @@
void __init imx51_soc_init(void)
{
+ mxc_device_init();
+
/* i.mx51 has the i.mx35 type gpio */
mxc_register_gpio("imx35-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH);
mxc_register_gpio("imx35-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH);
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/mach-imx/mx1.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/mx1.h
rename to arch/arm/mach-imx/mx1.h
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/mach-imx/mx21.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/mx21.h
rename to arch/arm/mach-imx/mx21.h
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/mach-imx/mx25.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/mx25.h
rename to arch/arm/mach-imx/mx25.h
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/mach-imx/mx27.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/mx27.h
rename to arch/arm/mach-imx/mx27.h
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/mach-imx/mx2x.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/mx2x.h
rename to arch/arm/mach-imx/mx2x.h
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/mach-imx/mx31.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/mx31.h
rename to arch/arm/mach-imx/mx31.h
diff --git a/arch/arm/mach-imx/mx31lilly-db.c b/arch/arm/mach-imx/mx31lilly-db.c
index 29e890f..d4361b8 100644
--- a/arch/arm/mach-imx/mx31lilly-db.c
+++ b/arch/arm/mach-imx/mx31lilly-db.c
@@ -30,12 +30,11 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/board-mx31lilly.h>
-
+#include "board-mx31lilly.h"
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
/*
* This file contains board-specific initialization routines for the
diff --git a/arch/arm/mach-imx/mx31lite-db.c b/arch/arm/mach-imx/mx31lite-db.c
index 83d17d9..5a160b7 100644
--- a/arch/arm/mach-imx/mx31lite-db.c
+++ b/arch/arm/mach-imx/mx31lite-db.c
@@ -31,12 +31,11 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/board-mx31lite.h>
-
+#include "board-mx31lite.h"
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
/*
* This file contains board-specific initialization routines for the
diff --git a/arch/arm/mach-imx/mx31moboard-devboard.c b/arch/arm/mach-imx/mx31moboard-devboard.c
index cc285e5..52d5b15 100644
--- a/arch/arm/mach-imx/mx31moboard-devboard.c
+++ b/arch/arm/mach-imx/mx31moboard-devboard.c
@@ -22,12 +22,11 @@
#include <linux/usb/otg.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/hardware.h>
-#include <mach/ulpi.h>
-
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
static unsigned int devboard_pins[] = {
/* UART1 */
diff --git a/arch/arm/mach-imx/mx31moboard-marxbot.c b/arch/arm/mach-imx/mx31moboard-marxbot.c
index 135c90e..a4f43e9 100644
--- a/arch/arm/mach-imx/mx31moboard-marxbot.c
+++ b/arch/arm/mach-imx/mx31moboard-marxbot.c
@@ -24,14 +24,13 @@
#include <linux/usb/otg.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
-
#include <media/soc_camera.h>
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
static unsigned int marxbot_pins[] = {
/* SDHC2 */
diff --git a/arch/arm/mach-imx/mx31moboard-smartbot.c b/arch/arm/mach-imx/mx31moboard-smartbot.c
index fabb801..04ae45d 100644
--- a/arch/arm/mach-imx/mx31moboard-smartbot.c
+++ b/arch/arm/mach-imx/mx31moboard-smartbot.c
@@ -23,15 +23,14 @@
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-#include <mach/board-mx31moboard.h>
-#include <mach/ulpi.h>
-
#include <media/soc_camera.h>
+#include "board-mx31moboard.h"
+#include "common.h"
#include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
static unsigned int smartbot_pins[] = {
/* UART1 */
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/mach-imx/mx35.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/mx35.h
rename to arch/arm/mach-imx/mx35.h
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/mach-imx/mx3x.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/mx3x.h
rename to arch/arm/mach-imx/mx3x.h
diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/mach-imx/mx50.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/mx50.h
rename to arch/arm/mach-imx/mx50.h
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/mach-imx/mx51.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/mx51.h
rename to arch/arm/mach-imx/mx51.h
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/mach-imx/mx53.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/mx53.h
rename to arch/arm/mach-imx/mx53.h
diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/mach-imx/mx6q.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/mx6q.h
rename to arch/arm/mach-imx/mx6q.h
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/mach-imx/mxc.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/mxc.h
rename to arch/arm/mach-imx/mxc.h
diff --git a/arch/arm/mach-imx/pcm970-baseboard.c b/arch/arm/mach-imx/pcm970-baseboard.c
index 9917e2f..51c6082 100644
--- a/arch/arm/mach-imx/pcm970-baseboard.c
+++ b/arch/arm/mach-imx/pcm970-baseboard.c
@@ -23,11 +23,10 @@
#include <asm/mach/arch.h>
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
-#include <mach/hardware.h>
-
+#include "common.h"
#include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
static const int pcm970_pins[] __initconst = {
/* SDHC */
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 2ac43e1..3777b80 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -16,8 +16,9 @@
#include <asm/smp_scu.h>
#include <asm/hardware/gic.h>
#include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
+
+#include "common.h"
+#include "hardware.h"
static void __iomem *scu_base;
diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c
index 6fcffa7..56d02d0 100644
--- a/arch/arm/mach-imx/pm-imx27.c
+++ b/arch/arm/mach-imx/pm-imx27.c
@@ -10,7 +10,8 @@
#include <linux/kernel.h>
#include <linux/suspend.h>
#include <linux/io.h>
-#include <mach/hardware.h>
+
+#include "hardware.h"
static int mx27_suspend_enter(suspend_state_t state)
{
diff --git a/arch/arm/mach-imx/pm-imx3.c b/arch/arm/mach-imx/pm-imx3.c
index 822103b..6a07006 100644
--- a/arch/arm/mach-imx/pm-imx3.c
+++ b/arch/arm/mach-imx/pm-imx3.c
@@ -9,10 +9,11 @@
* http://www.gnu.org/copyleft/gpl.html
*/
#include <linux/io.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "common.h"
#include "crmregs-imx3.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
/*
* Set cpu low power mode before WFI instruction. This function is called
diff --git a/arch/arm/mach-imx/pm-imx5.c b/arch/arm/mach-imx/pm-imx5.c
index 19621ed1..2e063c2 100644
--- a/arch/arm/mach-imx/pm-imx5.c
+++ b/arch/arm/mach-imx/pm-imx5.c
@@ -16,10 +16,11 @@
#include <asm/cacheflush.h>
#include <asm/system_misc.h>
#include <asm/tlbflush.h>
-#include <mach/common.h>
-#include <mach/cpuidle.h>
-#include <mach/hardware.h>
+
+#include "common.h"
+#include "cpuidle.h"
#include "crm-regs-imx5.h"
+#include "hardware.h"
/*
* The WAIT_UNCLOCKED_POWER_OFF state only requires <= 500ns to exit.
diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c
index f7b0c2b..a17543d 100644
--- a/arch/arm/mach-imx/pm-imx6q.c
+++ b/arch/arm/mach-imx/pm-imx6q.c
@@ -18,8 +18,9 @@
#include <asm/proc-fns.h>
#include <asm/suspend.h>
#include <asm/hardware/cache-l2x0.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
+
+#include "common.h"
+#include "hardware.h"
extern unsigned long phys_l2x0_saved_regs;
diff --git a/arch/arm/plat-mxc/ssi-fiq-ksym.c b/arch/arm/mach-imx/ssi-fiq-ksym.c
similarity index 100%
rename from arch/arm/plat-mxc/ssi-fiq-ksym.c
rename to arch/arm/mach-imx/ssi-fiq-ksym.c
diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/mach-imx/ssi-fiq.S
similarity index 100%
rename from arch/arm/plat-mxc/ssi-fiq.S
rename to arch/arm/mach-imx/ssi-fiq.S
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/mach-imx/system.c
similarity index 96%
rename from arch/arm/plat-mxc/system.c
rename to arch/arm/mach-imx/system.c
index 3da78cf..695e0d7 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/mach-imx/system.c
@@ -22,12 +22,13 @@
#include <linux/err.h>
#include <linux/delay.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
#include <asm/system_misc.h>
#include <asm/proc-fns.h>
#include <asm/mach-types.h>
+#include "common.h"
+#include "hardware.h"
+
static void __iomem *wdog_base;
/*
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/mach-imx/time.c
similarity index 99%
rename from arch/arm/plat-mxc/time.c
rename to arch/arm/mach-imx/time.c
index a17abcf..f017302 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -27,10 +27,11 @@
#include <linux/clk.h>
#include <linux/err.h>
-#include <mach/hardware.h>
#include <asm/sched_clock.h>
#include <asm/mach/time.h>
-#include <mach/common.h>
+
+#include "common.h"
+#include "hardware.h"
/*
* There are 2 versions of the timer hardware on Freescale MXC hardware.
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/mach-imx/tzic.c
similarity index 98%
rename from arch/arm/plat-mxc/tzic.c
rename to arch/arm/mach-imx/tzic.c
index 3ed1adb..9721161 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/mach-imx/tzic.c
@@ -21,10 +21,8 @@
#include <asm/mach/irq.h>
#include <asm/exception.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/irqs.h>
-
+#include "common.h"
+#include "hardware.h"
#include "irq-common.h"
/*
diff --git a/arch/arm/plat-mxc/ulpi.c b/arch/arm/mach-imx/ulpi.c
similarity index 98%
rename from arch/arm/plat-mxc/ulpi.c
rename to arch/arm/mach-imx/ulpi.c
index d296342..0f05195 100644
--- a/arch/arm/plat-mxc/ulpi.c
+++ b/arch/arm/mach-imx/ulpi.c
@@ -24,7 +24,7 @@
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
-#include <mach/ulpi.h>
+#include "ulpi.h"
/* ULPIVIEW register bits */
#define ULPIVW_WU (1 << 31) /* Wakeup */
diff --git a/arch/arm/plat-mxc/include/mach/ulpi.h b/arch/arm/mach-imx/ulpi.h
similarity index 100%
rename from arch/arm/plat-mxc/include/mach/ulpi.h
rename to arch/arm/mach-imx/ulpi.h
diff --git a/arch/arm/mach-integrator/include/mach/irqs.h b/arch/arm/mach-integrator/include/mach/irqs.h
index 7371018..eff0ada 100644
--- a/arch/arm/mach-integrator/include/mach/irqs.h
+++ b/arch/arm/mach-integrator/include/mach/irqs.h
@@ -19,64 +19,63 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-/*
- * Interrupt numbers
+/*
+ * Interrupt numbers, all of the above are just static reservations
+ * used so they can be encoded into device resources. They will finally
+ * be done away with when switching to device tree.
*/
-#define IRQ_PIC_START 1
-#define IRQ_SOFTINT 1
-#define IRQ_UARTINT0 2
-#define IRQ_UARTINT1 3
-#define IRQ_KMIINT0 4
-#define IRQ_KMIINT1 5
-#define IRQ_TIMERINT0 6
-#define IRQ_TIMERINT1 7
-#define IRQ_TIMERINT2 8
-#define IRQ_RTCINT 9
-#define IRQ_AP_EXPINT0 10
-#define IRQ_AP_EXPINT1 11
-#define IRQ_AP_EXPINT2 12
-#define IRQ_AP_EXPINT3 13
-#define IRQ_AP_PCIINT0 14
-#define IRQ_AP_PCIINT1 15
-#define IRQ_AP_PCIINT2 16
-#define IRQ_AP_PCIINT3 17
-#define IRQ_AP_V3INT 18
-#define IRQ_AP_CPINT0 19
-#define IRQ_AP_CPINT1 20
-#define IRQ_AP_LBUSTIMEOUT 21
-#define IRQ_AP_APCINT 22
-#define IRQ_CP_CLCDCINT 23
-#define IRQ_CP_MMCIINT0 24
-#define IRQ_CP_MMCIINT1 25
-#define IRQ_CP_AACIINT 26
-#define IRQ_CP_CPPLDINT 27
-#define IRQ_CP_ETHINT 28
-#define IRQ_CP_TSPENINT 29
-#define IRQ_PIC_END 29
+#define IRQ_PIC_START 64
+#define IRQ_SOFTINT (IRQ_PIC_START+0)
+#define IRQ_UARTINT0 (IRQ_PIC_START+1)
+#define IRQ_UARTINT1 (IRQ_PIC_START+2)
+#define IRQ_KMIINT0 (IRQ_PIC_START+3)
+#define IRQ_KMIINT1 (IRQ_PIC_START+4)
+#define IRQ_TIMERINT0 (IRQ_PIC_START+5)
+#define IRQ_TIMERINT1 (IRQ_PIC_START+6)
+#define IRQ_TIMERINT2 (IRQ_PIC_START+7)
+#define IRQ_RTCINT (IRQ_PIC_START+8)
+#define IRQ_AP_EXPINT0 (IRQ_PIC_START+9)
+#define IRQ_AP_EXPINT1 (IRQ_PIC_START+10)
+#define IRQ_AP_EXPINT2 (IRQ_PIC_START+11)
+#define IRQ_AP_EXPINT3 (IRQ_PIC_START+12)
+#define IRQ_AP_PCIINT0 (IRQ_PIC_START+13)
+#define IRQ_AP_PCIINT1 (IRQ_PIC_START+14)
+#define IRQ_AP_PCIINT2 (IRQ_PIC_START+15)
+#define IRQ_AP_PCIINT3 (IRQ_PIC_START+16)
+#define IRQ_AP_V3INT (IRQ_PIC_START+17)
+#define IRQ_AP_CPINT0 (IRQ_PIC_START+18)
+#define IRQ_AP_CPINT1 (IRQ_PIC_START+19)
+#define IRQ_AP_LBUSTIMEOUT (IRQ_PIC_START+20)
+#define IRQ_AP_APCINT (IRQ_PIC_START+21)
+#define IRQ_CP_CLCDCINT (IRQ_PIC_START+22)
+#define IRQ_CP_MMCIINT0 (IRQ_PIC_START+23)
+#define IRQ_CP_MMCIINT1 (IRQ_PIC_START+24)
+#define IRQ_CP_AACIINT (IRQ_PIC_START+25)
+#define IRQ_CP_CPPLDINT (IRQ_PIC_START+26)
+#define IRQ_CP_ETHINT (IRQ_PIC_START+27)
+#define IRQ_CP_TSPENINT (IRQ_PIC_START+28)
+#define IRQ_PIC_END (IRQ_PIC_START+28)
-#define IRQ_CIC_START 32
-#define IRQ_CM_SOFTINT 32
-#define IRQ_CM_COMMRX 33
-#define IRQ_CM_COMMTX 34
-#define IRQ_CIC_END 34
+#define IRQ_CIC_START (IRQ_PIC_END+1)
+#define IRQ_CM_SOFTINT (IRQ_CIC_START+0)
+#define IRQ_CM_COMMRX (IRQ_CIC_START+1)
+#define IRQ_CM_COMMTX (IRQ_CIC_START+2)
+#define IRQ_CIC_END (IRQ_CIC_START+2)
/*
* IntegratorCP only
*/
-#define IRQ_SIC_START 35
-#define IRQ_SIC_CP_SOFTINT 35
-#define IRQ_SIC_CP_RI0 36
-#define IRQ_SIC_CP_RI1 37
-#define IRQ_SIC_CP_CARDIN 38
-#define IRQ_SIC_CP_LMINT0 39
-#define IRQ_SIC_CP_LMINT1 40
-#define IRQ_SIC_CP_LMINT2 41
-#define IRQ_SIC_CP_LMINT3 42
-#define IRQ_SIC_CP_LMINT4 43
-#define IRQ_SIC_CP_LMINT5 44
-#define IRQ_SIC_CP_LMINT6 45
-#define IRQ_SIC_CP_LMINT7 46
-#define IRQ_SIC_END 46
-
-#define NR_IRQS_INTEGRATOR_AP 34
-#define NR_IRQS_INTEGRATOR_CP 47
+#define IRQ_SIC_START (IRQ_CIC_END+1)
+#define IRQ_SIC_CP_SOFTINT (IRQ_SIC_START+0)
+#define IRQ_SIC_CP_RI0 (IRQ_SIC_START+1)
+#define IRQ_SIC_CP_RI1 (IRQ_SIC_START+2)
+#define IRQ_SIC_CP_CARDIN (IRQ_SIC_START+3)
+#define IRQ_SIC_CP_LMINT0 (IRQ_SIC_START+4)
+#define IRQ_SIC_CP_LMINT1 (IRQ_SIC_START+5)
+#define IRQ_SIC_CP_LMINT2 (IRQ_SIC_START+6)
+#define IRQ_SIC_CP_LMINT3 (IRQ_SIC_START+7)
+#define IRQ_SIC_CP_LMINT4 (IRQ_SIC_START+8)
+#define IRQ_SIC_CP_LMINT5 (IRQ_SIC_START+9)
+#define IRQ_SIC_CP_LMINT6 (IRQ_SIC_START+10)
+#define IRQ_SIC_CP_LMINT7 (IRQ_SIC_START+11)
+#define IRQ_SIC_END (IRQ_SIC_START+11)
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index e6617c1..e67a9fe 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -31,6 +31,7 @@
#include <linux/clockchips.h>
#include <linux/interrupt.h>
#include <linux/io.h>
+#include <linux/irqchip/versatile-fpga.h>
#include <linux/mtd/physmap.h>
#include <linux/clk.h>
#include <linux/platform_data/clk-integrator.h>
@@ -56,8 +57,6 @@
#include <asm/mach/pci.h>
#include <asm/mach/time.h>
-#include <plat/fpga-irq.h>
-
#include "common.h"
/*
@@ -499,7 +498,6 @@
DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
.reserve = integrator_reserve,
.map_io = ap_map_io,
- .nr_irqs = NR_IRQS_INTEGRATOR_AP,
.init_early = ap_init_early,
.init_irq = ap_init_irq_of,
.handle_irq = fpga_handle_irq,
@@ -609,7 +607,6 @@
.atag_offset = 0x100,
.reserve = integrator_reserve,
.map_io = ap_map_io,
- .nr_irqs = NR_IRQS_INTEGRATOR_AP,
.init_early = ap_init_early,
.init_irq = ap_init_irq,
.handle_irq = fpga_handle_irq,
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 5b08e8e..acecf04 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -20,6 +20,7 @@
#include <linux/amba/clcd.h>
#include <linux/amba/mmci.h>
#include <linux/io.h>
+#include <linux/irqchip/versatile-fpga.h>
#include <linux/gfp.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_data/clk-integrator.h>
@@ -46,7 +47,6 @@
#include <asm/hardware/timer-sp.h>
#include <plat/clcd.h>
-#include <plat/fpga-irq.h>
#include <plat/sched_clock.h>
#include "common.h"
@@ -350,7 +350,6 @@
DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)")
.reserve = integrator_reserve,
.map_io = intcp_map_io,
- .nr_irqs = NR_IRQS_INTEGRATOR_CP,
.init_early = intcp_init_early,
.init_irq = intcp_init_irq_of,
.handle_irq = fpga_handle_irq,
@@ -423,7 +422,7 @@
u32 pic_mask, cic_mask, sic_mask;
/* These masks are for the HW IRQ registers */
- pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
+ pic_mask = ~((~0u) << (11 - 0));
pic_mask |= (~((~0u) << (29 - 22))) << 22;
cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START));
sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
@@ -504,7 +503,6 @@
.atag_offset = 0x100,
.reserve = integrator_reserve,
.map_io = intcp_map_io,
- .nr_irqs = NR_IRQS_INTEGRATOR_CP,
.init_early = intcp_init_early,
.init_irq = intcp_init_irq,
.handle_irq = fpga_handle_irq,
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c
index f48c2e9..dd5d6f5 100644
--- a/arch/arm/mach-lpc32xx/clock.c
+++ b/arch/arm/mach-lpc32xx/clock.c
@@ -585,6 +585,13 @@
.enable_mask = LPC32XX_CLKPWR_TMRPWMCLK_TIMER3_EN,
.get_rate = local_return_parent_rate,
};
+static struct clk clk_mpwm = {
+ .parent = &clk_pclk,
+ .enable = local_onoff_enable,
+ .enable_reg = LPC32XX_CLKPWR_TIMERS_PWMS_CLK_CTRL_1,
+ .enable_mask = LPC32XX_CLKPWR_TMRPWMCLK_MPWM_EN,
+ .get_rate = local_return_parent_rate,
+};
static struct clk clk_wdt = {
.parent = &clk_pclk,
.enable = local_onoff_enable,
@@ -1202,6 +1209,7 @@
CLKDEV_INIT("pl08xdmac", NULL, &clk_dma),
CLKDEV_INIT("4003c000.watchdog", NULL, &clk_wdt),
CLKDEV_INIT("4005c000.pwm", NULL, &clk_pwm),
+ CLKDEV_INIT("400e8000.mpwm", NULL, &clk_mpwm),
CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3),
CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4),
CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5),
diff --git a/arch/arm/mach-lpc32xx/include/mach/platform.h b/arch/arm/mach-lpc32xx/include/mach/platform.h
index acc4aab..b5612a1 100644
--- a/arch/arm/mach-lpc32xx/include/mach/platform.h
+++ b/arch/arm/mach-lpc32xx/include/mach/platform.h
@@ -515,6 +515,7 @@
/*
* clkpwr_timers_pwms_clk_ctrl_1 register definitions
*/
+#define LPC32XX_CLKPWR_TMRPWMCLK_MPWM_EN 0x40
#define LPC32XX_CLKPWR_TMRPWMCLK_TIMER3_EN 0x20
#define LPC32XX_CLKPWR_TMRPWMCLK_TIMER2_EN 0x10
#define LPC32XX_CLKPWR_TMRPWMCLK_TIMER1_EN 0x08
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
index 3c63327..9ecb8f9 100644
--- a/arch/arm/mach-lpc32xx/irq.c
+++ b/arch/arm/mach-lpc32xx/irq.c
@@ -412,7 +412,6 @@
void __init lpc32xx_init_irq(void)
{
unsigned int i;
- int irq_base;
/* Setup MIC */
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_MIC_BASE));
@@ -443,15 +442,6 @@
lpc32xx_set_default_mappings(SIC1_APR_DEFAULT, SIC1_ATR_DEFAULT, 32);
lpc32xx_set_default_mappings(SIC2_APR_DEFAULT, SIC2_ATR_DEFAULT, 64);
- /* mask all interrupts except SUBIRQ */
- __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_MIC_BASE));
- __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
- __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
-
- /* MIC SUBIRQx interrupts will route handling to the chain handlers */
- irq_set_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler);
- irq_set_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler);
-
/* Initially disable all wake events */
__raw_writel(0, LPC32XX_CLKPWR_P01_ER);
__raw_writel(0, LPC32XX_CLKPWR_INT_ER);
@@ -475,16 +465,13 @@
of_irq_init(mic_of_match);
- irq_base = irq_alloc_descs(-1, 0, NR_IRQS, 0);
- if (irq_base < 0) {
- pr_warn("Cannot allocate irq_descs, assuming pre-allocated\n");
- irq_base = 0;
- }
-
lpc32xx_mic_domain = irq_domain_add_legacy(lpc32xx_mic_np, NR_IRQS,
- irq_base, 0,
- &irq_domain_simple_ops,
+ 0, 0, &irq_domain_simple_ops,
NULL);
if (!lpc32xx_mic_domain)
panic("Unable to add MIC irq domain\n");
+
+ /* MIC SUBIRQx interrupts will route handling to the chain handlers */
+ irq_set_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler);
+ irq_set_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler);
}
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 8ae100c..546e40a 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -2,18 +2,6 @@
comment "SH-Mobile System Type"
-config ARCH_SH7367
- bool "SH-Mobile G3 (SH7367)"
- select ARCH_WANT_OPTIONAL_GPIOLIB
- select CPU_V6
- select SH_CLK_CPG
-
-config ARCH_SH7377
- bool "SH-Mobile G4 (SH7377)"
- select ARCH_WANT_OPTIONAL_GPIOLIB
- select CPU_V7
- select SH_CLK_CPG
-
config ARCH_SH7372
bool "SH-Mobile AP4 (SH7372)"
select ARCH_WANT_OPTIONAL_GPIOLIB
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index fe2c97c..f4fd247 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -6,8 +6,6 @@
obj-y := timer.o console.o clock.o
# CPU objects
-obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o
-obj-$(CONFIG_ARCH_SH7377) += setup-sh7377.o clock-sh7377.o intc-sh7377.o
obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7372.o intc-sh7372.o
obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o
obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o
@@ -23,16 +21,12 @@
# Pinmux setup
pfc-y :=
-pfc-$(CONFIG_ARCH_SH7367) += pfc-sh7367.o
-pfc-$(CONFIG_ARCH_SH7377) += pfc-sh7377.o
pfc-$(CONFIG_ARCH_SH7372) += pfc-sh7372.o
pfc-$(CONFIG_ARCH_SH73A0) += pfc-sh73a0.o
pfc-$(CONFIG_ARCH_R8A7740) += pfc-r8a7740.o
pfc-$(CONFIG_ARCH_R8A7779) += pfc-r8a7779.o
# IRQ objects
-obj-$(CONFIG_ARCH_SH7367) += entry-intc.o
-obj-$(CONFIG_ARCH_SH7377) += entry-intc.o
obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
obj-$(CONFIG_ARCH_R8A7740) += entry-intc.o
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 790dc68..cefdd03 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -728,7 +728,7 @@
static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
{
struct clk *fsib_clk;
- struct clk *fdiv_clk = &sh7372_fsidivb_clk;
+ struct clk *fdiv_clk = clk_get(NULL, "fsidivb");
long fsib_rate = 0;
long fdiv_rate = 0;
int ackmd_bpfmd;
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 0c27c81..c826d77 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -882,7 +882,7 @@
static int fsi_b_set_rate(struct device *dev, int rate, int enable)
{
struct clk *fsib_clk;
- struct clk *fdiv_clk = &sh7372_fsidivb_clk;
+ struct clk *fdiv_clk = clk_get(NULL, "fsidivb");
long fsib_rate = 0;
long fdiv_rate = 0;
int ackmd_bpfmd;
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index 6729e00..eac49d5 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -65,6 +65,9 @@
#define SMSTPCR3 IOMEM(0xe615013c)
#define SMSTPCR4 IOMEM(0xe6150140)
+#define FSIDIVA IOMEM(0xFE1F8000)
+#define FSIDIVB IOMEM(0xFE1F8008)
+
/* Fixed 32 KHz root clock from EXTALR pin */
static struct clk extalr_clk = {
.rate = 32768,
@@ -188,6 +191,22 @@
};
/* USB clock */
+/*
+ * USBCKCR is controlling usb24 clock
+ * bit[7] : parent clock
+ * bit[6] : clock divide rate
+ * And this bit[7] is used as a "usb24s" from other devices.
+ * (Video clock / Sub clock / SPU clock)
+ * You can controll this clock as a below.
+ *
+ * struct clk *usb24 = clk_get(dev, "usb24");
+ * struct clk *usb24s = clk_get(NULL, "usb24s");
+ * struct clk *system = clk_get(NULL, "system_clk");
+ * int rate = clk_get_rate(system);
+ *
+ * clk_set_parent(usb24s, system); // for bit[7]
+ * clk_set_rate(usb24, rate / 2); // for bit[6]
+ */
static struct clk *usb24s_parents[] = {
[0] = &system_clk,
[1] = &extal2_clk
@@ -427,6 +446,14 @@
&hdmi2_clk,
};
+/* FSI DIV */
+enum { FSIDIV_A, FSIDIV_B, FSIDIV_REPARENT_NR };
+
+static struct clk fsidivs[] = {
+ [FSIDIV_A] = SH_CLK_FSIDIV(FSIDIVA, &div6_reparent_clks[DIV6_FSIA]),
+ [FSIDIV_B] = SH_CLK_FSIDIV(FSIDIVB, &div6_reparent_clks[DIV6_FSIB]),
+};
+
/* MSTP */
enum {
DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP,
@@ -596,6 +623,10 @@
CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]),
CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]),
+ CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]),
+ CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]),
+ CLKDEV_ICK_ID("xcka", "sh_fsi2", &fsiack_clk),
+ CLKDEV_ICK_ID("xckb", "sh_fsi2", &fsibck_clk),
};
void __init r8a7740_clock_init(u8 md_ck)
@@ -641,6 +672,9 @@
for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
ret = clk_register(late_main_clks[k]);
+ if (!ret)
+ ret = sh_clk_fsidiv_register(fsidivs, FSIDIV_REPARENT_NR);
+
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
if (!ret)
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
index 37b2a31..c019609 100644
--- a/arch/arm/mach-shmobile/clock-r8a7779.c
+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
@@ -87,8 +87,11 @@
};
enum { MSTP323, MSTP322, MSTP321, MSTP320,
- MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
+ MSTP101, MSTP100,
+ MSTP030,
+ MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
MSTP016, MSTP015, MSTP014,
+ MSTP007,
MSTP_NR };
static struct clk mstp_clks[MSTP_NR] = {
@@ -96,6 +99,12 @@
[MSTP322] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 22, 0), /* SDHI1 */
[MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), /* SDHI2 */
[MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), /* SDHI3 */
+ [MSTP101] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 1, 0), /* USB2 */
+ [MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 0, 0), /* USB0/1 */
+ [MSTP030] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 30, 0), /* I2C0 */
+ [MSTP029] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 29, 0), /* I2C1 */
+ [MSTP028] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 28, 0), /* I2C2 */
+ [MSTP027] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 27, 0), /* I2C3 */
[MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0), /* SCIF0 */
[MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0), /* SCIF1 */
[MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0), /* SCIF2 */
@@ -105,6 +114,7 @@
[MSTP016] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 16, 0), /* TMU0 */
[MSTP015] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0), /* TMU1 */
[MSTP014] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 14, 0), /* TMU2 */
+ [MSTP007] = SH_CLK_MSTP32(&div4_clks[DIV4_S], MSTPCR0, 7, 0), /* HSPI */
};
static unsigned long mul4_recalc(struct clk *clk)
@@ -146,14 +156,25 @@
CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
/* MSTP32 clocks */
+ CLKDEV_DEV_ID("ehci-platform.1", &mstp_clks[MSTP101]), /* USB EHCI port2 */
+ CLKDEV_DEV_ID("ohci-platform.1", &mstp_clks[MSTP101]), /* USB OHCI port2 */
+ CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
+ CLKDEV_DEV_ID("ohci-platform.0", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
+ CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
+ CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
+ CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
+ CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
+ CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
+ CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
+ CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
deleted file mode 100644
index ef0a95e..0000000
--- a/arch/arm/mach-shmobile/clock-sh7367.c
+++ /dev/null
@@ -1,355 +0,0 @@
-/*
- * SH7367 clock framework support
- *
- * Copyright (C) 2010 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/sh_clk.h>
-#include <linux/clkdev.h>
-#include <mach/common.h>
-
-/* SH7367 registers */
-#define RTFRQCR IOMEM(0xe6150000)
-#define SYFRQCR IOMEM(0xe6150004)
-#define CMFRQCR IOMEM(0xe61500E0)
-#define VCLKCR1 IOMEM(0xe6150008)
-#define VCLKCR2 IOMEM(0xe615000C)
-#define VCLKCR3 IOMEM(0xe615001C)
-#define SCLKACR IOMEM(0xe6150010)
-#define SCLKBCR IOMEM(0xe6150014)
-#define SUBUSBCKCR IOMEM(0xe6158080)
-#define SPUCKCR IOMEM(0xe6150084)
-#define MSUCKCR IOMEM(0xe6150088)
-#define MVI3CKCR IOMEM(0xe6150090)
-#define VOUCKCR IOMEM(0xe6150094)
-#define MFCK1CR IOMEM(0xe6150098)
-#define MFCK2CR IOMEM(0xe615009C)
-#define PLLC1CR IOMEM(0xe6150028)
-#define PLLC2CR IOMEM(0xe615002C)
-#define RTMSTPCR0 IOMEM(0xe6158030)
-#define RTMSTPCR2 IOMEM(0xe6158038)
-#define SYMSTPCR0 IOMEM(0xe6158040)
-#define SYMSTPCR2 IOMEM(0xe6158048)
-#define CMMSTPCR0 IOMEM(0xe615804c)
-
-/* Fixed 32 KHz root clock from EXTALR pin */
-static struct clk r_clk = {
- .rate = 32768,
-};
-
-/*
- * 26MHz default rate for the EXTALB1 root input clock.
- * If needed, reset this with clk_set_rate() from the platform code.
- */
-struct clk sh7367_extalb1_clk = {
- .rate = 26666666,
-};
-
-/*
- * 48MHz default rate for the EXTAL2 root input clock.
- * If needed, reset this with clk_set_rate() from the platform code.
- */
-struct clk sh7367_extal2_clk = {
- .rate = 48000000,
-};
-
-/* A fixed divide-by-2 block */
-static unsigned long div2_recalc(struct clk *clk)
-{
- return clk->parent->rate / 2;
-}
-
-static struct sh_clk_ops div2_clk_ops = {
- .recalc = div2_recalc,
-};
-
-/* Divide extalb1 by two */
-static struct clk extalb1_div2_clk = {
- .ops = &div2_clk_ops,
- .parent = &sh7367_extalb1_clk,
-};
-
-/* Divide extal2 by two */
-static struct clk extal2_div2_clk = {
- .ops = &div2_clk_ops,
- .parent = &sh7367_extal2_clk,
-};
-
-/* PLLC1 */
-static unsigned long pllc1_recalc(struct clk *clk)
-{
- unsigned long mult = 1;
-
- if (__raw_readl(PLLC1CR) & (1 << 14))
- mult = (((__raw_readl(RTFRQCR) >> 24) & 0x3f) + 1) * 2;
-
- return clk->parent->rate * mult;
-}
-
-static struct sh_clk_ops pllc1_clk_ops = {
- .recalc = pllc1_recalc,
-};
-
-static struct clk pllc1_clk = {
- .ops = &pllc1_clk_ops,
- .flags = CLK_ENABLE_ON_INIT,
- .parent = &extalb1_div2_clk,
-};
-
-/* Divide PLLC1 by two */
-static struct clk pllc1_div2_clk = {
- .ops = &div2_clk_ops,
- .parent = &pllc1_clk,
-};
-
-/* PLLC2 */
-static unsigned long pllc2_recalc(struct clk *clk)
-{
- unsigned long mult = 1;
-
- if (__raw_readl(PLLC2CR) & (1 << 31))
- mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2;
-
- return clk->parent->rate * mult;
-}
-
-static struct sh_clk_ops pllc2_clk_ops = {
- .recalc = pllc2_recalc,
-};
-
-static struct clk pllc2_clk = {
- .ops = &pllc2_clk_ops,
- .flags = CLK_ENABLE_ON_INIT,
- .parent = &extalb1_div2_clk,
-};
-
-static struct clk *main_clks[] = {
- &r_clk,
- &sh7367_extalb1_clk,
- &sh7367_extal2_clk,
- &extalb1_div2_clk,
- &extal2_div2_clk,
- &pllc1_clk,
- &pllc1_div2_clk,
- &pllc2_clk,
-};
-
-static void div4_kick(struct clk *clk)
-{
- unsigned long value;
-
- /* set KICK bit in SYFRQCR to update hardware setting */
- value = __raw_readl(SYFRQCR);
- value |= (1 << 31);
- __raw_writel(value, SYFRQCR);
-}
-
-static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18,
- 24, 32, 36, 48, 0, 72, 0, 0 };
-
-static struct clk_div_mult_table div4_div_mult_table = {
- .divisors = divisors,
- .nr_divisors = ARRAY_SIZE(divisors),
-};
-
-static struct clk_div4_table div4_table = {
- .div_mult_table = &div4_div_mult_table,
- .kick = div4_kick,
-};
-
-enum { DIV4_I, DIV4_G, DIV4_S, DIV4_B,
- DIV4_ZX, DIV4_ZT, DIV4_Z, DIV4_ZD, DIV4_HP,
- DIV4_ZS, DIV4_ZB, DIV4_ZB3, DIV4_CP, DIV4_NR };
-
-#define DIV4(_reg, _bit, _mask, _flags) \
- SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags)
-
-static struct clk div4_clks[DIV4_NR] = {
- [DIV4_I] = DIV4(RTFRQCR, 20, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_G] = DIV4(RTFRQCR, 16, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_S] = DIV4(RTFRQCR, 12, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_B] = DIV4(RTFRQCR, 8, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_ZX] = DIV4(SYFRQCR, 20, 0x6fff, 0),
- [DIV4_ZT] = DIV4(SYFRQCR, 16, 0x6fff, 0),
- [DIV4_Z] = DIV4(SYFRQCR, 12, 0x6fff, 0),
- [DIV4_ZD] = DIV4(SYFRQCR, 8, 0x6fff, 0),
- [DIV4_HP] = DIV4(SYFRQCR, 4, 0x6fff, 0),
- [DIV4_ZS] = DIV4(CMFRQCR, 12, 0x6fff, 0),
- [DIV4_ZB] = DIV4(CMFRQCR, 8, 0x6fff, 0),
- [DIV4_ZB3] = DIV4(CMFRQCR, 4, 0x6fff, 0),
- [DIV4_CP] = DIV4(CMFRQCR, 0, 0x6fff, 0),
-};
-
-enum { DIV6_SUB, DIV6_SIUA, DIV6_SIUB, DIV6_MSU, DIV6_SPU,
- DIV6_MVI3, DIV6_MF1, DIV6_MF2,
- DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_VOU,
- DIV6_NR };
-
-static struct clk div6_clks[DIV6_NR] = {
- [DIV6_SUB] = SH_CLK_DIV6(&sh7367_extal2_clk, SUBUSBCKCR, 0),
- [DIV6_SIUA] = SH_CLK_DIV6(&pllc1_div2_clk, SCLKACR, 0),
- [DIV6_SIUB] = SH_CLK_DIV6(&pllc1_div2_clk, SCLKBCR, 0),
- [DIV6_MSU] = SH_CLK_DIV6(&pllc1_div2_clk, MSUCKCR, 0),
- [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0),
- [DIV6_MVI3] = SH_CLK_DIV6(&pllc1_div2_clk, MVI3CKCR, 0),
- [DIV6_MF1] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK1CR, 0),
- [DIV6_MF2] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK2CR, 0),
- [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0),
- [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0),
- [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0),
- [DIV6_VOU] = SH_CLK_DIV6(&pllc1_div2_clk, VOUCKCR, 0),
-};
-
-enum { RTMSTP001,
- RTMSTP231, RTMSTP230, RTMSTP229, RTMSTP228, RTMSTP226,
- RTMSTP216, RTMSTP206, RTMSTP205, RTMSTP201,
- SYMSTP023, SYMSTP007, SYMSTP006, SYMSTP004,
- SYMSTP003, SYMSTP002, SYMSTP001, SYMSTP000,
- SYMSTP231, SYMSTP229, SYMSTP225, SYMSTP223, SYMSTP222,
- SYMSTP215, SYMSTP214, SYMSTP213, SYMSTP211,
- CMMSTP003,
- MSTP_NR };
-
-#define MSTP(_parent, _reg, _bit, _flags) \
- SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
-
-static struct clk mstp_clks[MSTP_NR] = {
- [RTMSTP001] = MSTP(&div6_clks[DIV6_SUB], RTMSTPCR0, 1, 0), /* IIC2 */
- [RTMSTP231] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 31, 0), /* VEU3 */
- [RTMSTP230] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 30, 0), /* VEU2 */
- [RTMSTP229] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 29, 0), /* VEU1 */
- [RTMSTP228] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 28, 0), /* VEU0 */
- [RTMSTP226] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 26, 0), /* VEU2H */
- [RTMSTP216] = MSTP(&div6_clks[DIV6_SUB], RTMSTPCR2, 16, 0), /* IIC0 */
- [RTMSTP206] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 6, 0), /* JPU */
- [RTMSTP205] = MSTP(&div6_clks[DIV6_VOU], RTMSTPCR2, 5, 0), /* VOU */
- [RTMSTP201] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 1, 0), /* VPU */
- [SYMSTP023] = MSTP(&div6_clks[DIV6_SPU], SYMSTPCR0, 23, 0), /* SPU1 */
- [SYMSTP007] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 7, 0), /* SCIFA5 */
- [SYMSTP006] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 6, 0), /* SCIFB */
- [SYMSTP004] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 4, 0), /* SCIFA0 */
- [SYMSTP003] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 3, 0), /* SCIFA1 */
- [SYMSTP002] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 2, 0), /* SCIFA2 */
- [SYMSTP001] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 1, 0), /* SCIFA3 */
- [SYMSTP000] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 0, 0), /* SCIFA4 */
- [SYMSTP231] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 31, 0), /* SIU */
- [SYMSTP229] = MSTP(&r_clk, SYMSTPCR2, 29, 0), /* CMT10 */
- [SYMSTP225] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 25, 0), /* IRDA */
- [SYMSTP223] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 23, 0), /* IIC1 */
- [SYMSTP222] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 22, 0), /* USBHS */
- [SYMSTP215] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 15, 0), /* FLCTL */
- [SYMSTP214] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 14, 0), /* SDHI0 */
- [SYMSTP213] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 13, 0), /* SDHI1 */
- [SYMSTP211] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 11, 0), /* SDHI2 */
- [CMMSTP003] = MSTP(&r_clk, CMMSTPCR0, 3, 0), /* KEYSC */
-};
-
-static struct clk_lookup lookups[] = {
- /* main clocks */
- CLKDEV_CON_ID("r_clk", &r_clk),
- CLKDEV_CON_ID("extalb1", &sh7367_extalb1_clk),
- CLKDEV_CON_ID("extal2", &sh7367_extal2_clk),
- CLKDEV_CON_ID("extalb1_div2_clk", &extalb1_div2_clk),
- CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk),
- CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
- CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
- CLKDEV_CON_ID("pllc2_clk", &pllc2_clk),
-
- /* DIV4 clocks */
- CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
- CLKDEV_CON_ID("g_clk", &div4_clks[DIV4_G]),
- CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]),
- CLKDEV_CON_ID("zx_clk", &div4_clks[DIV4_ZX]),
- CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]),
- CLKDEV_CON_ID("z_clk", &div4_clks[DIV4_Z]),
- CLKDEV_CON_ID("zd_clk", &div4_clks[DIV4_ZD]),
- CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]),
- CLKDEV_CON_ID("zs_clk", &div4_clks[DIV4_ZS]),
- CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]),
- CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]),
- CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]),
-
- /* DIV6 clocks */
- CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]),
- CLKDEV_CON_ID("siua_clk", &div6_clks[DIV6_SIUA]),
- CLKDEV_CON_ID("siub_clk", &div6_clks[DIV6_SIUB]),
- CLKDEV_CON_ID("msu_clk", &div6_clks[DIV6_MSU]),
- CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
- CLKDEV_CON_ID("mvi3_clk", &div6_clks[DIV6_MVI3]),
- CLKDEV_CON_ID("mf1_clk", &div6_clks[DIV6_MF1]),
- CLKDEV_CON_ID("mf2_clk", &div6_clks[DIV6_MF2]),
- CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
- CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
- CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
- CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
-
- /* MSTP32 clocks */
- CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[RTMSTP001]), /* IIC2 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[RTMSTP231]), /* VEU3 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[RTMSTP230]), /* VEU2 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[RTMSTP229]), /* VEU1 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[RTMSTP228]), /* VEU0 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[RTMSTP226]), /* VEU2H */
- CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[RTMSTP216]), /* IIC0 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[RTMSTP206]), /* JPU */
- CLKDEV_DEV_ID("sh-vou", &mstp_clks[RTMSTP205]), /* VOU */
- CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[RTMSTP201]), /* VPU */
- CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[SYMSTP023]), /* SPU1 */
- CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[SYMSTP007]), /* SCIFA5 */
- CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[SYMSTP006]), /* SCIFB */
- CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[SYMSTP004]), /* SCIFA0 */
- CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[SYMSTP003]), /* SCIFA1 */
- CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[SYMSTP002]), /* SCIFA2 */
- CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[SYMSTP001]), /* SCIFA3 */
- CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[SYMSTP000]), /* SCIFA4 */
- CLKDEV_DEV_ID("sh_siu", &mstp_clks[SYMSTP231]), /* SIU */
- CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[SYMSTP229]), /* CMT10 */
- CLKDEV_DEV_ID("sh_irda", &mstp_clks[SYMSTP225]), /* IRDA */
- CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[SYMSTP223]), /* IIC1 */
- CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[SYMSTP222]), /* USBHS */
- CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[SYMSTP222]), /* USBHS */
- CLKDEV_DEV_ID("sh_flctl", &mstp_clks[SYMSTP215]), /* FLCTL */
- CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[SYMSTP214]), /* SDHI0 */
- CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[SYMSTP213]), /* SDHI1 */
- CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[SYMSTP211]), /* SDHI2 */
- CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[CMMSTP003]), /* KEYSC */
-};
-
-void __init sh7367_clock_init(void)
-{
- int k, ret = 0;
-
- for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
- ret = clk_register(main_clks[k]);
-
- if (!ret)
- ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
-
- if (!ret)
- ret = sh_clk_div6_register(div6_clks, DIV6_NR);
-
- if (!ret)
- ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
-
- clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-
- if (!ret)
- shmobile_clk_init();
- else
- panic("failed to setup sh7367 clocks\n");
-}
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 430a90f..4d57e34 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -420,87 +420,11 @@
};
/* FSI DIV */
-static unsigned long fsidiv_recalc(struct clk *clk)
-{
- unsigned long value;
+enum { FSIDIV_A, FSIDIV_B, FSIDIV_REPARENT_NR };
- value = __raw_readl(clk->mapping->base);
-
- value >>= 16;
- if (value < 2)
- return 0;
-
- return clk->parent->rate / value;
-}
-
-static long fsidiv_round_rate(struct clk *clk, unsigned long rate)
-{
- return clk_rate_div_range_round(clk, 2, 0xffff, rate);
-}
-
-static void fsidiv_disable(struct clk *clk)
-{
- __raw_writel(0, clk->mapping->base);
-}
-
-static int fsidiv_enable(struct clk *clk)
-{
- unsigned long value;
-
- value = __raw_readl(clk->mapping->base) >> 16;
- if (value < 2)
- return -EIO;
-
- __raw_writel((value << 16) | 0x3, clk->mapping->base);
-
- return 0;
-}
-
-static int fsidiv_set_rate(struct clk *clk, unsigned long rate)
-{
- int idx;
-
- idx = (clk->parent->rate / rate) & 0xffff;
- if (idx < 2)
- return -EINVAL;
-
- __raw_writel(idx << 16, clk->mapping->base);
- return 0;
-}
-
-static struct sh_clk_ops fsidiv_clk_ops = {
- .recalc = fsidiv_recalc,
- .round_rate = fsidiv_round_rate,
- .set_rate = fsidiv_set_rate,
- .enable = fsidiv_enable,
- .disable = fsidiv_disable,
-};
-
-static struct clk_mapping fsidiva_clk_mapping = {
- .phys = FSIDIVA,
- .len = 8,
-};
-
-struct clk sh7372_fsidiva_clk = {
- .ops = &fsidiv_clk_ops,
- .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */
- .mapping = &fsidiva_clk_mapping,
-};
-
-static struct clk_mapping fsidivb_clk_mapping = {
- .phys = FSIDIVB,
- .len = 8,
-};
-
-struct clk sh7372_fsidivb_clk = {
- .ops = &fsidiv_clk_ops,
- .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */
- .mapping = &fsidivb_clk_mapping,
-};
-
-static struct clk *late_main_clks[] = {
- &sh7372_fsidiva_clk,
- &sh7372_fsidivb_clk,
+static struct clk fsidivs[] = {
+ [FSIDIV_A] = SH_CLK_FSIDIV(FSIDIVA, &div6_reparent_clks[DIV6_FSIA]),
+ [FSIDIV_B] = SH_CLK_FSIDIV(FSIDIVB, &div6_reparent_clks[DIV6_FSIB]),
};
enum { MSTP001, MSTP000,
@@ -583,6 +507,8 @@
CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
CLKDEV_CON_ID("pllc2_clk", &sh7372_pllc2_clk),
+ CLKDEV_CON_ID("fsidiva", &fsidivs[FSIDIV_A]),
+ CLKDEV_CON_ID("fsidivb", &fsidivs[FSIDIV_B]),
/* DIV4 clocks */
CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
@@ -678,6 +604,10 @@
CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]),
CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]),
CLKDEV_ICK_ID("spu2", "sh_fsi2", &mstp_clks[MSTP223]),
+ CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]),
+ CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]),
+ CLKDEV_ICK_ID("xcka", "sh_fsi2", &sh7372_fsiack_clk),
+ CLKDEV_ICK_ID("xckb", "sh_fsi2", &sh7372_fsibck_clk),
};
void __init sh7372_clock_init(void)
@@ -706,8 +636,8 @@
if (!ret)
ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
- for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
- ret = clk_register(late_main_clks[k]);
+ if (!ret)
+ ret = sh_clk_fsidiv_register(fsidivs, FSIDIV_REPARENT_NR);
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c
deleted file mode 100644
index b8480d1..0000000
--- a/arch/arm/mach-shmobile/clock-sh7377.c
+++ /dev/null
@@ -1,366 +0,0 @@
-/*
- * SH7377 clock framework support
- *
- * Copyright (C) 2010 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/sh_clk.h>
-#include <linux/clkdev.h>
-#include <mach/common.h>
-
-/* SH7377 registers */
-#define RTFRQCR IOMEM(0xe6150000)
-#define SYFRQCR IOMEM(0xe6150004)
-#define CMFRQCR IOMEM(0xe61500E0)
-#define VCLKCR1 IOMEM(0xe6150008)
-#define VCLKCR2 IOMEM(0xe615000C)
-#define VCLKCR3 IOMEM(0xe615001C)
-#define FMSICKCR IOMEM(0xe6150010)
-#define FMSOCKCR IOMEM(0xe6150014)
-#define FSICKCR IOMEM(0xe6150018)
-#define PLLC1CR IOMEM(0xe6150028)
-#define PLLC2CR IOMEM(0xe615002C)
-#define SUBUSBCKCR IOMEM(0xe6150080)
-#define SPUCKCR IOMEM(0xe6150084)
-#define MSUCKCR IOMEM(0xe6150088)
-#define MVI3CKCR IOMEM(0xe6150090)
-#define HDMICKCR IOMEM(0xe6150094)
-#define MFCK1CR IOMEM(0xe6150098)
-#define MFCK2CR IOMEM(0xe615009C)
-#define DSITCKCR IOMEM(0xe6150060)
-#define DSIPCKCR IOMEM(0xe6150064)
-#define SMSTPCR0 IOMEM(0xe6150130)
-#define SMSTPCR1 IOMEM(0xe6150134)
-#define SMSTPCR2 IOMEM(0xe6150138)
-#define SMSTPCR3 IOMEM(0xe615013C)
-#define SMSTPCR4 IOMEM(0xe6150140)
-
-/* Fixed 32 KHz root clock from EXTALR pin */
-static struct clk r_clk = {
- .rate = 32768,
-};
-
-/*
- * 26MHz default rate for the EXTALC1 root input clock.
- * If needed, reset this with clk_set_rate() from the platform code.
- */
-struct clk sh7377_extalc1_clk = {
- .rate = 26666666,
-};
-
-/*
- * 48MHz default rate for the EXTAL2 root input clock.
- * If needed, reset this with clk_set_rate() from the platform code.
- */
-struct clk sh7377_extal2_clk = {
- .rate = 48000000,
-};
-
-/* A fixed divide-by-2 block */
-static unsigned long div2_recalc(struct clk *clk)
-{
- return clk->parent->rate / 2;
-}
-
-static struct sh_clk_ops div2_clk_ops = {
- .recalc = div2_recalc,
-};
-
-/* Divide extalc1 by two */
-static struct clk extalc1_div2_clk = {
- .ops = &div2_clk_ops,
- .parent = &sh7377_extalc1_clk,
-};
-
-/* Divide extal2 by two */
-static struct clk extal2_div2_clk = {
- .ops = &div2_clk_ops,
- .parent = &sh7377_extal2_clk,
-};
-
-/* Divide extal2 by four */
-static struct clk extal2_div4_clk = {
- .ops = &div2_clk_ops,
- .parent = &extal2_div2_clk,
-};
-
-/* PLLC1 */
-static unsigned long pllc1_recalc(struct clk *clk)
-{
- unsigned long mult = 1;
-
- if (__raw_readl(PLLC1CR) & (1 << 14))
- mult = (((__raw_readl(RTFRQCR) >> 24) & 0x3f) + 1) * 2;
-
- return clk->parent->rate * mult;
-}
-
-static struct sh_clk_ops pllc1_clk_ops = {
- .recalc = pllc1_recalc,
-};
-
-static struct clk pllc1_clk = {
- .ops = &pllc1_clk_ops,
- .flags = CLK_ENABLE_ON_INIT,
- .parent = &extalc1_div2_clk,
-};
-
-/* Divide PLLC1 by two */
-static struct clk pllc1_div2_clk = {
- .ops = &div2_clk_ops,
- .parent = &pllc1_clk,
-};
-
-/* PLLC2 */
-static unsigned long pllc2_recalc(struct clk *clk)
-{
- unsigned long mult = 1;
-
- if (__raw_readl(PLLC2CR) & (1 << 31))
- mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2;
-
- return clk->parent->rate * mult;
-}
-
-static struct sh_clk_ops pllc2_clk_ops = {
- .recalc = pllc2_recalc,
-};
-
-static struct clk pllc2_clk = {
- .ops = &pllc2_clk_ops,
- .flags = CLK_ENABLE_ON_INIT,
- .parent = &extalc1_div2_clk,
-};
-
-static struct clk *main_clks[] = {
- &r_clk,
- &sh7377_extalc1_clk,
- &sh7377_extal2_clk,
- &extalc1_div2_clk,
- &extal2_div2_clk,
- &extal2_div4_clk,
- &pllc1_clk,
- &pllc1_div2_clk,
- &pllc2_clk,
-};
-
-static void div4_kick(struct clk *clk)
-{
- unsigned long value;
-
- /* set KICK bit in SYFRQCR to update hardware setting */
- value = __raw_readl(SYFRQCR);
- value |= (1 << 31);
- __raw_writel(value, SYFRQCR);
-}
-
-static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18,
- 24, 32, 36, 48, 0, 72, 96, 0 };
-
-static struct clk_div_mult_table div4_div_mult_table = {
- .divisors = divisors,
- .nr_divisors = ARRAY_SIZE(divisors),
-};
-
-static struct clk_div4_table div4_table = {
- .div_mult_table = &div4_div_mult_table,
- .kick = div4_kick,
-};
-
-enum { DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_CSIR,
- DIV4_ZTR, DIV4_ZT, DIV4_Z, DIV4_HP,
- DIV4_ZS, DIV4_ZB, DIV4_ZB3, DIV4_CP, DIV4_NR };
-
-#define DIV4(_reg, _bit, _mask, _flags) \
- SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags)
-
-static struct clk div4_clks[DIV4_NR] = {
- [DIV4_I] = DIV4(RTFRQCR, 20, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_ZG] = DIV4(RTFRQCR, 16, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_B] = DIV4(RTFRQCR, 8, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_M1] = DIV4(RTFRQCR, 4, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_CSIR] = DIV4(RTFRQCR, 0, 0x6fff, 0),
- [DIV4_ZTR] = DIV4(SYFRQCR, 20, 0x6fff, 0),
- [DIV4_ZT] = DIV4(SYFRQCR, 16, 0x6fff, 0),
- [DIV4_Z] = DIV4(SYFRQCR, 12, 0x6fff, 0),
- [DIV4_HP] = DIV4(SYFRQCR, 4, 0x6fff, 0),
- [DIV4_ZS] = DIV4(CMFRQCR, 12, 0x6fff, 0),
- [DIV4_ZB] = DIV4(CMFRQCR, 8, 0x6fff, 0),
- [DIV4_ZB3] = DIV4(CMFRQCR, 4, 0x6fff, 0),
- [DIV4_CP] = DIV4(CMFRQCR, 0, 0x6fff, 0),
-};
-
-enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_FMSI, DIV6_FMSO,
- DIV6_FSI, DIV6_SUB, DIV6_SPU, DIV6_MSU, DIV6_MVI3, DIV6_HDMI,
- DIV6_MF1, DIV6_MF2, DIV6_DSIT, DIV6_DSIP,
- DIV6_NR };
-
-static struct clk div6_clks[] = {
- [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0),
- [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0),
- [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0),
- [DIV6_FMSI] = SH_CLK_DIV6(&pllc1_div2_clk, FMSICKCR, 0),
- [DIV6_FMSO] = SH_CLK_DIV6(&pllc1_div2_clk, FMSOCKCR, 0),
- [DIV6_FSI] = SH_CLK_DIV6(&pllc1_div2_clk, FSICKCR, 0),
- [DIV6_SUB] = SH_CLK_DIV6(&sh7377_extal2_clk, SUBUSBCKCR, 0),
- [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0),
- [DIV6_MSU] = SH_CLK_DIV6(&pllc1_div2_clk, MSUCKCR, 0),
- [DIV6_MVI3] = SH_CLK_DIV6(&pllc1_div2_clk, MVI3CKCR, 0),
- [DIV6_HDMI] = SH_CLK_DIV6(&pllc1_div2_clk, HDMICKCR, 0),
- [DIV6_MF1] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK1CR, 0),
- [DIV6_MF2] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK2CR, 0),
- [DIV6_DSIT] = SH_CLK_DIV6(&pllc1_div2_clk, DSITCKCR, 0),
- [DIV6_DSIP] = SH_CLK_DIV6(&pllc1_div2_clk, DSIPCKCR, 0),
-};
-
-enum { MSTP001,
- MSTP131, MSTP130, MSTP129, MSTP128, MSTP116, MSTP106, MSTP101,
- MSTP223, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
- MSTP331, MSTP329, MSTP325, MSTP323, MSTP322,
- MSTP315, MSTP314, MSTP313,
- MSTP403,
- MSTP_NR };
-
-#define MSTP(_parent, _reg, _bit, _flags) \
- SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
-
-static struct clk mstp_clks[] = {
- [MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */
- [MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */
- [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */
- [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */
- [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */
- [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */
- [MSTP106] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 6, 0), /* JPU */
- [MSTP101] = MSTP(&div4_clks[DIV4_M1], SMSTPCR1, 1, 0), /* VPU */
- [MSTP223] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR2, 23, 0), /* SPU2 */
- [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
- [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
- [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
- [MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */
- [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
- [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */
- [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
- [MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */
- [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
- [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IRDA */
- [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
- [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */
- [MSTP315] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 15, 0), /* FLCTL */
- [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
- [MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */
- [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
-};
-
-static struct clk_lookup lookups[] = {
- /* main clocks */
- CLKDEV_CON_ID("r_clk", &r_clk),
- CLKDEV_CON_ID("extalc1", &sh7377_extalc1_clk),
- CLKDEV_CON_ID("extal2", &sh7377_extal2_clk),
- CLKDEV_CON_ID("extalc1_div2_clk", &extalc1_div2_clk),
- CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk),
- CLKDEV_CON_ID("extal2_div4_clk", &extal2_div4_clk),
- CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
- CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
- CLKDEV_CON_ID("pllc2_clk", &pllc2_clk),
-
- /* DIV4 clocks */
- CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
- CLKDEV_CON_ID("zg_clk", &div4_clks[DIV4_ZG]),
- CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]),
- CLKDEV_CON_ID("m1_clk", &div4_clks[DIV4_M1]),
- CLKDEV_CON_ID("csir_clk", &div4_clks[DIV4_CSIR]),
- CLKDEV_CON_ID("ztr_clk", &div4_clks[DIV4_ZTR]),
- CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]),
- CLKDEV_CON_ID("z_clk", &div4_clks[DIV4_Z]),
- CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]),
- CLKDEV_CON_ID("zs_clk", &div4_clks[DIV4_ZS]),
- CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]),
- CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]),
- CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]),
-
- /* DIV6 clocks */
- CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
- CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
- CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
- CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]),
- CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]),
- CLKDEV_CON_ID("fsi_clk", &div6_clks[DIV6_FSI]),
- CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]),
- CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
- CLKDEV_CON_ID("msu_clk", &div6_clks[DIV6_MSU]),
- CLKDEV_CON_ID("mvi3_clk", &div6_clks[DIV6_MVI3]),
- CLKDEV_CON_ID("hdmi_clk", &div6_clks[DIV6_HDMI]),
- CLKDEV_CON_ID("mf1_clk", &div6_clks[DIV6_MF1]),
- CLKDEV_CON_ID("mf2_clk", &div6_clks[DIV6_MF2]),
- CLKDEV_CON_ID("dsit_clk", &div6_clks[DIV6_DSIT]),
- CLKDEV_CON_ID("dsip_clk", &div6_clks[DIV6_DSIP]),
-
- /* MSTP32 clocks */
- CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
- CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */
- CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */
- CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[MSTP223]), /* SPU2DSP0 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[MSTP223]), /* SPU2DSP1 */
- CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
- CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP206]), /* SCIFB */
- CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
- CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
- CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
- CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
- CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
- CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
- CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
- CLKDEV_DEV_ID("sh_irda", &mstp_clks[MSTP325]), /* IRDA */
- CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
- CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USBHS */
- CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USBHS */
- CLKDEV_DEV_ID("sh_flctl", &mstp_clks[MSTP315]), /* FLCTL */
- CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
- CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
- CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
-};
-
-void __init sh7377_clock_init(void)
-{
- int k, ret = 0;
-
- for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
- ret = clk_register(main_clks[k]);
-
- if (!ret)
- ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
-
- if (!ret)
- ret = sh_clk_div6_register(div6_clks, DIV6_NR);
-
- if (!ret)
- ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
-
- clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-
- if (!ret)
- shmobile_clk_init();
- else
- panic("failed to setup sh7377 clocks\n");
-}
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index d47e215..dfeca79 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -18,24 +18,6 @@
struct cpuidle_driver *drv, int index);
extern void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv);
-extern void sh7367_init_irq(void);
-extern void sh7367_map_io(void);
-extern void sh7367_add_early_devices(void);
-extern void sh7367_add_standard_devices(void);
-extern void sh7367_clock_init(void);
-extern void sh7367_pinmux_init(void);
-extern struct clk sh7367_extalb1_clk;
-extern struct clk sh7367_extal2_clk;
-
-extern void sh7377_init_irq(void);
-extern void sh7377_map_io(void);
-extern void sh7377_add_early_devices(void);
-extern void sh7377_add_standard_devices(void);
-extern void sh7377_clock_init(void);
-extern void sh7377_pinmux_init(void);
-extern struct clk sh7377_extalc1_clk;
-extern struct clk sh7377_extal2_clk;
-
extern void sh7372_init_irq(void);
extern void sh7372_map_io(void);
extern void sh7372_add_early_devices(void);
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
index 499f52d..8ab0cd6 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
@@ -71,7 +71,7 @@
GPIO_FN_A19,
/* IPSR0 */
- GPIO_FN_PENC2, GPIO_FN_SCK0, GPIO_FN_PWM1, GPIO_FN_PWMFSW0,
+ GPIO_FN_USB_PENC2, GPIO_FN_SCK0, GPIO_FN_PWM1, GPIO_FN_PWMFSW0,
GPIO_FN_SCIF_CLK, GPIO_FN_TCLK0_C, GPIO_FN_BS, GPIO_FN_SD1_DAT2,
GPIO_FN_MMC0_D2, GPIO_FN_FD2, GPIO_FN_ATADIR0, GPIO_FN_SDSELF,
GPIO_FN_HCTS1, GPIO_FN_TX4_C, GPIO_FN_A0, GPIO_FN_SD1_DAT3,
diff --git a/arch/arm/mach-shmobile/include/mach/sh7367.h b/arch/arm/mach-shmobile/include/mach/sh7367.h
deleted file mode 100644
index 52d0de6..0000000
--- a/arch/arm/mach-shmobile/include/mach/sh7367.h
+++ /dev/null
@@ -1,332 +0,0 @@
-#ifndef __ASM_SH7367_H__
-#define __ASM_SH7367_H__
-
-/* Pin Function Controller:
- * GPIO_FN_xx - GPIO used to select pin function
- * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
- */
-enum {
- /* 49-1 -> 49-6 (GPIO) */
- GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
- GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
-
- GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
- GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
-
- GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
- GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
-
- GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
- GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
-
- GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
- GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
-
- GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
- GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
-
- GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
- GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
-
- GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
- GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
-
- GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
- GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
-
- GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
- GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
-
- GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
- GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
-
- GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
- GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,
-
- GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,
- GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,
-
- GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
- GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
-
- GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
- GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
-
- GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
- GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
-
- GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
- GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,
-
- GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,
- GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,
-
- GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,
- GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,
-
- GPIO_PORT190, GPIO_PORT191, GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
- GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
-
- GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
- GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
-
- GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,
- GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,
-
- GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,
- GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,
-
- GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,
- GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,
-
- GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,
- GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,
-
- GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,
- GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,
-
- GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,
- GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269,
-
- GPIO_PORT270, GPIO_PORT271, GPIO_PORT272,
-
- /* Special Pull-up / Pull-down Functions */
- GPIO_FN_PORT48_KEYIN0_PU, GPIO_FN_PORT49_KEYIN1_PU,
- GPIO_FN_PORT50_KEYIN2_PU, GPIO_FN_PORT55_KEYIN3_PU,
- GPIO_FN_PORT56_KEYIN4_PU, GPIO_FN_PORT57_KEYIN5_PU,
- GPIO_FN_PORT58_KEYIN6_PU,
-
- /* 49-1 (FN) */
- GPIO_FN_VBUS0, GPIO_FN_CPORT0, GPIO_FN_CPORT1, GPIO_FN_CPORT2,
- GPIO_FN_CPORT3, GPIO_FN_CPORT4, GPIO_FN_CPORT5, GPIO_FN_CPORT6,
- GPIO_FN_CPORT7, GPIO_FN_CPORT8, GPIO_FN_CPORT9, GPIO_FN_CPORT10,
- GPIO_FN_CPORT11, GPIO_FN_SIN2, GPIO_FN_CPORT12, GPIO_FN_XCTS2,
- GPIO_FN_CPORT13, GPIO_FN_RFSPO4, GPIO_FN_CPORT14, GPIO_FN_RFSPO5,
- GPIO_FN_CPORT15, GPIO_FN_CPORT16, GPIO_FN_CPORT17, GPIO_FN_SOUT2,
- GPIO_FN_CPORT18, GPIO_FN_XRTS2, GPIO_FN_CPORT19, GPIO_FN_CPORT20,
- GPIO_FN_RFSPO6, GPIO_FN_CPORT21, GPIO_FN_STATUS0, GPIO_FN_CPORT22,
- GPIO_FN_STATUS1, GPIO_FN_CPORT23, GPIO_FN_STATUS2, GPIO_FN_RFSPO7,
- GPIO_FN_MPORT0, GPIO_FN_MPORT1, GPIO_FN_B_SYNLD1, GPIO_FN_B_SYNLD2,
- GPIO_FN_XMAINPS, GPIO_FN_XDIVPS, GPIO_FN_XIDRST, GPIO_FN_IDCLK,
- GPIO_FN_IDIO, GPIO_FN_SOUT1, GPIO_FN_SCIFA4_TXD,
- GPIO_FN_M02_BERDAT, GPIO_FN_SIN1, GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP,
- GPIO_FN_XRTS1, GPIO_FN_SCIFA4_RTS, GPIO_FN_M03_BERCLK,
- GPIO_FN_XCTS1, GPIO_FN_SCIFA4_CTS,
-
- /* 49-2 (FN) */
- GPIO_FN_HSU_IQ_AGC6, GPIO_FN_MFG2_IN2, GPIO_FN_MSIOF2_MCK0,
- GPIO_FN_HSU_IQ_AGC5, GPIO_FN_MFG2_IN1, GPIO_FN_MSIOF2_MCK1,
- GPIO_FN_HSU_IQ_AGC4, GPIO_FN_MSIOF2_RSYNC,
- GPIO_FN_HSU_IQ_AGC3, GPIO_FN_MFG2_OUT1, GPIO_FN_MSIOF2_RSCK,
- GPIO_FN_HSU_IQ_AGC2, GPIO_FN_PORT42_KEYOUT0,
- GPIO_FN_HSU_IQ_AGC1, GPIO_FN_PORT43_KEYOUT1,
- GPIO_FN_HSU_IQ_AGC0, GPIO_FN_PORT44_KEYOUT2,
- GPIO_FN_HSU_IQ_AGC_ST, GPIO_FN_PORT45_KEYOUT3,
- GPIO_FN_HSU_IQ_PDO, GPIO_FN_PORT46_KEYOUT4,
- GPIO_FN_HSU_IQ_PYO, GPIO_FN_PORT47_KEYOUT5,
- GPIO_FN_HSU_EN_TXMUX_G3MO, GPIO_FN_PORT48_KEYIN0,
- GPIO_FN_HSU_I_TXMUX_G3MO, GPIO_FN_PORT49_KEYIN1,
- GPIO_FN_HSU_Q_TXMUX_G3MO, GPIO_FN_PORT50_KEYIN2,
- GPIO_FN_HSU_SYO, GPIO_FN_PORT51_MSIOF2_TSYNC,
- GPIO_FN_HSU_SDO, GPIO_FN_PORT52_MSIOF2_TSCK,
- GPIO_FN_HSU_TGTTI_G3MO, GPIO_FN_PORT53_MSIOF2_TXD,
- GPIO_FN_B_TIME_STAMP, GPIO_FN_PORT54_MSIOF2_RXD,
- GPIO_FN_HSU_SDI, GPIO_FN_PORT55_KEYIN3,
- GPIO_FN_HSU_SCO, GPIO_FN_PORT56_KEYIN4,
- GPIO_FN_HSU_DREQ, GPIO_FN_PORT57_KEYIN5,
- GPIO_FN_HSU_DACK, GPIO_FN_PORT58_KEYIN6,
- GPIO_FN_HSU_CLK61M, GPIO_FN_PORT59_MSIOF2_SS1,
- GPIO_FN_HSU_XRST, GPIO_FN_PORT60_MSIOF2_SS2,
- GPIO_FN_PCMCLKO, GPIO_FN_SYNC8KO, GPIO_FN_DNPCM_A, GPIO_FN_UPPCM_A,
- GPIO_FN_XTALB1L,
- GPIO_FN_GPS_AGC1, GPIO_FN_SCIFA0_RTS,
- GPIO_FN_GPS_AGC2, GPIO_FN_SCIFA0_SCK,
- GPIO_FN_GPS_AGC3, GPIO_FN_SCIFA0_TXD,
- GPIO_FN_GPS_AGC4, GPIO_FN_SCIFA0_RXD,
- GPIO_FN_GPS_PWRD, GPIO_FN_SCIFA0_CTS,
- GPIO_FN_GPS_IM, GPIO_FN_GPS_IS, GPIO_FN_GPS_QM, GPIO_FN_GPS_QS,
- GPIO_FN_SIUBOMC, GPIO_FN_TPU2TO0,
- GPIO_FN_SIUCKB, GPIO_FN_TPU2TO1,
- GPIO_FN_SIUBOLR, GPIO_FN_BBIF2_TSYNC, GPIO_FN_TPU2TO2,
- GPIO_FN_SIUBOBT, GPIO_FN_BBIF2_TSCK, GPIO_FN_TPU2TO3,
- GPIO_FN_SIUBOSLD, GPIO_FN_BBIF2_TXD, GPIO_FN_TPU3TO0,
- GPIO_FN_SIUBILR, GPIO_FN_TPU3TO1,
- GPIO_FN_SIUBIBT, GPIO_FN_TPU3TO2,
- GPIO_FN_SIUBISLD, GPIO_FN_TPU3TO3,
- GPIO_FN_NMI, GPIO_FN_TPU4TO0,
- GPIO_FN_DNPCM_M, GPIO_FN_TPU4TO1, GPIO_FN_TPU4TO2, GPIO_FN_TPU4TO3,
- GPIO_FN_IRQ_TMPB,
- GPIO_FN_PWEN, GPIO_FN_MFG1_OUT1,
- GPIO_FN_OVCN, GPIO_FN_MFG1_IN1,
- GPIO_FN_OVCN2, GPIO_FN_MFG1_IN2,
-
- /* 49-3 (FN) */
- GPIO_FN_RFSPO1, GPIO_FN_RFSPO2, GPIO_FN_RFSPO3, GPIO_FN_PORT93_VIO_CKO2,
- GPIO_FN_USBTERM, GPIO_FN_EXTLP, GPIO_FN_IDIN,
- GPIO_FN_SCIFA5_CTS, GPIO_FN_MFG0_IN1,
- GPIO_FN_SCIFA5_RTS, GPIO_FN_MFG0_IN2,
- GPIO_FN_SCIFA5_RXD,
- GPIO_FN_SCIFA5_TXD,
- GPIO_FN_SCIFA5_SCK, GPIO_FN_MFG0_OUT1,
- GPIO_FN_A0_EA0, GPIO_FN_BS,
- GPIO_FN_A14_EA14, GPIO_FN_PORT102_KEYOUT0,
- GPIO_FN_A15_EA15, GPIO_FN_PORT103_KEYOUT1, GPIO_FN_DV_CLKOL,
- GPIO_FN_A16_EA16, GPIO_FN_PORT104_KEYOUT2,
- GPIO_FN_DV_VSYNCL, GPIO_FN_MSIOF0_SS1,
- GPIO_FN_A17_EA17, GPIO_FN_PORT105_KEYOUT3,
- GPIO_FN_DV_HSYNCL, GPIO_FN_MSIOF0_TSYNC,
- GPIO_FN_A18_EA18, GPIO_FN_PORT106_KEYOUT4,
- GPIO_FN_DV_DL0, GPIO_FN_MSIOF0_TSCK,
- GPIO_FN_A19_EA19, GPIO_FN_PORT107_KEYOUT5,
- GPIO_FN_DV_DL1, GPIO_FN_MSIOF0_TXD,
- GPIO_FN_A20_EA20, GPIO_FN_PORT108_KEYIN0,
- GPIO_FN_DV_DL2, GPIO_FN_MSIOF0_RSCK,
- GPIO_FN_A21_EA21, GPIO_FN_PORT109_KEYIN1,
- GPIO_FN_DV_DL3, GPIO_FN_MSIOF0_RSYNC,
- GPIO_FN_A22_EA22, GPIO_FN_PORT110_KEYIN2,
- GPIO_FN_DV_DL4, GPIO_FN_MSIOF0_MCK0,
- GPIO_FN_A23_EA23, GPIO_FN_PORT111_KEYIN3,
- GPIO_FN_DV_DL5, GPIO_FN_MSIOF0_MCK1,
- GPIO_FN_A24_EA24, GPIO_FN_PORT112_KEYIN4,
- GPIO_FN_DV_DL6, GPIO_FN_MSIOF0_RXD,
- GPIO_FN_A25_EA25, GPIO_FN_PORT113_KEYIN5,
- GPIO_FN_DV_DL7, GPIO_FN_MSIOF0_SS2,
- GPIO_FN_A26, GPIO_FN_PORT113_KEYIN6, GPIO_FN_DV_CLKIL,
- GPIO_FN_D0_ED0_NAF0, GPIO_FN_D1_ED1_NAF1, GPIO_FN_D2_ED2_NAF2,
- GPIO_FN_D3_ED3_NAF3, GPIO_FN_D4_ED4_NAF4, GPIO_FN_D5_ED5_NAF5,
- GPIO_FN_D6_ED6_NAF6, GPIO_FN_D7_ED7_NAF7, GPIO_FN_D8_ED8_NAF8,
- GPIO_FN_D9_ED9_NAF9, GPIO_FN_D10_ED10_NAF10, GPIO_FN_D11_ED11_NAF11,
- GPIO_FN_D12_ED12_NAF12, GPIO_FN_D13_ED13_NAF13,
- GPIO_FN_D14_ED14_NAF14, GPIO_FN_D15_ED15_NAF15,
- GPIO_FN_CS4, GPIO_FN_CS5A, GPIO_FN_CS5B, GPIO_FN_FCE1,
- GPIO_FN_CS6B, GPIO_FN_XCS2, GPIO_FN_FCE0, GPIO_FN_CS6A,
- GPIO_FN_DACK0, GPIO_FN_WAIT, GPIO_FN_DREQ0, GPIO_FN_RD_XRD,
- GPIO_FN_A27, GPIO_FN_RDWR_XWE, GPIO_FN_WE0_XWR0_FWE,
- GPIO_FN_WE1_XWR1, GPIO_FN_FRB, GPIO_FN_CKO,
- GPIO_FN_NBRSTOUT, GPIO_FN_NBRST,
-
- /* 49-4 (FN) */
- GPIO_FN_RFSPO0, GPIO_FN_PORT146_VIO_CKO2, GPIO_FN_TSTMD,
- GPIO_FN_VIO_VD, GPIO_FN_VIO_HD,
- GPIO_FN_VIO_D0, GPIO_FN_VIO_D1, GPIO_FN_VIO_D2,
- GPIO_FN_VIO_D3, GPIO_FN_VIO_D4, GPIO_FN_VIO_D5,
- GPIO_FN_VIO_D6, GPIO_FN_VIO_D7, GPIO_FN_VIO_D8,
- GPIO_FN_VIO_D9, GPIO_FN_VIO_D10, GPIO_FN_VIO_D11,
- GPIO_FN_VIO_D12, GPIO_FN_VIO_D13, GPIO_FN_VIO_D14,
- GPIO_FN_VIO_D15, GPIO_FN_VIO_CLK, GPIO_FN_VIO_FIELD,
- GPIO_FN_VIO_CKO,
- GPIO_FN_MFG3_IN1, GPIO_FN_MFG3_IN2,
- GPIO_FN_M9_SLCD_A01, GPIO_FN_MFG3_OUT1, GPIO_FN_TPU0TO0,
- GPIO_FN_M10_SLCD_CK1, GPIO_FN_MFG4_IN1, GPIO_FN_TPU0TO1,
- GPIO_FN_M11_SLCD_SO1, GPIO_FN_MFG4_IN2, GPIO_FN_TPU0TO2,
- GPIO_FN_M12_SLCD_CE1, GPIO_FN_MFG4_OUT1, GPIO_FN_TPU0TO3,
- GPIO_FN_LCDD0, GPIO_FN_PORT175_KEYOUT0, GPIO_FN_DV_D0,
- GPIO_FN_SIUCKA, GPIO_FN_MFG0_OUT2,
- GPIO_FN_LCDD1, GPIO_FN_PORT176_KEYOUT1, GPIO_FN_DV_D1,
- GPIO_FN_SIUAOLR, GPIO_FN_BBIF2_TSYNC1,
- GPIO_FN_LCDD2, GPIO_FN_PORT177_KEYOUT2, GPIO_FN_DV_D2,
- GPIO_FN_SIUAOBT, GPIO_FN_BBIF2_TSCK1,
- GPIO_FN_LCDD3, GPIO_FN_PORT178_KEYOUT3, GPIO_FN_DV_D3,
- GPIO_FN_SIUAOSLD, GPIO_FN_BBIF2_TXD1,
- GPIO_FN_LCDD4, GPIO_FN_PORT179_KEYOUT4, GPIO_FN_DV_D4,
- GPIO_FN_SIUAISPD, GPIO_FN_MFG1_OUT2,
- GPIO_FN_LCDD5, GPIO_FN_PORT180_KEYOUT5, GPIO_FN_DV_D5,
- GPIO_FN_SIUAILR, GPIO_FN_MFG2_OUT2,
- GPIO_FN_LCDD6, GPIO_FN_DV_D6,
- GPIO_FN_SIUAIBT, GPIO_FN_MFG3_OUT2, GPIO_FN_XWR2,
- GPIO_FN_LCDD7, GPIO_FN_DV_D7,
- GPIO_FN_SIUAISLD, GPIO_FN_MFG4_OUT2, GPIO_FN_XWR3,
- GPIO_FN_LCDD8, GPIO_FN_DV_D8, GPIO_FN_D16, GPIO_FN_ED16,
- GPIO_FN_LCDD9, GPIO_FN_DV_D9, GPIO_FN_D17, GPIO_FN_ED17,
- GPIO_FN_LCDD10, GPIO_FN_DV_D10, GPIO_FN_D18, GPIO_FN_ED18,
- GPIO_FN_LCDD11, GPIO_FN_DV_D11, GPIO_FN_D19, GPIO_FN_ED19,
- GPIO_FN_LCDD12, GPIO_FN_DV_D12, GPIO_FN_D20, GPIO_FN_ED20,
- GPIO_FN_LCDD13, GPIO_FN_DV_D13, GPIO_FN_D21, GPIO_FN_ED21,
- GPIO_FN_LCDD14, GPIO_FN_DV_D14, GPIO_FN_D22, GPIO_FN_ED22,
- GPIO_FN_LCDD15, GPIO_FN_DV_D15, GPIO_FN_D23, GPIO_FN_ED23,
- GPIO_FN_LCDD16, GPIO_FN_DV_HSYNC, GPIO_FN_D24, GPIO_FN_ED24,
- GPIO_FN_LCDD17, GPIO_FN_DV_VSYNC, GPIO_FN_D25, GPIO_FN_ED25,
- GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_MSIOF0L_TSCK,
- GPIO_FN_D26, GPIO_FN_ED26,
- GPIO_FN_LCDD19, GPIO_FN_MSIOF0L_TSYNC,
- GPIO_FN_D27, GPIO_FN_ED27,
- GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0,
- GPIO_FN_D28, GPIO_FN_ED28,
- GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1,
- GPIO_FN_D29, GPIO_FN_ED29,
- GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_SS1,
- GPIO_FN_D30, GPIO_FN_ED30,
- GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_SS2,
- GPIO_FN_D31, GPIO_FN_ED31,
- GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_DV_CKO, GPIO_FN_SIUAOSPD,
- GPIO_FN_LCDRD, GPIO_FN_DACK2, GPIO_FN_MSIOF0L_RSYNC,
-
-
- /* 49-5 (FN) */
- GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDCS2, GPIO_FN_DACK3,
- GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_RSCK,
- GPIO_FN_LCDCSYN, GPIO_FN_LCDCSYN2, GPIO_FN_DV_CKI,
- GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_MSIOF0L_RXD,
- GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_MSIOF0L_TXD,
- GPIO_FN_VIO_DR0, GPIO_FN_VIO_DR1, GPIO_FN_VIO_DR2, GPIO_FN_VIO_DR3,
- GPIO_FN_VIO_DR4, GPIO_FN_VIO_DR5, GPIO_FN_VIO_DR6, GPIO_FN_VIO_DR7,
- GPIO_FN_VIO_VDR, GPIO_FN_VIO_HDR,
- GPIO_FN_VIO_CLKR, GPIO_FN_VIO_CKOR,
- GPIO_FN_SCIFA1_TXD, GPIO_FN_GPS_PGFA0,
- GPIO_FN_SCIFA1_SCK, GPIO_FN_GPS_PGFA1,
- GPIO_FN_SCIFA1_RTS, GPIO_FN_GPS_EPPSINMON,
- GPIO_FN_SCIFA1_RXD, GPIO_FN_SCIFA1_CTS,
- GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA1_TXD2, GPIO_FN_GPS_TXD,
- GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA1_CTS2, GPIO_FN_I2C_SDA2,
- GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA1_SCK2,
- GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA1_RXD2, GPIO_FN_GPS_RXD,
- GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA1_RTS2,
- GPIO_FN_MSIOF1_RSYNC, GPIO_FN_I2C_SCL2,
- GPIO_FN_MSIOF1_MCK0, GPIO_FN_MSIOF1_MCK1,
- GPIO_FN_MSIOF1_SS1, GPIO_FN_EDBGREQ3,
- GPIO_FN_MSIOF1_SS2,
- GPIO_FN_PORT236_IROUT, GPIO_FN_IRDA_OUT,
- GPIO_FN_IRDA_IN, GPIO_FN_IRDA_FIRSEL,
- GPIO_FN_TPU1TO0, GPIO_FN_TS_SPSYNC3,
- GPIO_FN_TPU1TO1, GPIO_FN_TS_SDAT3,
- GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT241_MSIOF2_SS1,
- GPIO_FN_TPU1TO3, GPIO_FN_PORT242_MSIOF2_TSCK,
- GPIO_FN_M13_BSW, GPIO_FN_PORT243_MSIOF2_TSYNC,
- GPIO_FN_M14_GSW, GPIO_FN_PORT244_MSIOF2_TXD,
- GPIO_FN_PORT245_IROUT, GPIO_FN_M15_RSW,
- GPIO_FN_SOUT3, GPIO_FN_SCIFA2_TXD1,
- GPIO_FN_SIN3, GPIO_FN_SCIFA2_RXD1,
- GPIO_FN_XRTS3, GPIO_FN_SCIFA2_RTS1, GPIO_FN_PORT248_MSIOF2_SS2,
- GPIO_FN_XCTS3, GPIO_FN_SCIFA2_CTS1, GPIO_FN_PORT249_MSIOF2_RXD,
- GPIO_FN_DINT, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3,
- GPIO_FN_SDHICLK0, GPIO_FN_TCK2,
- GPIO_FN_SDHICD0,
- GPIO_FN_SDHID0_0, GPIO_FN_TMS2,
- GPIO_FN_SDHID0_1, GPIO_FN_TDO2,
- GPIO_FN_SDHID0_2, GPIO_FN_TDI2,
- GPIO_FN_SDHID0_3, GPIO_FN_RTCK2,
-
- /* 49-6 (FN) */
- GPIO_FN_SDHICMD0, GPIO_FN_TRST2,
- GPIO_FN_SDHIWP0, GPIO_FN_EDBGREQ2,
- GPIO_FN_SDHICLK1, GPIO_FN_TCK3,
- GPIO_FN_SDHID1_0, GPIO_FN_M11_SLCD_SO2,
- GPIO_FN_TS_SPSYNC2, GPIO_FN_TMS3,
- GPIO_FN_SDHID1_1, GPIO_FN_M9_SLCD_AO2,
- GPIO_FN_TS_SDAT2, GPIO_FN_TDO3,
- GPIO_FN_SDHID1_2, GPIO_FN_M10_SLCD_CK2,
- GPIO_FN_TS_SDEN2, GPIO_FN_TDI3,
- GPIO_FN_SDHID1_3, GPIO_FN_M12_SLCD_CE2,
- GPIO_FN_TS_SCK2, GPIO_FN_RTCK3,
- GPIO_FN_SDHICMD1, GPIO_FN_TRST3,
- GPIO_FN_SDHICLK2, GPIO_FN_SCIFB_SCK,
- GPIO_FN_SDHID2_0, GPIO_FN_SCIFB_TXD,
- GPIO_FN_SDHID2_1, GPIO_FN_SCIFB_CTS,
- GPIO_FN_SDHID2_2, GPIO_FN_SCIFB_RXD,
- GPIO_FN_SDHID2_3, GPIO_FN_SCIFB_RTS,
- GPIO_FN_SDHICMD2,
- GPIO_FN_RESETOUTS,
- GPIO_FN_DIVLOCK,
-};
-
-#endif /* __ASM_SH7367_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index eb98b45..26cd101 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -452,6 +452,10 @@
SHDMA_SLAVE_SCIF5_RX,
SHDMA_SLAVE_SCIF6_TX,
SHDMA_SLAVE_SCIF6_RX,
+ SHDMA_SLAVE_FLCTL0_TX,
+ SHDMA_SLAVE_FLCTL0_RX,
+ SHDMA_SLAVE_FLCTL1_TX,
+ SHDMA_SLAVE_FLCTL1_RX,
SHDMA_SLAVE_SDHI0_RX,
SHDMA_SLAVE_SDHI0_TX,
SHDMA_SLAVE_SDHI1_RX,
@@ -475,8 +479,6 @@
extern struct clk sh7372_pllc2_clk;
extern struct clk sh7372_fsiack_clk;
extern struct clk sh7372_fsibck_clk;
-extern struct clk sh7372_fsidiva_clk;
-extern struct clk sh7372_fsidivb_clk;
extern void sh7372_intcs_suspend(void);
extern void sh7372_intcs_resume(void);
diff --git a/arch/arm/mach-shmobile/include/mach/sh7377.h b/arch/arm/mach-shmobile/include/mach/sh7377.h
deleted file mode 100644
index f580e22..0000000
--- a/arch/arm/mach-shmobile/include/mach/sh7377.h
+++ /dev/null
@@ -1,360 +0,0 @@
-#ifndef __ASM_SH7377_H__
-#define __ASM_SH7377_H__
-
-/* Pin Function Controller:
- * GPIO_FN_xx - GPIO used to select pin function
- * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
- */
-enum {
- /* 55-1 -> 55-5 (GPIO) */
- GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
- GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
-
- GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
- GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
-
- GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
- GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
-
- GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
- GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
-
- GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
- GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
-
- GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
- GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
-
- GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
- GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
-
- GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
- GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
-
- GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
- GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
-
- GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
- GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
-
- GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
- GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
-
- GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
- GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118,
-
- GPIO_PORT128, GPIO_PORT129,
-
- GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
- GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
-
- GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
- GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
-
- GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
- GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
-
- GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
-
- GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
- GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
-
- GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
- GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
-
- GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,
- GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,
-
- GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,
- GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,
-
- GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,
- GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,
-
- GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,
- GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,
-
- GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,
- GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,
-
- GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,
-
- /* Special Pull-up / Pull-down Functions */
- GPIO_FN_PORT66_KEYIN0_PU, GPIO_FN_PORT67_KEYIN1_PU,
- GPIO_FN_PORT68_KEYIN2_PU, GPIO_FN_PORT69_KEYIN3_PU,
- GPIO_FN_PORT70_KEYIN4_PU, GPIO_FN_PORT71_KEYIN5_PU,
- GPIO_FN_PORT72_KEYIN6_PU,
-
- /* 55-1 (FN) */
- GPIO_FN_VBUS_0,
- GPIO_FN_CPORT0,
- GPIO_FN_CPORT1,
- GPIO_FN_CPORT2,
- GPIO_FN_CPORT3,
- GPIO_FN_CPORT4,
- GPIO_FN_CPORT5,
- GPIO_FN_CPORT6,
- GPIO_FN_CPORT7,
- GPIO_FN_CPORT8,
- GPIO_FN_CPORT9,
- GPIO_FN_CPORT10,
- GPIO_FN_CPORT11, GPIO_FN_SIN2,
- GPIO_FN_CPORT12, GPIO_FN_XCTS2,
- GPIO_FN_CPORT13, GPIO_FN_RFSPO4,
- GPIO_FN_CPORT14, GPIO_FN_RFSPO5,
- GPIO_FN_CPORT15, GPIO_FN_SCIFA0_SCK, GPIO_FN_GPS_AGC2,
- GPIO_FN_CPORT16, GPIO_FN_SCIFA0_TXD, GPIO_FN_GPS_AGC3,
- GPIO_FN_CPORT17_IC_OE, GPIO_FN_SOUT2,
- GPIO_FN_CPORT18, GPIO_FN_XRTS2, GPIO_FN_PORT19_VIO_CKO2,
- GPIO_FN_CPORT19_MPORT1,
- GPIO_FN_CPORT20, GPIO_FN_RFSPO6,
- GPIO_FN_CPORT21, GPIO_FN_STATUS0,
- GPIO_FN_CPORT22, GPIO_FN_STATUS1,
- GPIO_FN_CPORT23, GPIO_FN_STATUS2, GPIO_FN_RFSPO7,
- GPIO_FN_B_SYNLD1,
- GPIO_FN_B_SYNLD2, GPIO_FN_SYSENMSK,
- GPIO_FN_XMAINPS,
- GPIO_FN_XDIVPS,
- GPIO_FN_XIDRST,
- GPIO_FN_IDCLK, GPIO_FN_IC_DP,
- GPIO_FN_IDIO, GPIO_FN_IC_DM,
- GPIO_FN_SOUT1, GPIO_FN_SCIFA4_TXD, GPIO_FN_M02_BERDAT,
- GPIO_FN_SIN1, GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP,
- GPIO_FN_XRTS1, GPIO_FN_SCIFA4_RTS, GPIO_FN_M03_BERCLK,
- GPIO_FN_XCTS1, GPIO_FN_SCIFA4_CTS,
- GPIO_FN_PCMCLKO,
- GPIO_FN_SYNC8KO,
-
- /* 55-2 (FN) */
- GPIO_FN_DNPCM_A,
- GPIO_FN_UPPCM_A,
- GPIO_FN_VACK,
- GPIO_FN_XTALB1L,
- GPIO_FN_GPS_AGC1, GPIO_FN_SCIFA0_RTS,
- GPIO_FN_GPS_AGC4, GPIO_FN_SCIFA0_RXD,
- GPIO_FN_GPS_PWRDOWN, GPIO_FN_SCIFA0_CTS,
- GPIO_FN_GPS_IM,
- GPIO_FN_GPS_IS,
- GPIO_FN_GPS_QM,
- GPIO_FN_GPS_QS,
- GPIO_FN_FMSOCK, GPIO_FN_PORT49_IRDA_OUT, GPIO_FN_PORT49_IROUT,
- GPIO_FN_FMSOOLR, GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, GPIO_FN_IPORT3,
- GPIO_FN_FMSIOLR,
- GPIO_FN_FMSOOBT, GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, GPIO_FN_OPORT1,
- GPIO_FN_FMSIOBT,
- GPIO_FN_FMSOSLD, GPIO_FN_BBIF2_TXD2, GPIO_FN_OPORT2,
- GPIO_FN_FMSOILR, GPIO_FN_PORT53_IRDA_IN, GPIO_FN_TPU3TO3,
- GPIO_FN_OPORT3, GPIO_FN_FMSIILR,
- GPIO_FN_FMSOIBT, GPIO_FN_PORT54_IRDA_FIRSEL, GPIO_FN_TPU3TO2,
- GPIO_FN_FMSIIBT,
- GPIO_FN_FMSISLD, GPIO_FN_MFG0_OUT1, GPIO_FN_TPU0TO0,
- GPIO_FN_A0_EA0, GPIO_FN_BS,
- GPIO_FN_A12_EA12, GPIO_FN_PORT58_VIO_CKOR, GPIO_FN_TPU4TO2,
- GPIO_FN_A13_EA13, GPIO_FN_PORT59_IROUT, GPIO_FN_MFG0_OUT2,
- GPIO_FN_TPU0TO1,
- GPIO_FN_A14_EA14, GPIO_FN_PORT60_KEYOUT5,
- GPIO_FN_A15_EA15, GPIO_FN_PORT61_KEYOUT4,
- GPIO_FN_A16_EA16, GPIO_FN_PORT62_KEYOUT3, GPIO_FN_MSIOF0_SS1,
- GPIO_FN_A17_EA17, GPIO_FN_PORT63_KEYOUT2, GPIO_FN_MSIOF0_TSYNC,
- GPIO_FN_A18_EA18, GPIO_FN_PORT64_KEYOUT1, GPIO_FN_MSIOF0_TSCK,
- GPIO_FN_A19_EA19, GPIO_FN_PORT65_KEYOUT0, GPIO_FN_MSIOF0_TXD,
- GPIO_FN_A20_EA20, GPIO_FN_PORT66_KEYIN0, GPIO_FN_MSIOF0_RSCK,
- GPIO_FN_A21_EA21, GPIO_FN_PORT67_KEYIN1, GPIO_FN_MSIOF0_RSYNC,
- GPIO_FN_A22_EA22, GPIO_FN_PORT68_KEYIN2, GPIO_FN_MSIOF0_MCK0,
- GPIO_FN_A23_EA23, GPIO_FN_PORT69_KEYIN3, GPIO_FN_MSIOF0_MCK1,
- GPIO_FN_A24_EA24, GPIO_FN_PORT70_KEYIN4, GPIO_FN_MSIOF0_RXD,
- GPIO_FN_A25_EA25, GPIO_FN_PORT71_KEYIN5, GPIO_FN_MSIOF0_SS2,
- GPIO_FN_A26, GPIO_FN_PORT72_KEYIN6,
- GPIO_FN_D0_ED0_NAF0,
- GPIO_FN_D1_ED1_NAF1,
- GPIO_FN_D2_ED2_NAF2,
- GPIO_FN_D3_ED3_NAF3,
- GPIO_FN_D4_ED4_NAF4,
- GPIO_FN_D5_ED5_NAF5,
- GPIO_FN_D6_ED6_NAF6,
- GPIO_FN_D7_ED7_NAF7,
- GPIO_FN_D8_ED8_NAF8,
- GPIO_FN_D9_ED9_NAF9,
- GPIO_FN_D10_ED10_NAF10,
- GPIO_FN_D11_ED11_NAF11,
- GPIO_FN_D12_ED12_NAF12,
- GPIO_FN_D13_ED13_NAF13,
- GPIO_FN_D14_ED14_NAF14,
- GPIO_FN_D15_ED15_NAF15,
- GPIO_FN_CS4,
- GPIO_FN_CS5A, GPIO_FN_FMSICK,
- GPIO_FN_CS5B, GPIO_FN_FCE1,
-
- /* 55-3 (FN) */
- GPIO_FN_CS6B, GPIO_FN_XCS2, GPIO_FN_CS6A, GPIO_FN_DACK0,
- GPIO_FN_FCE0,
- GPIO_FN_WAIT, GPIO_FN_DREQ0,
- GPIO_FN_RD_XRD,
- GPIO_FN_WE0_XWR0_FWE,
- GPIO_FN_WE1_XWR1,
- GPIO_FN_FRB,
- GPIO_FN_CKO,
- GPIO_FN_NBRSTOUT,
- GPIO_FN_NBRST,
- GPIO_FN_GPS_EPPSIN,
- GPIO_FN_LATCHPULSE,
- GPIO_FN_LTESIGNAL,
- GPIO_FN_LEGACYSTATE,
- GPIO_FN_TCKON,
- GPIO_FN_VIO_VD, GPIO_FN_PORT128_KEYOUT0, GPIO_FN_IPORT0,
- GPIO_FN_VIO_HD, GPIO_FN_PORT129_KEYOUT1, GPIO_FN_IPORT1,
- GPIO_FN_VIO_D0, GPIO_FN_PORT130_KEYOUT2, GPIO_FN_PORT130_MSIOF2_RXD,
- GPIO_FN_VIO_D1, GPIO_FN_PORT131_KEYOUT3, GPIO_FN_PORT131_MSIOF2_SS1,
- GPIO_FN_VIO_D2, GPIO_FN_PORT132_KEYOUT4, GPIO_FN_PORT132_MSIOF2_SS2,
- GPIO_FN_VIO_D3, GPIO_FN_PORT133_KEYOUT5, GPIO_FN_PORT133_MSIOF2_TSYNC,
- GPIO_FN_VIO_D4, GPIO_FN_PORT134_KEYIN0, GPIO_FN_PORT134_MSIOF2_TXD,
- GPIO_FN_VIO_D5, GPIO_FN_PORT135_KEYIN1, GPIO_FN_PORT135_MSIOF2_TSCK,
- GPIO_FN_VIO_D6, GPIO_FN_PORT136_KEYIN2,
- GPIO_FN_VIO_D7, GPIO_FN_PORT137_KEYIN3,
- GPIO_FN_VIO_D8, GPIO_FN_M9_SLCD_A01, GPIO_FN_PORT138_FSIAOMC,
- GPIO_FN_VIO_D9, GPIO_FN_M10_SLCD_CK1, GPIO_FN_PORT139_FSIAOLR,
- GPIO_FN_VIO_D10, GPIO_FN_M11_SLCD_SO1, GPIO_FN_TPU0TO2,
- GPIO_FN_PORT140_FSIAOBT,
- GPIO_FN_VIO_D11, GPIO_FN_M12_SLCD_CE1, GPIO_FN_TPU0TO3,
- GPIO_FN_PORT141_FSIAOSLD,
- GPIO_FN_VIO_D12, GPIO_FN_M13_BSW, GPIO_FN_PORT142_FSIACK,
- GPIO_FN_VIO_D13, GPIO_FN_M14_GSW, GPIO_FN_PORT143_FSIAILR,
- GPIO_FN_VIO_D14, GPIO_FN_M15_RSW, GPIO_FN_PORT144_FSIAIBT,
- GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3, GPIO_FN_PORT145_FSIAISLD,
- GPIO_FN_VIO_CLK, GPIO_FN_PORT146_KEYIN4, GPIO_FN_IPORT2,
- GPIO_FN_VIO_FIELD, GPIO_FN_PORT147_KEYIN5,
- GPIO_FN_VIO_CKO, GPIO_FN_PORT148_KEYIN6,
- GPIO_FN_A27, GPIO_FN_RDWR_XWE, GPIO_FN_MFG0_IN1,
- GPIO_FN_MFG0_IN2,
- GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK,
- GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC,
- GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1,
- GPIO_FN_SOUT3, GPIO_FN_SCIFA2_TXD1, GPIO_FN_MSIOF2_MCK0,
- GPIO_FN_SIN3, GPIO_FN_SCIFA2_RXD1, GPIO_FN_MSIOF2_MCK1,
- GPIO_FN_XRTS3, GPIO_FN_SCIFA2_RTS1, GPIO_FN_PORT156_MSIOF2_SS2,
- GPIO_FN_XCTS3, GPIO_FN_SCIFA2_CTS1, GPIO_FN_PORT157_MSIOF2_RXD,
-
- /* 55-4 (FN) */
- GPIO_FN_DINT, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3,
- GPIO_FN_PORT159_SCIFB_SCK, GPIO_FN_PORT159_SCIFA5_SCK, GPIO_FN_NMI,
- GPIO_FN_PORT160_SCIFB_TXD, GPIO_FN_PORT160_SCIFA5_TXD, GPIO_FN_SOUT0,
- GPIO_FN_PORT161_SCIFB_CTS, GPIO_FN_PORT161_SCIFA5_CTS, GPIO_FN_XCTS0,
- GPIO_FN_MFG3_IN2,
- GPIO_FN_PORT162_SCIFB_RXD, GPIO_FN_PORT162_SCIFA5_RXD, GPIO_FN_SIN0,
- GPIO_FN_MFG3_IN1,
- GPIO_FN_PORT163_SCIFB_RTS, GPIO_FN_PORT163_SCIFA5_RTS, GPIO_FN_XRTS0,
- GPIO_FN_MFG3_OUT1,
- GPIO_FN_TPU3TO0,
- GPIO_FN_LCDD0, GPIO_FN_PORT192_KEYOUT0, GPIO_FN_EXT_CKI,
- GPIO_FN_LCDD1, GPIO_FN_PORT193_KEYOUT1, GPIO_FN_PORT193_SCIFA5_CTS,
- GPIO_FN_BBIF2_TSYNC1,
- GPIO_FN_LCDD2, GPIO_FN_PORT194_KEYOUT2, GPIO_FN_PORT194_SCIFA5_RTS,
- GPIO_FN_BBIF2_TSCK1,
- GPIO_FN_LCDD3, GPIO_FN_PORT195_KEYOUT3, GPIO_FN_PORT195_SCIFA5_RXD,
- GPIO_FN_BBIF2_TXD1,
- GPIO_FN_LCDD4, GPIO_FN_PORT196_KEYOUT4, GPIO_FN_PORT196_SCIFA5_TXD,
- GPIO_FN_LCDD5, GPIO_FN_PORT197_KEYOUT5, GPIO_FN_PORT197_SCIFA5_SCK,
- GPIO_FN_MFG2_OUT2, GPIO_FN_TPU2TO1,
- GPIO_FN_LCDD6, GPIO_FN_XWR2,
- GPIO_FN_LCDD7, GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2, GPIO_FN_XWR3,
- GPIO_FN_LCDD8, GPIO_FN_PORT200_KEYIN0, GPIO_FN_VIO_DR0, GPIO_FN_D16,
- GPIO_FN_ED16,
- GPIO_FN_LCDD9, GPIO_FN_PORT201_KEYIN1, GPIO_FN_VIO_DR1, GPIO_FN_D17,
- GPIO_FN_ED17,
- GPIO_FN_LCDD10, GPIO_FN_PORT202_KEYIN2, GPIO_FN_VIO_DR2, GPIO_FN_D18,
- GPIO_FN_ED18,
- GPIO_FN_LCDD11, GPIO_FN_PORT203_KEYIN3, GPIO_FN_VIO_DR3, GPIO_FN_D19,
- GPIO_FN_ED19,
- GPIO_FN_LCDD12, GPIO_FN_PORT204_KEYIN4, GPIO_FN_VIO_DR4, GPIO_FN_D20,
- GPIO_FN_ED20,
- GPIO_FN_LCDD13, GPIO_FN_PORT205_KEYIN5, GPIO_FN_VIO_DR5, GPIO_FN_D21,
- GPIO_FN_ED21,
- GPIO_FN_LCDD14, GPIO_FN_PORT206_KEYIN6, GPIO_FN_VIO_DR6, GPIO_FN_D22,
- GPIO_FN_ED22,
- GPIO_FN_LCDD15, GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_PORT207_KEYOUT0,
- GPIO_FN_VIO_DR7,
- GPIO_FN_D23, GPIO_FN_ED23,
- GPIO_FN_LCDD16, GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_PORT208_KEYOUT1,
- GPIO_FN_VIO_VDR,
- GPIO_FN_D24, GPIO_FN_ED24,
- GPIO_FN_LCDD17, GPIO_FN_PORT209_KEYOUT2, GPIO_FN_VIO_HDR, GPIO_FN_D25,
- GPIO_FN_ED25,
- GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,
- GPIO_FN_ED26,
- GPIO_FN_LCDD19, GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27, GPIO_FN_ED27,
- GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,
- GPIO_FN_ED28,
- GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,
- GPIO_FN_ED29,
- GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,
- GPIO_FN_ED30,
- GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,
- GPIO_FN_ED31,
- GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_PORT216_KEYOUT3,
- GPIO_FN_VIO_CLKR,
- GPIO_FN_LCDRD, GPIO_FN_DACK2, GPIO_FN_MSIOF0L_TSYNC,
- GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDCS2, GPIO_FN_DACK3,
- GPIO_FN_PORT218_VIO_CKOR, GPIO_FN_PORT218_KEYOUT4,
- GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK,
- GPIO_FN_LCDVSYN, GPIO_FN_LCDVSYN2, GPIO_FN_PORT220_KEYOUT5,
- GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD,
- GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_OVCN,
- GPIO_FN_MSIOF0L_TXD,
- GPIO_FN_SCIFA1_TXD, GPIO_FN_OVCN2,
- GPIO_FN_EXTLP, GPIO_FN_SCIFA1_SCK, GPIO_FN_USBTERM,
- GPIO_FN_PORT226_VIO_CKO2,
- GPIO_FN_SCIFA1_RTS, GPIO_FN_IDIN,
- GPIO_FN_SCIFA1_RXD,
- GPIO_FN_SCIFA1_CTS, GPIO_FN_MFG1_IN1,
- GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA2_TXD2, GPIO_FN_PORT230_FSIAOMC,
- GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA2_CTS2, GPIO_FN_PORT231_FSIAOLR,
- GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA2_SCK2, GPIO_FN_PORT232_FSIAOBT,
- GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA2_RXD2, GPIO_FN_GPS_VCOTRIG,
- GPIO_FN_PORT233_FSIACK,
- GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA2_RTS2, GPIO_FN_PORT234_FSIAOSLD,
- GPIO_FN_MSIOF1_RSYNC, GPIO_FN_OPORT0, GPIO_FN_MFG1_IN2,
- GPIO_FN_PORT235_FSIAILR,
- GPIO_FN_MSIOF1_MCK0, GPIO_FN_I2C_SDA2, GPIO_FN_PORT236_FSIAIBT,
- GPIO_FN_MSIOF1_MCK1, GPIO_FN_I2C_SCL2, GPIO_FN_PORT237_FSIAISLD,
- GPIO_FN_MSIOF1_SS1, GPIO_FN_EDBGREQ3,
-
- /* 55-5 (FN) */
- GPIO_FN_MSIOF1_SS2,
- GPIO_FN_SCIFA6_TXD,
- GPIO_FN_PORT241_IRDA_OUT, GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1,
- GPIO_FN_TPU4TO0,
- GPIO_FN_PORT242_IRDA_IN, GPIO_FN_MFG4_IN2,
- GPIO_FN_PORT243_IRDA_FIRSEL, GPIO_FN_PORT243_VIO_CKO2,
- GPIO_FN_PORT244_SCIFA5_CTS, GPIO_FN_MFG2_IN1, GPIO_FN_PORT244_SCIFB_CTS,
- GPIO_FN_PORT244_MSIOF2_RXD,
- GPIO_FN_PORT245_SCIFA5_RTS, GPIO_FN_MFG2_IN2, GPIO_FN_PORT245_SCIFB_RTS,
- GPIO_FN_PORT245_MSIOF2_TXD,
- GPIO_FN_PORT246_SCIFA5_RXD, GPIO_FN_MFG1_OUT1,
- GPIO_FN_PORT246_SCIFB_RXD, GPIO_FN_TPU1TO0,
- GPIO_FN_PORT247_SCIFA5_TXD, GPIO_FN_MFG3_OUT2,
- GPIO_FN_PORT247_SCIFB_TXD, GPIO_FN_TPU3TO1,
- GPIO_FN_PORT248_SCIFA5_SCK, GPIO_FN_MFG2_OUT1,
- GPIO_FN_PORT248_SCIFB_SCK, GPIO_FN_TPU2TO0,
- GPIO_FN_PORT248_MSIOF2_TSCK,
- GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, GPIO_FN_PORT249_MSIOF2_TSYNC,
- GPIO_FN_SDHICLK0, GPIO_FN_TCK2_SWCLK_MC0,
- GPIO_FN_SDHICD0,
- GPIO_FN_SDHID0_0, GPIO_FN_TMS2_SWDIO_MC0,
- GPIO_FN_SDHID0_1, GPIO_FN_TDO2_SWO0_MC0,
- GPIO_FN_SDHID0_2, GPIO_FN_TDI2,
- GPIO_FN_SDHID0_3, GPIO_FN_RTCK2_SWO1_MC0,
- GPIO_FN_SDHICMD0, GPIO_FN_TRST2,
- GPIO_FN_SDHIWP0, GPIO_FN_EDBGREQ2,
- GPIO_FN_SDHICLK1, GPIO_FN_TCK3_SWCLK_MC1,
- GPIO_FN_SDHID1_0, GPIO_FN_M11_SLCD_SO2, GPIO_FN_TS_SPSYNC2,
- GPIO_FN_TMS3_SWDIO_MC1,
- GPIO_FN_SDHID1_1, GPIO_FN_M9_SLCD_A02, GPIO_FN_TS_SDAT2,
- GPIO_FN_TDO3_SWO0_MC1,
- GPIO_FN_SDHID1_2, GPIO_FN_M10_SLCD_CK2, GPIO_FN_TS_SDEN2, GPIO_FN_TDI3,
- GPIO_FN_SDHID1_3, GPIO_FN_M12_SLCD_CE2, GPIO_FN_TS_SCK2,
- GPIO_FN_RTCK3_SWO1_MC1,
- GPIO_FN_SDHICMD1, GPIO_FN_TRST3,
- GPIO_FN_RESETOUTS,
-};
-
-#endif /* __ASM_SH7377_H__ */
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c
deleted file mode 100644
index 5bf7764..0000000
--- a/arch/arm/mach-shmobile/intc-sh7367.c
+++ /dev/null
@@ -1,413 +0,0 @@
-/*
- * sh7367 processor support - INTC hardware block
- *
- * Copyright (C) 2010 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/sh_intc.h>
-#include <mach/intc.h>
-#include <mach/irqs.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-enum {
- UNUSED_INTCA = 0,
- ENABLED,
- DISABLED,
-
- /* interrupt sources INTCA */
- DIRC,
- CRYPT1_ERR, CRYPT2_STD,
- IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1,
- ARM11_IRQPMU, ARM11_COMMTX, ARM11_COMMRX,
- ETM11_ACQCMP, ETM11_FULL,
- MFI_MFIM, MFI_MFIS,
- BBIF1, BBIF2,
- USBDMAC_USHDMI,
- USBHS_USHI0, USBHS_USHI1,
- CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3,
- KEYSC_KEY,
- SCIFA0, SCIFA1, SCIFA2, SCIFA3,
- MSIOF2, MSIOF1,
- SCIFA4, SCIFA5, SCIFB,
- FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
- SDHI0,
- SDHI1,
- MSU_MSU, MSU_MSU2,
- IREM,
- SIU,
- SPU,
- IRDA,
- TPU0, TPU1, TPU2, TPU3, TPU4,
- LCRC,
- PINT1, PINT2,
- TTI20,
- MISTY,
- DDM,
- SDHI2,
- RWDT0, RWDT1,
- DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3,
- DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR,
- DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3,
- DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR,
- DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
- DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
-
- /* interrupt groups INTCA */
- DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2,
- ETM11, ARM11, USBHS, FLCTL, IIC1
-};
-
-static struct intc_vect intca_vectors[] __initdata = {
- INTC_VECT(DIRC, 0x0560),
- INTC_VECT(CRYPT1_ERR, 0x05e0),
- INTC_VECT(CRYPT2_STD, 0x0700),
- INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0),
- INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0),
- INTC_VECT(ARM11_IRQPMU, 0x0800), INTC_VECT(ARM11_COMMTX, 0x0840),
- INTC_VECT(ARM11_COMMRX, 0x0860),
- INTC_VECT(ETM11_ACQCMP, 0x0880), INTC_VECT(ETM11_FULL, 0x08a0),
- INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920),
- INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960),
- INTC_VECT(USBDMAC_USHDMI, 0x0a00),
- INTC_VECT(USBHS_USHI0, 0x0a20), INTC_VECT(USBHS_USHI1, 0x0a40),
- INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20),
- INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60),
- INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0),
- INTC_VECT(KEYSC_KEY, 0x0be0),
- INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20),
- INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60),
- INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00),
- INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40),
- INTC_VECT(SCIFB, 0x0d60),
- INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
- INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
- INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20),
- INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60),
- INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0),
- INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0),
- INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40),
- INTC_VECT(IREM, 0x0f60),
- INTC_VECT(SIU, 0x0fa0),
- INTC_VECT(SPU, 0x0fc0),
- INTC_VECT(IRDA, 0x0480),
- INTC_VECT(TPU0, 0x04a0), INTC_VECT(TPU1, 0x04c0),
- INTC_VECT(TPU2, 0x04e0), INTC_VECT(TPU3, 0x0500),
- INTC_VECT(TPU4, 0x0520),
- INTC_VECT(LCRC, 0x0540),
- INTC_VECT(PINT1, 0x1000), INTC_VECT(PINT2, 0x1020),
- INTC_VECT(TTI20, 0x1100),
- INTC_VECT(MISTY, 0x1120),
- INTC_VECT(DDM, 0x1140),
- INTC_VECT(SDHI2, 0x1200), INTC_VECT(SDHI2, 0x1220),
- INTC_VECT(SDHI2, 0x1240), INTC_VECT(SDHI2, 0x1260),
- INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0),
- INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020),
- INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060),
- INTC_VECT(DMAC_2_DEI4, 0x2080), INTC_VECT(DMAC_2_DEI5, 0x20a0),
- INTC_VECT(DMAC_2_DADERR, 0x20c0),
- INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120),
- INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160),
- INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0),
- INTC_VECT(DMAC2_2_DADERR, 0x21c0),
- INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220),
- INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260),
- INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0),
- INTC_VECT(DMAC3_2_DADERR, 0x22c0),
-};
-
-static struct intc_group intca_groups[] __initdata = {
- INTC_GROUP(DMAC_1, DMAC_1_DEI0,
- DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3),
- INTC_GROUP(DMAC_2, DMAC_2_DEI4,
- DMAC_2_DEI5, DMAC_2_DADERR),
- INTC_GROUP(DMAC2_1, DMAC2_1_DEI0,
- DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3),
- INTC_GROUP(DMAC2_2, DMAC2_2_DEI4,
- DMAC2_2_DEI5, DMAC2_2_DADERR),
- INTC_GROUP(DMAC3_1, DMAC3_1_DEI0,
- DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3),
- INTC_GROUP(DMAC3_2, DMAC3_2_DEI4,
- DMAC3_2_DEI5, DMAC3_2_DADERR),
- INTC_GROUP(ETM11, ETM11_ACQCMP, ETM11_FULL),
- INTC_GROUP(ARM11, ARM11_IRQPMU, ARM11_COMMTX, ARM11_COMMTX),
- INTC_GROUP(USBHS, USBHS_USHI0, USBHS_USHI1),
- INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
- FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
- INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
-};
-
-static struct intc_mask_reg intca_mask_registers[] __initdata = {
- { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */
- { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0,
- ARM11_IRQPMU, 0, ARM11_COMMTX, ARM11_COMMRX } },
- { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */
- { CRYPT1_ERR, CRYPT2_STD, DIRC, 0,
- DMAC_1_DEI3, DMAC_1_DEI2, DMAC_1_DEI1, DMAC_1_DEI0 } },
- { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */
- { PINT1, PINT2, 0, 0,
- BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } },
- { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */
- { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0,
- DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } },
- { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */
- { DDM, 0, 0, 0,
- 0, 0, ETM11_FULL, ETM11_ACQCMP } },
- { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
- { KEYSC_KEY, DMAC_2_DADERR, DMAC_2_DEI5, DMAC_2_DEI4,
- SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
- { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
- { SCIFB, SCIFA5, SCIFA4, MSIOF1,
- 0, 0, MSIOF2, 0 } },
- { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
- { DISABLED, ENABLED, ENABLED, ENABLED,
- FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
- { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
- { DISABLED, ENABLED, ENABLED, ENABLED,
- TTI20, USBDMAC_USHDMI, SPU, SIU } },
- { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
- { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
- CMT2, USBHS_USHI1, USBHS_USHI0, 0 } },
- { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */
- { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4,
- 0, 0, 0, 0 } },
- { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */
- { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1,
- LCRC, MSU_MSU2, IREM, MSU_MSU } },
- { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */
- { 0, 0, TPU0, TPU1,
- TPU2, TPU3, TPU4, 0 } },
- { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
- { DISABLED, ENABLED, ENABLED, ENABLED,
- MISTY, CMT3, RWDT1, RWDT0 } },
-};
-
-static struct intc_prio_reg intca_prio_registers[] __initdata = {
- { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } },
- { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, ETM11, BBIF1, BBIF2 } },
- { 0xe6940008, 0, 16, 4, /* IPRCA */ { CRYPT1_ERR, CRYPT2_STD,
- CMT1_CMT11, ARM11 } },
- { 0xe694000c, 0, 16, 4, /* IPRDA */ { PINT1, PINT2,
- CMT1_CMT12, TPU4 } },
- { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC_1, MFI_MFIS,
- MFI_MFIM, USBHS } },
- { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC_2,
- 0, CMT1_CMT10 } },
- { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
- SCIFA2, SCIFA3 } },
- { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBDMAC_USHDMI,
- FLCTL, SDHI0 } },
- { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4, MSU_MSU, IIC1 } },
- { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2, SIU, TTI20 } },
- { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IREM, SDHI1 } },
- { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, TPU1, TPU2, TPU3 } },
- { 0xe6940030, 0, 16, 4, /* IPRMA */ { MISTY, CMT3, RWDT1, RWDT0 } },
- { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, SPU, DDM } },
- { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } },
-};
-
-static struct intc_desc intca_desc __initdata = {
- .name = "sh7367-intca",
- .force_enable = ENABLED,
- .force_disable = DISABLED,
- .hw = INTC_HW_DESC(intca_vectors, intca_groups,
- intca_mask_registers, intca_prio_registers,
- NULL, NULL),
-};
-
-INTC_IRQ_PINS_16(intca_irq_pins, 0xe6900000,
- INTC_VECT, "sh7367-intca-irq-pins");
-
-enum {
- UNUSED_INTCS = 0,
-
- INTCS,
-
- /* interrupt sources INTCS */
- VIO2_VEU0, VIO2_VEU1, VIO2_VEU2, VIO2_VEU3,
- VIO3_VOU,
- RTDMAC_1_DEI0, RTDMAC_1_DEI1, RTDMAC_1_DEI2, RTDMAC_1_DEI3,
- VIO1_CEU, VIO1_BEU0, VIO1_BEU1, VIO1_BEU2,
- VPU,
- SGX530,
- _2DDMAC_2DDM0, _2DDMAC_2DDM1, _2DDMAC_2DDM2, _2DDMAC_2DDM3,
- IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2,
- IPMMU_IPMMUB, IPMMU_IPMMUS,
- RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR,
- MSIOF,
- IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0,
- TMU_TUNI0, TMU_TUNI1, TMU_TUNI2,
- CMT,
- TSIF,
- IPMMUI,
- MVI3,
- ICB,
- PEP,
- ASA,
- BEM,
- VE2HO,
- HQE,
- JPEG,
- LCDC,
-
- /* interrupt groups INTCS */
- _2DDMAC, RTDMAC_1, RTDMAC_2, VEU, BEU, IIC0, IPMMU, IIC2,
-};
-
-static struct intc_vect intcs_vectors[] = {
- INTCS_VECT(VIO2_VEU0, 0x700), INTCS_VECT(VIO2_VEU1, 0x720),
- INTCS_VECT(VIO2_VEU2, 0x740), INTCS_VECT(VIO2_VEU3, 0x760),
- INTCS_VECT(VIO3_VOU, 0x780),
- INTCS_VECT(RTDMAC_1_DEI0, 0x800), INTCS_VECT(RTDMAC_1_DEI1, 0x820),
- INTCS_VECT(RTDMAC_1_DEI2, 0x840), INTCS_VECT(RTDMAC_1_DEI3, 0x860),
- INTCS_VECT(VIO1_CEU, 0x880), INTCS_VECT(VIO1_BEU0, 0x8a0),
- INTCS_VECT(VIO1_BEU1, 0x8c0), INTCS_VECT(VIO1_BEU2, 0x8e0),
- INTCS_VECT(VPU, 0x980),
- INTCS_VECT(SGX530, 0x9e0),
- INTCS_VECT(_2DDMAC_2DDM0, 0xa00), INTCS_VECT(_2DDMAC_2DDM1, 0xa20),
- INTCS_VECT(_2DDMAC_2DDM2, 0xa40), INTCS_VECT(_2DDMAC_2DDM3, 0xa60),
- INTCS_VECT(IIC2_ALI2, 0xa80), INTCS_VECT(IIC2_TACKI2, 0xaa0),
- INTCS_VECT(IIC2_WAITI2, 0xac0), INTCS_VECT(IIC2_DTEI2, 0xae0),
- INTCS_VECT(IPMMU_IPMMUB, 0xb20), INTCS_VECT(IPMMU_IPMMUS, 0xb60),
- INTCS_VECT(RTDMAC_2_DEI4, 0xb80), INTCS_VECT(RTDMAC_2_DEI5, 0xba0),
- INTCS_VECT(RTDMAC_2_DADERR, 0xbc0),
- INTCS_VECT(MSIOF, 0xd20),
- INTCS_VECT(IIC0_ALI0, 0xe00), INTCS_VECT(IIC0_TACKI0, 0xe20),
- INTCS_VECT(IIC0_WAITI0, 0xe40), INTCS_VECT(IIC0_DTEI0, 0xe60),
- INTCS_VECT(TMU_TUNI0, 0xe80), INTCS_VECT(TMU_TUNI1, 0xea0),
- INTCS_VECT(TMU_TUNI2, 0xec0),
- INTCS_VECT(CMT, 0xf00),
- INTCS_VECT(TSIF, 0xf20),
- INTCS_VECT(IPMMUI, 0xf60),
- INTCS_VECT(MVI3, 0x420),
- INTCS_VECT(ICB, 0x480),
- INTCS_VECT(PEP, 0x4a0),
- INTCS_VECT(ASA, 0x4c0),
- INTCS_VECT(BEM, 0x4e0),
- INTCS_VECT(VE2HO, 0x520),
- INTCS_VECT(HQE, 0x540),
- INTCS_VECT(JPEG, 0x560),
- INTCS_VECT(LCDC, 0x580),
-
- INTC_VECT(INTCS, 0xf80),
-};
-
-static struct intc_group intcs_groups[] __initdata = {
- INTC_GROUP(_2DDMAC, _2DDMAC_2DDM0, _2DDMAC_2DDM1,
- _2DDMAC_2DDM2, _2DDMAC_2DDM3),
- INTC_GROUP(RTDMAC_1, RTDMAC_1_DEI0, RTDMAC_1_DEI1,
- RTDMAC_1_DEI2, RTDMAC_1_DEI3),
- INTC_GROUP(RTDMAC_2, RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR),
- INTC_GROUP(VEU, VIO2_VEU0, VIO2_VEU1, VIO2_VEU2, VIO2_VEU3),
- INTC_GROUP(BEU, VIO1_BEU0, VIO1_BEU1, VIO1_BEU2),
- INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0),
- INTC_GROUP(IPMMU, IPMMU_IPMMUS, IPMMU_IPMMUB),
- INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2),
-};
-
-static struct intc_mask_reg intcs_mask_registers[] = {
- { 0xffd20184, 0xffd201c4, 8, /* IMR1SA / IMCR1SA */
- { VIO1_BEU2, VIO1_BEU1, VIO1_BEU0, VIO1_CEU,
- VIO2_VEU3, VIO2_VEU2, VIO2_VEU1, VIO2_VEU0 } },
- { 0xffd20188, 0xffd201c8, 8, /* IMR2SA / IMCR2SA */
- { VIO3_VOU, 0, VE2HO, VPU,
- 0, 0, 0, 0 } },
- { 0xffd2018c, 0xffd201cc, 8, /* IMR3SA / IMCR3SA */
- { _2DDMAC_2DDM3, _2DDMAC_2DDM2, _2DDMAC_2DDM1, _2DDMAC_2DDM0,
- BEM, ASA, PEP, ICB } },
- { 0xffd20190, 0xffd201d0, 8, /* IMR4SA / IMCR4SA */
- { 0, 0, MVI3, 0,
- JPEG, HQE, 0, LCDC } },
- { 0xffd20194, 0xffd201d4, 8, /* IMR5SA / IMCR5SA */
- { 0, RTDMAC_2_DADERR, RTDMAC_2_DEI5, RTDMAC_2_DEI4,
- RTDMAC_1_DEI3, RTDMAC_1_DEI2, RTDMAC_1_DEI1, RTDMAC_1_DEI0 } },
- { 0xffd20198, 0xffd201d8, 8, /* IMR6SA / IMCR6SA */
- { 0, 0, MSIOF, 0,
- SGX530, 0, 0, 0 } },
- { 0xffd2019c, 0xffd201dc, 8, /* IMR7SA / IMCR7SA */
- { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0,
- 0, 0, 0, 0 } },
- { 0xffd201a4, 0xffd201e4, 8, /* IMR9SA / IMCR9SA */
- { 0, 0, 0, CMT,
- IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } },
- { 0xffd201a8, 0xffd201e8, 8, /* IMR10SA / IMCR10SA */
- { IPMMU_IPMMUS, 0, IPMMU_IPMMUB, 0,
- 0, 0, 0, 0 } },
- { 0xffd201ac, 0xffd201ec, 8, /* IMR11SA / IMCR11SA */
- { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0,
- 0, 0, IPMMUI, TSIF } },
- { 0xffd20104, 0, 16, /* INTAMASK */
- { 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, INTCS } },
-};
-
-/* Priority is needed for INTCA to receive the INTCS interrupt */
-static struct intc_prio_reg intcs_prio_registers[] = {
- { 0xffd20000, 0, 16, 4, /* IPRAS */ { 0, MVI3, _2DDMAC, ICB } },
- { 0xffd20004, 0, 16, 4, /* IPRBS */ { JPEG, LCDC, 0, 0 } },
- { 0xffd20008, 0, 16, 4, /* IPRCS */ { BBIF2, 0, 0, 0 } },
- { 0xffd20010, 0, 16, 4, /* IPRES */ { RTDMAC_1, VIO1_CEU, 0, VPU } },
- { 0xffd20014, 0, 16, 4, /* IPRFS */ { 0, RTDMAC_2, 0, CMT } },
- { 0xffd20018, 0, 16, 4, /* IPRGS */ { TMU_TUNI0, TMU_TUNI1,
- TMU_TUNI2, 0 } },
- { 0xffd2001c, 0, 16, 4, /* IPRHS */ { 0, VIO3_VOU, VEU, BEU } },
- { 0xffd20020, 0, 16, 4, /* IPRIS */ { 0, MSIOF, TSIF, IIC0 } },
- { 0xffd20024, 0, 16, 4, /* IPRJS */ { 0, SGX530, 0, 0 } },
- { 0xffd20028, 0, 16, 4, /* IPRKS */ { BEM, ASA, IPMMUI, PEP } },
- { 0xffd2002c, 0, 16, 4, /* IPRLS */ { IPMMU, 0, VE2HO, HQE } },
- { 0xffd20030, 0, 16, 4, /* IPRMS */ { IIC2, 0, 0, 0 } },
-};
-
-static struct resource intcs_resources[] __initdata = {
- [0] = {
- .start = 0xffd20000,
- .end = 0xffd2ffff,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct intc_desc intcs_desc __initdata = {
- .name = "sh7367-intcs",
- .resource = intcs_resources,
- .num_resources = ARRAY_SIZE(intcs_resources),
- .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers,
- intcs_prio_registers, NULL, NULL),
-};
-
-static void intcs_demux(unsigned int irq, struct irq_desc *desc)
-{
- void __iomem *reg = (void *)irq_get_handler_data(irq);
- unsigned int evtcodeas = ioread32(reg);
-
- generic_handle_irq(intcs_evt2irq(evtcodeas));
-}
-
-void __init sh7367_init_irq(void)
-{
- void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
-
- register_intc_controller(&intca_desc);
- register_intc_controller(&intca_irq_pins_desc);
- register_intc_controller(&intcs_desc);
-
- /* demux using INTEVTSA */
- irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa);
- irq_set_chained_handler(evt2irq(0xf80), intcs_demux);
-}
diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c
deleted file mode 100644
index b84a460..0000000
--- a/arch/arm/mach-shmobile/intc-sh7377.c
+++ /dev/null
@@ -1,592 +0,0 @@
-/*
- * sh7377 processor support - INTC hardware block
- *
- * Copyright (C) 2010 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/sh_intc.h>
-#include <mach/intc.h>
-#include <mach/irqs.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-enum {
- UNUSED_INTCA = 0,
- ENABLED,
- DISABLED,
-
- /* interrupt sources INTCA */
- DIRC,
- _2DG,
- CRYPT_STD,
- IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1,
- AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX,
- MFI_MFIM, MFI_MFIS,
- BBIF1, BBIF2,
- USBDMAC_USHDMI,
- USBHS_USHI0, USBHS_USHI1,
- _3DG_SGX540,
- CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3,
- KEYSC_KEY,
- SCIFA0, SCIFA1, SCIFA2, SCIFA3,
- MSIOF2, MSIOF1,
- SCIFA4, SCIFA5, SCIFB,
- FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
- SDHI0,
- SDHI1,
- MSU_MSU, MSU_MSU2,
- IRREM,
- MSUG,
- IRDA,
- TPU0, TPU1, TPU2, TPU3, TPU4,
- LCRC,
- PINTCA_PINT1, PINTCA_PINT2,
- TTI20,
- MISTY,
- DDM,
- RWDT0, RWDT1,
- DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3,
- DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR,
- DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3,
- DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR,
- DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
- DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
- SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM,
- ICUSB_ICUSB0, ICUSB_ICUSB1,
- ICUDMC_ICUDMC1, ICUDMC_ICUDMC2,
- SPU2_SPU0, SPU2_SPU1,
- FSI,
- FMSI,
- SCUV,
- IPMMU_IPMMUB,
- AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ, AP_ARM_DMAIRQ, AP_ARM_DMASIRQ,
- MFIS2,
- CPORTR2S,
- CMT14, CMT15,
- SCIFA6,
-
- /* interrupt groups INTCA */
- DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT,
- AP_ARM1, AP_ARM2, USBHS, SPU2, FLCTL, IIC1,
- ICUSB, ICUDMC
-};
-
-static struct intc_vect intca_vectors[] __initdata = {
- INTC_VECT(DIRC, 0x0560),
- INTC_VECT(_2DG, 0x05e0),
- INTC_VECT(CRYPT_STD, 0x0700),
- INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0),
- INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0),
- INTC_VECT(AP_ARM_IRQPMU, 0x0800), INTC_VECT(AP_ARM_COMMTX, 0x0840),
- INTC_VECT(AP_ARM_COMMRX, 0x0860),
- INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920),
- INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960),
- INTC_VECT(USBDMAC_USHDMI, 0x0a00),
- INTC_VECT(USBHS_USHI0, 0x0a20), INTC_VECT(USBHS_USHI1, 0x0a40),
- INTC_VECT(_3DG_SGX540, 0x0a60),
- INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20),
- INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60),
- INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0),
- INTC_VECT(KEYSC_KEY, 0x0be0),
- INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20),
- INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60),
- INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00),
- INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40),
- INTC_VECT(SCIFB, 0x0d60),
- INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
- INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
- INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20),
- INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60),
- INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0),
- INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0),
- INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40),
- INTC_VECT(IRREM, 0x0f60),
- INTC_VECT(MSUG, 0x0fa0),
- INTC_VECT(IRDA, 0x0480),
- INTC_VECT(TPU0, 0x04a0), INTC_VECT(TPU1, 0x04c0),
- INTC_VECT(TPU2, 0x04e0), INTC_VECT(TPU3, 0x0500),
- INTC_VECT(TPU4, 0x0520),
- INTC_VECT(LCRC, 0x0540),
- INTC_VECT(PINTCA_PINT1, 0x1000), INTC_VECT(PINTCA_PINT2, 0x1020),
- INTC_VECT(TTI20, 0x1100),
- INTC_VECT(MISTY, 0x1120),
- INTC_VECT(DDM, 0x1140),
- INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0),
- INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020),
- INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060),
- INTC_VECT(DMAC_2_DEI4, 0x2080), INTC_VECT(DMAC_2_DEI5, 0x20a0),
- INTC_VECT(DMAC_2_DADERR, 0x20c0),
- INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120),
- INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160),
- INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0),
- INTC_VECT(DMAC2_2_DADERR, 0x21c0),
- INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220),
- INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260),
- INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0),
- INTC_VECT(DMAC3_2_DADERR, 0x22c0),
- INTC_VECT(SHWYSTAT_RT, 0x1300), INTC_VECT(SHWYSTAT_HS, 0x1d20),
- INTC_VECT(SHWYSTAT_COM, 0x1340),
- INTC_VECT(ICUSB_ICUSB0, 0x1700), INTC_VECT(ICUSB_ICUSB1, 0x1720),
- INTC_VECT(ICUDMC_ICUDMC1, 0x1780), INTC_VECT(ICUDMC_ICUDMC2, 0x17a0),
- INTC_VECT(SPU2_SPU0, 0x1800), INTC_VECT(SPU2_SPU1, 0x1820),
- INTC_VECT(FSI, 0x1840),
- INTC_VECT(FMSI, 0x1860),
- INTC_VECT(SCUV, 0x1880),
- INTC_VECT(IPMMU_IPMMUB, 0x1900),
- INTC_VECT(AP_ARM_CTIIRQ, 0x1980),
- INTC_VECT(AP_ARM_DMAEXTERRIRQ, 0x19a0),
- INTC_VECT(AP_ARM_DMAIRQ, 0x19c0),
- INTC_VECT(AP_ARM_DMASIRQ, 0x19e0),
- INTC_VECT(MFIS2, 0x1a00),
- INTC_VECT(CPORTR2S, 0x1a20),
- INTC_VECT(CMT14, 0x1a40), INTC_VECT(CMT15, 0x1a60),
- INTC_VECT(SCIFA6, 0x1a80),
-};
-
-static struct intc_group intca_groups[] __initdata = {
- INTC_GROUP(DMAC_1, DMAC_1_DEI0,
- DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3),
- INTC_GROUP(DMAC_2, DMAC_2_DEI4,
- DMAC_2_DEI5, DMAC_2_DADERR),
- INTC_GROUP(DMAC2_1, DMAC2_1_DEI0,
- DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3),
- INTC_GROUP(DMAC2_2, DMAC2_2_DEI4,
- DMAC2_2_DEI5, DMAC2_2_DADERR),
- INTC_GROUP(DMAC3_1, DMAC3_1_DEI0,
- DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3),
- INTC_GROUP(DMAC3_2, DMAC3_2_DEI4,
- DMAC3_2_DEI5, DMAC3_2_DADERR),
- INTC_GROUP(AP_ARM1, AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMTX),
- INTC_GROUP(USBHS, USBHS_USHI0, USBHS_USHI1),
- INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1),
- INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
- FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
- INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
- INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM),
- INTC_GROUP(ICUSB, ICUSB_ICUSB0, ICUSB_ICUSB1),
- INTC_GROUP(ICUDMC, ICUDMC_ICUDMC1, ICUDMC_ICUDMC2),
-};
-
-static struct intc_mask_reg intca_mask_registers[] __initdata = {
- { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */
- { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0,
- AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } },
- { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */
- { _2DG, CRYPT_STD, DIRC, 0,
- DMAC_1_DEI3, DMAC_1_DEI2, DMAC_1_DEI1, DMAC_1_DEI0 } },
- { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */
- { PINTCA_PINT1, PINTCA_PINT2, 0, 0,
- BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } },
- { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */
- { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0,
- DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } },
- { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */
- { DDM, 0, 0, 0,
- 0, 0, 0, 0 } },
- { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
- { KEYSC_KEY, DMAC_2_DADERR, DMAC_2_DEI5, DMAC_2_DEI4,
- SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
- { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
- { SCIFB, SCIFA5, SCIFA4, MSIOF1,
- 0, 0, MSIOF2, 0 } },
- { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
- { DISABLED, ENABLED, ENABLED, ENABLED,
- FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
- { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
- { DISABLED, ENABLED, ENABLED, ENABLED,
- TTI20, USBDMAC_USHDMI, 0, MSUG } },
- { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
- { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
- CMT2, USBHS_USHI1, USBHS_USHI0, _3DG_SGX540 } },
- { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */
- { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4,
- 0, 0, 0, 0 } },
- { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */
- { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1,
- LCRC, MSU_MSU2, IRREM, MSU_MSU } },
- { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */
- { 0, 0, TPU0, TPU1,
- TPU2, TPU3, TPU4, 0 } },
- { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
- { 0, 0, 0, 0,
- MISTY, CMT3, RWDT1, RWDT0 } },
- { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */
- { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0,
- 0, 0, 0, 0 } },
- { 0xe6950090, 0xe69500d0, 8, /* IMR4A3 / IMCR4A3 */
- { ICUSB_ICUSB0, ICUSB_ICUSB1, 0, 0,
- ICUDMC_ICUDMC1, ICUDMC_ICUDMC2, 0, 0 } },
- { 0xe6950094, 0xe69500d4, 8, /* IMR5A3 / IMCR5A3 */
- { SPU2_SPU0, SPU2_SPU1, FSI, FMSI,
- SCUV, 0, 0, 0 } },
- { 0xe6950098, 0xe69500d8, 8, /* IMR6A3 / IMCR6A3 */
- { IPMMU_IPMMUB, 0, 0, 0,
- AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
- AP_ARM_DMAIRQ, AP_ARM_DMASIRQ } },
- { 0xe695009c, 0xe69500dc, 8, /* IMR7A3 / IMCR7A3 */
- { MFIS2, CPORTR2S, CMT14, CMT15,
- SCIFA6, 0, 0, 0 } },
-};
-
-static struct intc_prio_reg intca_prio_registers[] __initdata = {
- { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } },
- { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } },
- { 0xe6940008, 0, 16, 4, /* IPRCA */ { _2DG, CRYPT_STD,
- CMT1_CMT11, AP_ARM1 } },
- { 0xe694000c, 0, 16, 4, /* IPRDA */ { PINTCA_PINT1, PINTCA_PINT2,
- CMT1_CMT12, TPU4 } },
- { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC_1, MFI_MFIS,
- MFI_MFIM, USBHS } },
- { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC_2,
- _3DG_SGX540, CMT1_CMT10 } },
- { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
- SCIFA2, SCIFA3 } },
- { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBDMAC_USHDMI,
- FLCTL, SDHI0 } },
- { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4, MSU_MSU, IIC1 } },
- { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2, MSUG, TTI20 } },
- { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IRREM, SDHI1 } },
- { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, TPU1, TPU2, TPU3 } },
- { 0xe6940030, 0, 16, 4, /* IPRMA */ { MISTY, CMT3, RWDT1, RWDT0 } },
- { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, DDM } },
- { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, 0 } },
- { 0xe6950000, 0, 16, 4, /* IPRAA3 */ { SHWYSTAT, 0, 0, 0 } },
- { 0xe6950020, 0, 16, 4, /* IPRIA3 */ { ICUSB, 0, 0, 0 } },
- { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { ICUDMC, 0, 0, 0 } },
- { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } },
- { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { SCUV, 0, 0, 0 } },
- { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU_IPMMUB, 0, 0, 0 } },
- { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } },
- { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S,
- CMT14, CMT15 } },
- { 0xe694003c, 0, 16, 4, /* IPRPA3 */ { SCIFA6, 0, 0, 0 } },
-};
-
-static struct intc_desc intca_desc __initdata = {
- .name = "sh7377-intca",
- .force_enable = ENABLED,
- .force_disable = DISABLED,
- .hw = INTC_HW_DESC(intca_vectors, intca_groups,
- intca_mask_registers, intca_prio_registers,
- NULL, NULL),
-};
-
-INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000,
- INTC_VECT, "sh7377-intca-irq-pins");
-
-/* this macro ignore entry which is also in INTCA */
-#define __IGNORE(a...)
-#define __IGNORE0(a...) 0
-
-enum {
- UNUSED_INTCS = 0,
-
- INTCS,
-
- /* interrupt sources INTCS */
- VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3,
- RTDMAC1_1_DEI0, RTDMAC1_1_DEI1, RTDMAC1_1_DEI2, RTDMAC1_1_DEI3,
- CEU,
- BEU_BEU0, BEU_BEU1, BEU_BEU2,
- __IGNORE(MFI)
- __IGNORE(BBIF2)
- VPU,
- TSIF1,
- __IGNORE(SGX540)
- _2DDMAC,
- IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2,
- IPMMU_IPMMUR, IPMMU_IPMMUR2,
- RTDMAC1_2_DEI4, RTDMAC1_2_DEI5, RTDMAC1_2_DADERR,
- __IGNORE(KEYSC)
- __IGNORE(TTI20)
- __IGNORE(MSIOF)
- IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0,
- TMU_TUNI0, TMU_TUNI1, TMU_TUNI2,
- CMT0,
- TSIF0,
- __IGNORE(CMT2)
- LMB,
- __IGNORE(MSUG)
- __IGNORE(MSU_MSU, MSU_MSU2)
- __IGNORE(CTI)
- MVI3,
- __IGNORE(RWDT0)
- __IGNORE(RWDT1)
- ICB,
- PEP,
- ASA,
- __IGNORE(_2DG)
- HQE,
- JPU,
- LCDC0,
- __IGNORE(LCRC)
- RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3,
- RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR,
- FRC,
- LCDC1,
- CSIRX,
- DSITX_DSITX0, DSITX_DSITX1,
- __IGNORE(SPU2_SPU0, SPU2_SPU1)
- __IGNORE(FSI)
- __IGNORE(FMSI)
- __IGNORE(SCUV)
- TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12,
- TSIF2,
- CMT4,
- __IGNORE(MFIS2)
- CPORTS2R,
-
- /* interrupt groups INTCS */
- RTDMAC1_1, RTDMAC1_2, VEU, BEU, IIC0, __IGNORE(MSU) IPMMU,
- IIC2, RTDMAC2_1, RTDMAC2_2, DSITX, __IGNORE(SPU2) TMU1,
-};
-
-#define INTCS_INTVECT 0x0F80
-static struct intc_vect intcs_vectors[] __initdata = {
- INTCS_VECT(VEU_VEU0, 0x0700), INTCS_VECT(VEU_VEU1, 0x0720),
- INTCS_VECT(VEU_VEU2, 0x0740), INTCS_VECT(VEU_VEU3, 0x0760),
- INTCS_VECT(RTDMAC1_1_DEI0, 0x0800), INTCS_VECT(RTDMAC1_1_DEI1, 0x0820),
- INTCS_VECT(RTDMAC1_1_DEI2, 0x0840), INTCS_VECT(RTDMAC1_1_DEI3, 0x0860),
- INTCS_VECT(CEU, 0x0880),
- INTCS_VECT(BEU_BEU0, 0x08A0),
- INTCS_VECT(BEU_BEU1, 0x08C0),
- INTCS_VECT(BEU_BEU2, 0x08E0),
- __IGNORE(INTCS_VECT(MFI, 0x0900))
- __IGNORE(INTCS_VECT(BBIF2, 0x0960))
- INTCS_VECT(VPU, 0x0980),
- INTCS_VECT(TSIF1, 0x09A0),
- __IGNORE(INTCS_VECT(SGX540, 0x09E0))
- INTCS_VECT(_2DDMAC, 0x0A00),
- INTCS_VECT(IIC2_ALI2, 0x0A80), INTCS_VECT(IIC2_TACKI2, 0x0AA0),
- INTCS_VECT(IIC2_WAITI2, 0x0AC0), INTCS_VECT(IIC2_DTEI2, 0x0AE0),
- INTCS_VECT(IPMMU_IPMMUR, 0x0B00), INTCS_VECT(IPMMU_IPMMUR2, 0x0B20),
- INTCS_VECT(RTDMAC1_2_DEI4, 0x0B80),
- INTCS_VECT(RTDMAC1_2_DEI5, 0x0BA0),
- INTCS_VECT(RTDMAC1_2_DADERR, 0x0BC0),
- __IGNORE(INTCS_VECT(KEYSC 0x0BE0))
- __IGNORE(INTCS_VECT(TTI20, 0x0C80))
- __IGNORE(INTCS_VECT(MSIOF, 0x0D20))
- INTCS_VECT(IIC0_ALI0, 0x0E00), INTCS_VECT(IIC0_TACKI0, 0x0E20),
- INTCS_VECT(IIC0_WAITI0, 0x0E40), INTCS_VECT(IIC0_DTEI0, 0x0E60),
- INTCS_VECT(TMU_TUNI0, 0x0E80),
- INTCS_VECT(TMU_TUNI1, 0x0EA0),
- INTCS_VECT(TMU_TUNI2, 0x0EC0),
- INTCS_VECT(CMT0, 0x0F00),
- INTCS_VECT(TSIF0, 0x0F20),
- __IGNORE(INTCS_VECT(CMT2, 0x0F40))
- INTCS_VECT(LMB, 0x0F60),
- __IGNORE(INTCS_VECT(MSUG, 0x0F80))
- __IGNORE(INTCS_VECT(MSU_MSU, 0x0FA0))
- __IGNORE(INTCS_VECT(MSU_MSU2, 0x0FC0))
- __IGNORE(INTCS_VECT(CTI, 0x0400))
- INTCS_VECT(MVI3, 0x0420),
- __IGNORE(INTCS_VECT(RWDT0, 0x0440))
- __IGNORE(INTCS_VECT(RWDT1, 0x0460))
- INTCS_VECT(ICB, 0x0480),
- INTCS_VECT(PEP, 0x04A0),
- INTCS_VECT(ASA, 0x04C0),
- __IGNORE(INTCS_VECT(_2DG, 0x04E0))
- INTCS_VECT(HQE, 0x0540),
- INTCS_VECT(JPU, 0x0560),
- INTCS_VECT(LCDC0, 0x0580),
- __IGNORE(INTCS_VECT(LCRC, 0x05A0))
- INTCS_VECT(RTDMAC2_1_DEI0, 0x1300), INTCS_VECT(RTDMAC2_1_DEI1, 0x1320),
- INTCS_VECT(RTDMAC2_1_DEI2, 0x1340), INTCS_VECT(RTDMAC2_1_DEI3, 0x1360),
- INTCS_VECT(RTDMAC2_2_DEI4, 0x1380), INTCS_VECT(RTDMAC2_2_DEI5, 0x13A0),
- INTCS_VECT(RTDMAC2_2_DADERR, 0x13C0),
- INTCS_VECT(FRC, 0x1700),
- INTCS_VECT(LCDC1, 0x1780),
- INTCS_VECT(CSIRX, 0x17A0),
- INTCS_VECT(DSITX_DSITX0, 0x17C0), INTCS_VECT(DSITX_DSITX1, 0x17E0),
- __IGNORE(INTCS_VECT(SPU2_SPU0, 0x1800))
- __IGNORE(INTCS_VECT(SPU2_SPU1, 0x1820))
- __IGNORE(INTCS_VECT(FSI, 0x1840))
- __IGNORE(INTCS_VECT(FMSI, 0x1860))
- __IGNORE(INTCS_VECT(SCUV, 0x1880))
- INTCS_VECT(TMU1_TUNI10, 0x1900), INTCS_VECT(TMU1_TUNI11, 0x1920),
- INTCS_VECT(TMU1_TUNI12, 0x1940),
- INTCS_VECT(TSIF2, 0x1960),
- INTCS_VECT(CMT4, 0x1980),
- __IGNORE(INTCS_VECT(MFIS2, 0x1A00))
- INTCS_VECT(CPORTS2R, 0x1A20),
-
- INTC_VECT(INTCS, INTCS_INTVECT),
-};
-
-static struct intc_group intcs_groups[] __initdata = {
- INTC_GROUP(RTDMAC1_1,
- RTDMAC1_1_DEI0, RTDMAC1_1_DEI1,
- RTDMAC1_1_DEI2, RTDMAC1_1_DEI3),
- INTC_GROUP(RTDMAC1_2,
- RTDMAC1_2_DEI4, RTDMAC1_2_DEI5, RTDMAC1_2_DADERR),
- INTC_GROUP(VEU, VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3),
- INTC_GROUP(BEU, BEU_BEU0, BEU_BEU1, BEU_BEU2),
- INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0),
- __IGNORE(INTC_GROUP(MSU, MSU_MSU, MSU_MSU2))
- INTC_GROUP(IPMMU, IPMMU_IPMMUR, IPMMU_IPMMUR2),
- INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2),
- INTC_GROUP(RTDMAC2_1,
- RTDMAC2_1_DEI0, RTDMAC2_1_DEI1,
- RTDMAC2_1_DEI2, RTDMAC2_1_DEI3),
- INTC_GROUP(RTDMAC2_2, RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR),
- INTC_GROUP(DSITX, DSITX_DSITX0, DSITX_DSITX1),
- __IGNORE(INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1))
- INTC_GROUP(TMU1, TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12),
-};
-
-static struct intc_mask_reg intcs_mask_registers[] __initdata = {
- { 0xE6940184, 0xE69401C4, 8, /* IMR1AS / IMCR1AS */
- { BEU_BEU2, BEU_BEU1, BEU_BEU0, CEU,
- VEU_VEU3, VEU_VEU2, VEU_VEU1, VEU_VEU0 } },
- { 0xE6940188, 0xE69401C8, 8, /* IMR2AS / IMCR2AS */
- { 0, 0, 0, VPU,
- __IGNORE0(BBIF2), 0, 0, __IGNORE0(MFI) } },
- { 0xE694018C, 0xE69401CC, 8, /* IMR3AS / IMCR3AS */
- { 0, 0, 0, _2DDMAC,
- __IGNORE0(_2DG), ASA, PEP, ICB } },
- { 0xE6940190, 0xE69401D0, 8, /* IMR4AS / IMCR4AS */
- { 0, 0, MVI3, __IGNORE0(CTI),
- JPU, HQE, __IGNORE0(LCRC), LCDC0 } },
- { 0xE6940194, 0xE69401D4, 8, /* IMR5AS / IMCR5AS */
- { __IGNORE0(KEYSC), RTDMAC1_2_DADERR, RTDMAC1_2_DEI5, RTDMAC1_2_DEI4,
- RTDMAC1_1_DEI3, RTDMAC1_1_DEI2, RTDMAC1_1_DEI1, RTDMAC1_1_DEI0 } },
- __IGNORE({ 0xE6940198, 0xE69401D8, 8, /* IMR6AS / IMCR6AS */
- { 0, 0, MSIOF, 0,
- SGX540, 0, TTI20, 0 } })
- { 0xE694019C, 0xE69401DC, 8, /* IMR7AS / IMCR7AS */
- { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0,
- 0, 0, 0, 0 } },
- __IGNORE({ 0xE69401A0, 0xE69401E0, 8, /* IMR8AS / IMCR8AS */
- { 0, 0, 0, 0,
- 0, MSU_MSU, MSU_MSU2, MSUG } })
- { 0xE69401A4, 0xE69401E4, 8, /* IMR9AS / IMCR9AS */
- { __IGNORE0(RWDT1), __IGNORE0(RWDT0), __IGNORE0(CMT2), CMT0,
- IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } },
- { 0xE69401A8, 0xE69401E8, 8, /* IMR10AS / IMCR10AS */
- { 0, 0, IPMMU_IPMMUR, IPMMU_IPMMUR2,
- 0, 0, 0, 0 } },
- { 0xE69401AC, 0xE69401EC, 8, /* IMR11AS / IMCR11AS */
- { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0,
- 0, TSIF1, LMB, TSIF0 } },
- { 0xE6950180, 0xE69501C0, 8, /* IMR0AS3 / IMCR0AS3 */
- { RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3,
- RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR, 0 } },
- { 0xE6950190, 0xE69501D0, 8, /* IMR4AS3 / IMCR4AS3 */
- { FRC, 0, 0, 0,
- LCDC1, CSIRX, DSITX_DSITX0, DSITX_DSITX1 } },
- __IGNORE({ 0xE6950194, 0xE69501D4, 8, /* IMR5AS3 / IMCR5AS3 */
- {SPU2_SPU0, SPU2_SPU1, FSI, FMSI,
- SCUV, 0, 0, 0 } })
- { 0xE6950198, 0xE69501D8, 8, /* IMR6AS3 / IMCR6AS3 */
- { TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12, TSIF2,
- CMT4, 0, 0, 0 } },
- { 0xE695019C, 0xE69501DC, 8, /* IMR7AS3 / IMCR7AS3 */
- { __IGNORE0(MFIS2), CPORTS2R, 0, 0,
- 0, 0, 0, 0 } },
- { 0xFFD20104, 0, 16, /* INTAMASK */
- { 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, INTCS } }
-};
-
-static struct intc_prio_reg intcs_prio_registers[] __initdata = {
- /* IPRAS */
- { 0xFFD20000, 0, 16, 4, { __IGNORE0(CTI), MVI3, _2DDMAC, ICB } },
- /* IPRBS */
- { 0xFFD20004, 0, 16, 4, { JPU, LCDC0, 0, __IGNORE0(LCRC) } },
- /* IPRCS */
- __IGNORE({ 0xFFD20008, 0, 16, 4, { BBIF2, 0, 0, 0 } })
- /* IPRES */
- { 0xFFD20010, 0, 16, 4, { RTDMAC1_1, CEU, __IGNORE0(MFI), VPU } },
- /* IPRFS */
- { 0xFFD20014, 0, 16, 4,
- { __IGNORE0(KEYSC), RTDMAC1_2, __IGNORE0(CMT2), CMT0 } },
- /* IPRGS */
- { 0xFFD20018, 0, 16, 4, { TMU_TUNI0, TMU_TUNI1, TMU_TUNI2, TSIF1 } },
- /* IPRHS */
- { 0xFFD2001C, 0, 16, 4, { __IGNORE0(TTI20), 0, VEU, BEU } },
- /* IPRIS */
- { 0xFFD20020, 0, 16, 4, { 0, __IGNORE0(MSIOF), TSIF0, IIC0 } },
- /* IPRJS */
- __IGNORE({ 0xFFD20024, 0, 16, 4, { 0, SGX540, MSUG, MSU } })
- /* IPRKS */
- { 0xFFD20028, 0, 16, 4, { __IGNORE0(_2DG), ASA, LMB, PEP } },
- /* IPRLS */
- { 0xFFD2002C, 0, 16, 4, { IPMMU, 0, 0, HQE } },
- /* IPRMS */
- { 0xFFD20030, 0, 16, 4,
- { IIC2, 0, __IGNORE0(RWDT1), __IGNORE0(RWDT0) } },
- /* IPRAS3 */
- { 0xFFD50000, 0, 16, 4, { RTDMAC2_1, 0, 0, 0 } },
- /* IPRBS3 */
- { 0xFFD50004, 0, 16, 4, { RTDMAC2_2, 0, 0, 0 } },
- /* IPRIS3 */
- { 0xFFD50020, 0, 16, 4, { FRC, 0, 0, 0 } },
- /* IPRJS3 */
- { 0xFFD50024, 0, 16, 4, { LCDC1, CSIRX, DSITX, 0 } },
- /* IPRKS3 */
- __IGNORE({ 0xFFD50028, 0, 16, 4, { SPU2, 0, FSI, FMSI } })
- /* IPRLS3 */
- __IGNORE({ 0xFFD5002C, 0, 16, 4, { SCUV, 0, 0, 0 } })
- /* IPRMS3 */
- { 0xFFD50030, 0, 16, 4, { TMU1, 0, 0, TSIF2 } },
- /* IPRNS3 */
- { 0xFFD50034, 0, 16, 4, { CMT4, 0, 0, 0 } },
- /* IPROS3 */
- { 0xFFD50038, 0, 16, 4, { __IGNORE0(MFIS2), CPORTS2R, 0, 0 } },
-};
-
-static struct resource intcs_resources[] __initdata = {
- [0] = {
- .start = 0xffd20000,
- .end = 0xffd500ff,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct intc_desc intcs_desc __initdata = {
- .name = "sh7377-intcs",
- .resource = intcs_resources,
- .num_resources = ARRAY_SIZE(intcs_resources),
- .hw = INTC_HW_DESC(intcs_vectors, intcs_groups,
- intcs_mask_registers, intcs_prio_registers,
- NULL, NULL),
-};
-
-static void intcs_demux(unsigned int irq, struct irq_desc *desc)
-{
- void __iomem *reg = (void *)irq_get_handler_data(irq);
- unsigned int evtcodeas = ioread32(reg);
-
- generic_handle_irq(intcs_evt2irq(evtcodeas));
-}
-
-#define INTEVTSA 0xFFD20100
-void __init sh7377_init_irq(void)
-{
- void __iomem *intevtsa = ioremap_nocache(INTEVTSA, PAGE_SIZE);
-
- register_intc_controller(&intca_desc);
- register_intc_controller(&intca_irq_pins_desc);
- register_intc_controller(&intcs_desc);
-
- /* demux using INTEVTSA */
- irq_set_handler_data(evt2irq(INTCS_INTVECT), (void *)intevtsa);
- irq_set_chained_handler(evt2irq(INTCS_INTVECT), intcs_demux);
-}
diff --git a/arch/arm/mach-shmobile/pfc-r8a7779.c b/arch/arm/mach-shmobile/pfc-r8a7779.c
index cbc26ba..9513234 100644
--- a/arch/arm/mach-shmobile/pfc-r8a7779.c
+++ b/arch/arm/mach-shmobile/pfc-r8a7779.c
@@ -140,7 +140,7 @@
FN_IP7_3_2, FN_IP7_6_4, FN_IP7_9_7, FN_IP7_12_10,
FN_IP7_14_13, FN_IP2_7_4, FN_IP2_11_8, FN_IP2_15_12,
FN_IP1_28_25, FN_IP2_3_0, FN_IP8_3_0, FN_IP8_7_4,
- FN_IP8_11_8, FN_IP8_15_12, FN_PENC0, FN_PENC1,
+ FN_IP8_11_8, FN_IP8_15_12, FN_USB_PENC0, FN_USB_PENC1,
FN_IP0_2_0, FN_IP8_17_16, FN_IP8_18, FN_IP8_19,
/* GPSR5 */
@@ -176,7 +176,7 @@
FN_A0, FN_SD1_DAT3, FN_MMC0_D3, FN_FD3,
FN_BS, FN_SD1_DAT2, FN_MMC0_D2, FN_FD2,
FN_ATADIR0, FN_SDSELF, FN_HCTS1, FN_TX4_C,
- FN_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0,
+ FN_USB_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0,
FN_SCIF_CLK, FN_TCLK0_C,
/* IPSR1 */
@@ -447,7 +447,7 @@
A0_MARK, SD1_DAT3_MARK, MMC0_D3_MARK, FD3_MARK,
BS_MARK, SD1_DAT2_MARK, MMC0_D2_MARK, FD2_MARK,
ATADIR0_MARK, SDSELF_MARK, HCTS1_MARK, TX4_C_MARK,
- PENC2_MARK, SCK0_MARK, PWM1_MARK, PWMFSW0_MARK,
+ USB_PENC2_MARK, SCK0_MARK, PWM1_MARK, PWMFSW0_MARK,
SCIF_CLK_MARK, TCLK0_C_MARK,
EX_CS0_MARK, RX3_C_IRDA_RX_C_MARK, MMC0_D6_MARK,
@@ -658,7 +658,7 @@
PINMUX_DATA(A18_MARK, FN_A18),
PINMUX_DATA(A19_MARK, FN_A19),
- PINMUX_IPSR_DATA(IP0_2_0, PENC2),
+ PINMUX_IPSR_DATA(IP0_2_0, USB_PENC2),
PINMUX_IPSR_MODSEL_DATA(IP0_2_0, SCK0, SEL_SCIF0_0),
PINMUX_IPSR_DATA(IP0_2_0, PWM1),
PINMUX_IPSR_MODSEL_DATA(IP0_2_0, PWMFSW0, SEL_PWMFSW_0),
@@ -1456,7 +1456,7 @@
GPIO_FN(A19),
/* IPSR0 */
- GPIO_FN(PENC2), GPIO_FN(SCK0), GPIO_FN(PWM1), GPIO_FN(PWMFSW0),
+ GPIO_FN(USB_PENC2), GPIO_FN(SCK0), GPIO_FN(PWM1), GPIO_FN(PWMFSW0),
GPIO_FN(SCIF_CLK), GPIO_FN(TCLK0_C), GPIO_FN(BS), GPIO_FN(SD1_DAT2),
GPIO_FN(MMC0_D2), GPIO_FN(FD2), GPIO_FN(ATADIR0), GPIO_FN(SDSELF),
GPIO_FN(HCTS1), GPIO_FN(TX4_C), GPIO_FN(A0), GPIO_FN(SD1_DAT3),
@@ -1865,8 +1865,8 @@
GP_4_30_FN, FN_IP8_18,
GP_4_29_FN, FN_IP8_17_16,
GP_4_28_FN, FN_IP0_2_0,
- GP_4_27_FN, FN_PENC1,
- GP_4_26_FN, FN_PENC0,
+ GP_4_27_FN, FN_USB_PENC1,
+ GP_4_26_FN, FN_USB_PENC0,
GP_4_25_FN, FN_IP8_15_12,
GP_4_24_FN, FN_IP8_11_8,
GP_4_23_FN, FN_IP8_7_4,
@@ -1981,7 +1981,7 @@
FN_BS, FN_SD1_DAT2, FN_MMC0_D2, FN_FD2,
FN_ATADIR0, FN_SDSELF, FN_HCTS1, FN_TX4_C,
/* IP0_2_0 [3] */
- FN_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0,
+ FN_USB_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0,
FN_SCIF_CLK, FN_TCLK0_C, 0, 0 }
},
{ PINMUX_CFG_REG_VAR("IPSR1", 0xfffc0024, 32,
diff --git a/arch/arm/mach-shmobile/pfc-sh7367.c b/arch/arm/mach-shmobile/pfc-sh7367.c
deleted file mode 100644
index c0c137f..0000000
--- a/arch/arm/mach-shmobile/pfc-sh7367.c
+++ /dev/null
@@ -1,1727 +0,0 @@
-/*
- * sh7367 processor support - PFC hardware block
- *
- * Copyright (C) 2010 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sh_pfc.h>
-#include <mach/sh7367.h>
-
-#define CPU_ALL_PORT(fn, pfx, sfx) \
- PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
- PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx), \
- PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
- PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
- PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
- PORT_10(fn, pfx##26, sfx), PORT_1(fn, pfx##270, sfx), \
- PORT_1(fn, pfx##271, sfx), PORT_1(fn, pfx##272, sfx)
-
-enum {
- PINMUX_RESERVED = 0,
-
- PINMUX_DATA_BEGIN,
- PORT_ALL(DATA), /* PORT0_DATA -> PORT272_DATA */
- PINMUX_DATA_END,
-
- PINMUX_INPUT_BEGIN,
- PORT_ALL(IN), /* PORT0_IN -> PORT272_IN */
- PINMUX_INPUT_END,
-
- PINMUX_INPUT_PULLUP_BEGIN,
- PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */
- PINMUX_INPUT_PULLUP_END,
-
- PINMUX_INPUT_PULLDOWN_BEGIN,
- PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */
- PINMUX_INPUT_PULLDOWN_END,
-
- PINMUX_OUTPUT_BEGIN,
- PORT_ALL(OUT), /* PORT0_OUT -> PORT272_OUT */
- PINMUX_OUTPUT_END,
-
- PINMUX_FUNCTION_BEGIN,
- PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */
- PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */
- PORT_ALL(FN0), /* PORT0_FN0 -> PORT272_FN0 */
- PORT_ALL(FN1), /* PORT0_FN1 -> PORT272_FN1 */
- PORT_ALL(FN2), /* PORT0_FN2 -> PORT272_FN2 */
- PORT_ALL(FN3), /* PORT0_FN3 -> PORT272_FN3 */
- PORT_ALL(FN4), /* PORT0_FN4 -> PORT272_FN4 */
- PORT_ALL(FN5), /* PORT0_FN5 -> PORT272_FN5 */
- PORT_ALL(FN6), /* PORT0_FN6 -> PORT272_FN6 */
- PORT_ALL(FN7), /* PORT0_FN7 -> PORT272_FN7 */
-
- MSELBCR_MSEL2_1, MSELBCR_MSEL2_0,
- PINMUX_FUNCTION_END,
-
- PINMUX_MARK_BEGIN,
- /* Special Pull-up / Pull-down Functions */
- PORT48_KEYIN0_PU_MARK, PORT49_KEYIN1_PU_MARK,
- PORT50_KEYIN2_PU_MARK, PORT55_KEYIN3_PU_MARK,
- PORT56_KEYIN4_PU_MARK, PORT57_KEYIN5_PU_MARK,
- PORT58_KEYIN6_PU_MARK,
-
- /* 49-1 */
- VBUS0_MARK, CPORT0_MARK, CPORT1_MARK, CPORT2_MARK,
- CPORT3_MARK, CPORT4_MARK, CPORT5_MARK, CPORT6_MARK,
- CPORT7_MARK, CPORT8_MARK, CPORT9_MARK, CPORT10_MARK,
- CPORT11_MARK, SIN2_MARK, CPORT12_MARK, XCTS2_MARK,
- CPORT13_MARK, RFSPO4_MARK, CPORT14_MARK, RFSPO5_MARK,
- CPORT15_MARK, CPORT16_MARK, CPORT17_MARK, SOUT2_MARK,
- CPORT18_MARK, XRTS2_MARK, CPORT19_MARK, CPORT20_MARK,
- RFSPO6_MARK, CPORT21_MARK, STATUS0_MARK, CPORT22_MARK,
- STATUS1_MARK, CPORT23_MARK, STATUS2_MARK, RFSPO7_MARK,
- MPORT0_MARK, MPORT1_MARK, B_SYNLD1_MARK, B_SYNLD2_MARK,
- XMAINPS_MARK, XDIVPS_MARK, XIDRST_MARK, IDCLK_MARK,
- IDIO_MARK, SOUT1_MARK, SCIFA4_TXD_MARK,
- M02_BERDAT_MARK, SIN1_MARK, SCIFA4_RXD_MARK, XWUP_MARK,
- XRTS1_MARK, SCIFA4_RTS_MARK, M03_BERCLK_MARK,
- XCTS1_MARK, SCIFA4_CTS_MARK,
-
- /* 49-2 */
- HSU_IQ_AGC6_MARK, MFG2_IN2_MARK, MSIOF2_MCK0_MARK,
- HSU_IQ_AGC5_MARK, MFG2_IN1_MARK, MSIOF2_MCK1_MARK,
- HSU_IQ_AGC4_MARK, MSIOF2_RSYNC_MARK,
- HSU_IQ_AGC3_MARK, MFG2_OUT1_MARK, MSIOF2_RSCK_MARK,
- HSU_IQ_AGC2_MARK, PORT42_KEYOUT0_MARK,
- HSU_IQ_AGC1_MARK, PORT43_KEYOUT1_MARK,
- HSU_IQ_AGC0_MARK, PORT44_KEYOUT2_MARK,
- HSU_IQ_AGC_ST_MARK, PORT45_KEYOUT3_MARK,
- HSU_IQ_PDO_MARK, PORT46_KEYOUT4_MARK,
- HSU_IQ_PYO_MARK, PORT47_KEYOUT5_MARK,
- HSU_EN_TXMUX_G3MO_MARK, PORT48_KEYIN0_MARK,
- HSU_I_TXMUX_G3MO_MARK, PORT49_KEYIN1_MARK,
- HSU_Q_TXMUX_G3MO_MARK, PORT50_KEYIN2_MARK,
- HSU_SYO_MARK, PORT51_MSIOF2_TSYNC_MARK,
- HSU_SDO_MARK, PORT52_MSIOF2_TSCK_MARK,
- HSU_TGTTI_G3MO_MARK, PORT53_MSIOF2_TXD_MARK,
- B_TIME_STAMP_MARK, PORT54_MSIOF2_RXD_MARK,
- HSU_SDI_MARK, PORT55_KEYIN3_MARK,
- HSU_SCO_MARK, PORT56_KEYIN4_MARK,
- HSU_DREQ_MARK, PORT57_KEYIN5_MARK,
- HSU_DACK_MARK, PORT58_KEYIN6_MARK,
- HSU_CLK61M_MARK, PORT59_MSIOF2_SS1_MARK,
- HSU_XRST_MARK, PORT60_MSIOF2_SS2_MARK,
- PCMCLKO_MARK, SYNC8KO_MARK, DNPCM_A_MARK, UPPCM_A_MARK,
- XTALB1L_MARK,
- GPS_AGC1_MARK, SCIFA0_RTS_MARK,
- GPS_AGC2_MARK, SCIFA0_SCK_MARK,
- GPS_AGC3_MARK, SCIFA0_TXD_MARK,
- GPS_AGC4_MARK, SCIFA0_RXD_MARK,
- GPS_PWRD_MARK, SCIFA0_CTS_MARK,
- GPS_IM_MARK, GPS_IS_MARK, GPS_QM_MARK, GPS_QS_MARK,
- SIUBOMC_MARK, TPU2TO0_MARK,
- SIUCKB_MARK, TPU2TO1_MARK,
- SIUBOLR_MARK, BBIF2_TSYNC_MARK, TPU2TO2_MARK,
- SIUBOBT_MARK, BBIF2_TSCK_MARK, TPU2TO3_MARK,
- SIUBOSLD_MARK, BBIF2_TXD_MARK, TPU3TO0_MARK,
- SIUBILR_MARK, TPU3TO1_MARK,
- SIUBIBT_MARK, TPU3TO2_MARK,
- SIUBISLD_MARK, TPU3TO3_MARK,
- NMI_MARK, TPU4TO0_MARK,
- DNPCM_M_MARK, TPU4TO1_MARK, TPU4TO2_MARK, TPU4TO3_MARK,
- IRQ_TMPB_MARK,
- PWEN_MARK, MFG1_OUT1_MARK,
- OVCN_MARK, MFG1_IN1_MARK,
- OVCN2_MARK, MFG1_IN2_MARK,
-
- /* 49-3 */
- RFSPO1_MARK, RFSPO2_MARK, RFSPO3_MARK, PORT93_VIO_CKO2_MARK,
- USBTERM_MARK, EXTLP_MARK, IDIN_MARK,
- SCIFA5_CTS_MARK, MFG0_IN1_MARK,
- SCIFA5_RTS_MARK, MFG0_IN2_MARK,
- SCIFA5_RXD_MARK,
- SCIFA5_TXD_MARK,
- SCIFA5_SCK_MARK, MFG0_OUT1_MARK,
- A0_EA0_MARK, BS_MARK,
- A14_EA14_MARK, PORT102_KEYOUT0_MARK,
- A15_EA15_MARK, PORT103_KEYOUT1_MARK, DV_CLKOL_MARK,
- A16_EA16_MARK, PORT104_KEYOUT2_MARK,
- DV_VSYNCL_MARK, MSIOF0_SS1_MARK,
- A17_EA17_MARK, PORT105_KEYOUT3_MARK,
- DV_HSYNCL_MARK, MSIOF0_TSYNC_MARK,
- A18_EA18_MARK, PORT106_KEYOUT4_MARK,
- DV_DL0_MARK, MSIOF0_TSCK_MARK,
- A19_EA19_MARK, PORT107_KEYOUT5_MARK,
- DV_DL1_MARK, MSIOF0_TXD_MARK,
- A20_EA20_MARK, PORT108_KEYIN0_MARK,
- DV_DL2_MARK, MSIOF0_RSCK_MARK,
- A21_EA21_MARK, PORT109_KEYIN1_MARK,
- DV_DL3_MARK, MSIOF0_RSYNC_MARK,
- A22_EA22_MARK, PORT110_KEYIN2_MARK,
- DV_DL4_MARK, MSIOF0_MCK0_MARK,
- A23_EA23_MARK, PORT111_KEYIN3_MARK,
- DV_DL5_MARK, MSIOF0_MCK1_MARK,
- A24_EA24_MARK, PORT112_KEYIN4_MARK,
- DV_DL6_MARK, MSIOF0_RXD_MARK,
- A25_EA25_MARK, PORT113_KEYIN5_MARK,
- DV_DL7_MARK, MSIOF0_SS2_MARK,
- A26_MARK, PORT113_KEYIN6_MARK, DV_CLKIL_MARK,
- D0_ED0_NAF0_MARK, D1_ED1_NAF1_MARK, D2_ED2_NAF2_MARK,
- D3_ED3_NAF3_MARK, D4_ED4_NAF4_MARK, D5_ED5_NAF5_MARK,
- D6_ED6_NAF6_MARK, D7_ED7_NAF7_MARK, D8_ED8_NAF8_MARK,
- D9_ED9_NAF9_MARK, D10_ED10_NAF10_MARK, D11_ED11_NAF11_MARK,
- D12_ED12_NAF12_MARK, D13_ED13_NAF13_MARK,
- D14_ED14_NAF14_MARK, D15_ED15_NAF15_MARK,
- CS4_MARK, CS5A_MARK, CS5B_MARK, FCE1_MARK,
- CS6B_MARK, XCS2_MARK, FCE0_MARK, CS6A_MARK,
- DACK0_MARK, WAIT_MARK, DREQ0_MARK, RD_XRD_MARK,
- A27_MARK, RDWR_XWE_MARK, WE0_XWR0_FWE_MARK,
- WE1_XWR1_MARK, FRB_MARK, CKO_MARK,
- NBRSTOUT_MARK, NBRST_MARK,
-
- /* 49-4 */
- RFSPO0_MARK, PORT146_VIO_CKO2_MARK, TSTMD_MARK,
- VIO_VD_MARK, VIO_HD_MARK,
- VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK,
- VIO_D3_MARK, VIO_D4_MARK, VIO_D5_MARK,
- VIO_D6_MARK, VIO_D7_MARK, VIO_D8_MARK,
- VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK,
- VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK,
- VIO_D15_MARK, VIO_CLK_MARK, VIO_FIELD_MARK,
- VIO_CKO_MARK,
- MFG3_IN1_MARK, MFG3_IN2_MARK,
- M9_SLCD_A01_MARK, MFG3_OUT1_MARK, TPU0TO0_MARK,
- M10_SLCD_CK1_MARK, MFG4_IN1_MARK, TPU0TO1_MARK,
- M11_SLCD_SO1_MARK, MFG4_IN2_MARK, TPU0TO2_MARK,
- M12_SLCD_CE1_MARK, MFG4_OUT1_MARK, TPU0TO3_MARK,
- LCDD0_MARK, PORT175_KEYOUT0_MARK, DV_D0_MARK,
- SIUCKA_MARK, MFG0_OUT2_MARK,
- LCDD1_MARK, PORT176_KEYOUT1_MARK, DV_D1_MARK,
- SIUAOLR_MARK, BBIF2_TSYNC1_MARK,
- LCDD2_MARK, PORT177_KEYOUT2_MARK, DV_D2_MARK,
- SIUAOBT_MARK, BBIF2_TSCK1_MARK,
- LCDD3_MARK, PORT178_KEYOUT3_MARK, DV_D3_MARK,
- SIUAOSLD_MARK, BBIF2_TXD1_MARK,
- LCDD4_MARK, PORT179_KEYOUT4_MARK, DV_D4_MARK,
- SIUAISPD_MARK, MFG1_OUT2_MARK,
- LCDD5_MARK, PORT180_KEYOUT5_MARK, DV_D5_MARK,
- SIUAILR_MARK, MFG2_OUT2_MARK,
- LCDD6_MARK, DV_D6_MARK,
- SIUAIBT_MARK, MFG3_OUT2_MARK, XWR2_MARK,
- LCDD7_MARK, DV_D7_MARK,
- SIUAISLD_MARK, MFG4_OUT2_MARK, XWR3_MARK,
- LCDD8_MARK, DV_D8_MARK, D16_MARK, ED16_MARK,
- LCDD9_MARK, DV_D9_MARK, D17_MARK, ED17_MARK,
- LCDD10_MARK, DV_D10_MARK, D18_MARK, ED18_MARK,
- LCDD11_MARK, DV_D11_MARK, D19_MARK, ED19_MARK,
- LCDD12_MARK, DV_D12_MARK, D20_MARK, ED20_MARK,
- LCDD13_MARK, DV_D13_MARK, D21_MARK, ED21_MARK,
- LCDD14_MARK, DV_D14_MARK, D22_MARK, ED22_MARK,
- LCDD15_MARK, DV_D15_MARK, D23_MARK, ED23_MARK,
- LCDD16_MARK, DV_HSYNC_MARK, D24_MARK, ED24_MARK,
- LCDD17_MARK, DV_VSYNC_MARK, D25_MARK, ED25_MARK,
- LCDD18_MARK, DREQ2_MARK, MSIOF0L_TSCK_MARK,
- D26_MARK, ED26_MARK,
- LCDD19_MARK, MSIOF0L_TSYNC_MARK,
- D27_MARK, ED27_MARK,
- LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK,
- D28_MARK, ED28_MARK,
- LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK,
- D29_MARK, ED29_MARK,
- LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_SS1_MARK,
- D30_MARK, ED30_MARK,
- LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_SS2_MARK,
- D31_MARK, ED31_MARK,
- LCDDCK_MARK, LCDWR_MARK, DV_CKO_MARK, SIUAOSPD_MARK,
- LCDRD_MARK, DACK2_MARK, MSIOF0L_RSYNC_MARK,
-
- /* 49-5 */
- LCDHSYN_MARK, LCDCS_MARK, LCDCS2_MARK, DACK3_MARK,
- LCDDISP_MARK, LCDRS_MARK, DREQ3_MARK, MSIOF0L_RSCK_MARK,
- LCDCSYN_MARK, LCDCSYN2_MARK, DV_CKI_MARK,
- LCDLCLK_MARK, DREQ1_MARK, MSIOF0L_RXD_MARK,
- LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, MSIOF0L_TXD_MARK,
- VIO_DR0_MARK, VIO_DR1_MARK, VIO_DR2_MARK, VIO_DR3_MARK,
- VIO_DR4_MARK, VIO_DR5_MARK, VIO_DR6_MARK, VIO_DR7_MARK,
- VIO_VDR_MARK, VIO_HDR_MARK,
- VIO_CLKR_MARK, VIO_CKOR_MARK,
- SCIFA1_TXD_MARK, GPS_PGFA0_MARK,
- SCIFA1_SCK_MARK, GPS_PGFA1_MARK,
- SCIFA1_RTS_MARK, GPS_EPPSINMON_MARK,
- SCIFA1_RXD_MARK, SCIFA1_CTS_MARK,
- MSIOF1_TXD_MARK, SCIFA1_TXD2_MARK, GPS_TXD_MARK,
- MSIOF1_TSYNC_MARK, SCIFA1_CTS2_MARK, I2C_SDA2_MARK,
- MSIOF1_TSCK_MARK, SCIFA1_SCK2_MARK,
- MSIOF1_RXD_MARK, SCIFA1_RXD2_MARK, GPS_RXD_MARK,
- MSIOF1_RSCK_MARK, SCIFA1_RTS2_MARK,
- MSIOF1_RSYNC_MARK, I2C_SCL2_MARK,
- MSIOF1_MCK0_MARK, MSIOF1_MCK1_MARK,
- MSIOF1_SS1_MARK, EDBGREQ3_MARK,
- MSIOF1_SS2_MARK,
- PORT236_IROUT_MARK, IRDA_OUT_MARK,
- IRDA_IN_MARK, IRDA_FIRSEL_MARK,
- TPU1TO0_MARK, TS_SPSYNC3_MARK,
- TPU1TO1_MARK, TS_SDAT3_MARK,
- TPU1TO2_MARK, TS_SDEN3_MARK, PORT241_MSIOF2_SS1_MARK,
- TPU1TO3_MARK, PORT242_MSIOF2_TSCK_MARK,
- M13_BSW_MARK, PORT243_MSIOF2_TSYNC_MARK,
- M14_GSW_MARK, PORT244_MSIOF2_TXD_MARK,
- PORT245_IROUT_MARK, M15_RSW_MARK,
- SOUT3_MARK, SCIFA2_TXD1_MARK,
- SIN3_MARK, SCIFA2_RXD1_MARK,
- XRTS3_MARK, SCIFA2_RTS1_MARK, PORT248_MSIOF2_SS2_MARK,
- XCTS3_MARK, SCIFA2_CTS1_MARK, PORT249_MSIOF2_RXD_MARK,
- DINT_MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK,
- SDHICLK0_MARK, TCK2_MARK,
- SDHICD0_MARK,
- SDHID0_0_MARK, TMS2_MARK,
- SDHID0_1_MARK, TDO2_MARK,
- SDHID0_2_MARK, TDI2_MARK,
- SDHID0_3_MARK, RTCK2_MARK,
-
- /* 49-6 */
- SDHICMD0_MARK, TRST2_MARK,
- SDHIWP0_MARK, EDBGREQ2_MARK,
- SDHICLK1_MARK, TCK3_MARK,
- SDHID1_0_MARK, M11_SLCD_SO2_MARK,
- TS_SPSYNC2_MARK, TMS3_MARK,
- SDHID1_1_MARK, M9_SLCD_AO2_MARK,
- TS_SDAT2_MARK, TDO3_MARK,
- SDHID1_2_MARK, M10_SLCD_CK2_MARK,
- TS_SDEN2_MARK, TDI3_MARK,
- SDHID1_3_MARK, M12_SLCD_CE2_MARK,
- TS_SCK2_MARK, RTCK3_MARK,
- SDHICMD1_MARK, TRST3_MARK,
- SDHICLK2_MARK, SCIFB_SCK_MARK,
- SDHID2_0_MARK, SCIFB_TXD_MARK,
- SDHID2_1_MARK, SCIFB_CTS_MARK,
- SDHID2_2_MARK, SCIFB_RXD_MARK,
- SDHID2_3_MARK, SCIFB_RTS_MARK,
- SDHICMD2_MARK,
- RESETOUTS_MARK,
- DIVLOCK_MARK,
- PINMUX_MARK_END,
-};
-
-static pinmux_enum_t pinmux_data[] = {
-
- /* specify valid pin states for each pin in GPIO mode */
-
- /* 49-1 (GPIO) */
- PORT_DATA_I_PD(0),
- PORT_DATA_I_PU(1), PORT_DATA_I_PU(2), PORT_DATA_I_PU(3),
- PORT_DATA_I_PU(4), PORT_DATA_I_PU(5), PORT_DATA_I_PU(6),
- PORT_DATA_I_PU(7), PORT_DATA_I_PU(8), PORT_DATA_I_PU(9),
- PORT_DATA_I_PU(10), PORT_DATA_I_PU(11), PORT_DATA_I_PU(12),
- PORT_DATA_I_PU(13),
- PORT_DATA_IO_PU_PD(14), PORT_DATA_IO_PU_PD(15),
- PORT_DATA_O(16), PORT_DATA_O(17), PORT_DATA_O(18), PORT_DATA_O(19),
- PORT_DATA_O(20), PORT_DATA_O(21), PORT_DATA_O(22), PORT_DATA_O(23),
- PORT_DATA_O(24), PORT_DATA_O(25), PORT_DATA_O(26),
- PORT_DATA_I_PD(27), PORT_DATA_I_PD(28),
- PORT_DATA_O(29), PORT_DATA_O(30), PORT_DATA_O(31), PORT_DATA_O(32),
- PORT_DATA_IO_PU(33),
- PORT_DATA_O(34),
- PORT_DATA_I_PU(35),
- PORT_DATA_O(36),
- PORT_DATA_I_PU_PD(37),
-
- /* 49-2 (GPIO) */
- PORT_DATA_IO_PU_PD(38),
- PORT_DATA_IO_PD(39), PORT_DATA_IO_PD(40), PORT_DATA_IO_PD(41),
- PORT_DATA_O(42), PORT_DATA_O(43), PORT_DATA_O(44), PORT_DATA_O(45),
- PORT_DATA_O(46), PORT_DATA_O(47),
- PORT_DATA_I_PU_PD(48), PORT_DATA_I_PU_PD(49), PORT_DATA_I_PU_PD(50),
- PORT_DATA_IO_PD(51), PORT_DATA_IO_PD(52),
- PORT_DATA_O(53),
- PORT_DATA_IO_PD(54),
- PORT_DATA_I_PU_PD(55),
- PORT_DATA_IO_PU_PD(56),
- PORT_DATA_I_PU_PD(57),
- PORT_DATA_IO_PU_PD(58),
- PORT_DATA_O(59), PORT_DATA_O(60), PORT_DATA_O(61), PORT_DATA_O(62),
- PORT_DATA_O(63),
- PORT_DATA_I_PU(64),
- PORT_DATA_O(65), PORT_DATA_O(66), PORT_DATA_O(67), PORT_DATA_O(68),
- PORT_DATA_IO_PD(69), PORT_DATA_IO_PD(70),
- PORT_DATA_I_PD(71), PORT_DATA_I_PD(72), PORT_DATA_I_PD(73),
- PORT_DATA_I_PD(74),
- PORT_DATA_IO_PU_PD(75), PORT_DATA_IO_PU_PD(76),
- PORT_DATA_IO_PD(77), PORT_DATA_IO_PD(78),
- PORT_DATA_O(79),
- PORT_DATA_IO_PD(80), PORT_DATA_IO_PD(81), PORT_DATA_IO_PD(82),
- PORT_DATA_IO_PU_PD(83), PORT_DATA_IO_PU_PD(84),
- PORT_DATA_IO_PU_PD(85), PORT_DATA_IO_PU_PD(86),
- PORT_DATA_I_PD(87),
- PORT_DATA_IO_PU_PD(88),
- PORT_DATA_I_PU_PD(89), PORT_DATA_I_PU_PD(90),
-
- /* 49-3 (GPIO) */
- PORT_DATA_O(91), PORT_DATA_O(92), PORT_DATA_O(93), PORT_DATA_O(94),
- PORT_DATA_I_PU_PD(95),
- PORT_DATA_IO_PU_PD(96), PORT_DATA_IO_PU_PD(97), PORT_DATA_IO_PU_PD(98),
- PORT_DATA_IO_PU_PD(99), PORT_DATA_IO_PU_PD(100),
- PORT_DATA_IO(101), PORT_DATA_IO(102), PORT_DATA_IO(103),
- PORT_DATA_IO_PD(104), PORT_DATA_IO_PD(105), PORT_DATA_IO_PD(106),
- PORT_DATA_IO_PD(107),
- PORT_DATA_IO_PU_PD(108), PORT_DATA_IO_PU_PD(109),
- PORT_DATA_IO_PU_PD(110), PORT_DATA_IO_PU_PD(111),
- PORT_DATA_IO_PU_PD(112), PORT_DATA_IO_PU_PD(113),
- PORT_DATA_IO_PU_PD(114),
- PORT_DATA_IO_PU(115), PORT_DATA_IO_PU(116), PORT_DATA_IO_PU(117),
- PORT_DATA_IO_PU(118), PORT_DATA_IO_PU(119), PORT_DATA_IO_PU(120),
- PORT_DATA_IO_PU(121), PORT_DATA_IO_PU(122), PORT_DATA_IO_PU(123),
- PORT_DATA_IO_PU(124), PORT_DATA_IO_PU(125), PORT_DATA_IO_PU(126),
- PORT_DATA_IO_PU(127), PORT_DATA_IO_PU(128), PORT_DATA_IO_PU(129),
- PORT_DATA_IO_PU(130),
- PORT_DATA_O(131), PORT_DATA_O(132), PORT_DATA_O(133),
- PORT_DATA_IO_PU(134),
- PORT_DATA_O(135), PORT_DATA_O(136),
- PORT_DATA_I_PU_PD(137),
- PORT_DATA_IO(138),
- PORT_DATA_IO_PU_PD(139),
- PORT_DATA_IO(140), PORT_DATA_IO(141),
- PORT_DATA_I_PU(142),
- PORT_DATA_O(143), PORT_DATA_O(144),
- PORT_DATA_I_PU(145),
-
- /* 49-4 (GPIO) */
- PORT_DATA_O(146),
- PORT_DATA_I_PU_PD(147),
- PORT_DATA_I_PD(148), PORT_DATA_I_PD(149),
- PORT_DATA_IO_PD(150), PORT_DATA_IO_PD(151), PORT_DATA_IO_PD(152),
- PORT_DATA_IO_PD(153), PORT_DATA_IO_PD(154), PORT_DATA_IO_PD(155),
- PORT_DATA_IO_PD(156), PORT_DATA_IO_PD(157), PORT_DATA_IO_PD(158),
- PORT_DATA_IO_PD(159), PORT_DATA_IO_PD(160), PORT_DATA_IO_PD(161),
- PORT_DATA_IO_PD(162), PORT_DATA_IO_PD(163), PORT_DATA_IO_PD(164),
- PORT_DATA_IO_PD(165), PORT_DATA_IO_PD(166),
- PORT_DATA_IO_PU_PD(167),
- PORT_DATA_O(168),
- PORT_DATA_I_PD(169), PORT_DATA_I_PD(170),
- PORT_DATA_O(171),
- PORT_DATA_IO_PD(172), PORT_DATA_IO_PD(173),
- PORT_DATA_O(174),
- PORT_DATA_IO_PD(175), PORT_DATA_IO_PD(176), PORT_DATA_IO_PD(177),
- PORT_DATA_IO_PD(178), PORT_DATA_IO_PD(179), PORT_DATA_IO_PD(180),
- PORT_DATA_IO_PD(181), PORT_DATA_IO_PD(182), PORT_DATA_IO_PD(183),
- PORT_DATA_IO_PD(184), PORT_DATA_IO_PD(185), PORT_DATA_IO_PD(186),
- PORT_DATA_IO_PD(187), PORT_DATA_IO_PD(188), PORT_DATA_IO_PD(189),
- PORT_DATA_IO_PD(190), PORT_DATA_IO_PD(191), PORT_DATA_IO_PD(192),
- PORT_DATA_IO_PD(193), PORT_DATA_IO_PD(194), PORT_DATA_IO_PD(195),
- PORT_DATA_IO_PD(196), PORT_DATA_IO_PD(197), PORT_DATA_IO_PD(198),
- PORT_DATA_O(199),
- PORT_DATA_IO_PD(200),
-
- /* 49-5 (GPIO) */
- PORT_DATA_O(201),
- PORT_DATA_IO_PD(202), PORT_DATA_IO_PD(203),
- PORT_DATA_I(204),
- PORT_DATA_O(205),
- PORT_DATA_IO_PD(206), PORT_DATA_IO_PD(207), PORT_DATA_IO_PD(208),
- PORT_DATA_IO_PD(209), PORT_DATA_IO_PD(210), PORT_DATA_IO_PD(211),
- PORT_DATA_IO_PD(212), PORT_DATA_IO_PD(213), PORT_DATA_IO_PD(214),
- PORT_DATA_IO_PD(215), PORT_DATA_IO_PD(216),
- PORT_DATA_O(217),
- PORT_DATA_I_PU_PD(218), PORT_DATA_I_PU_PD(219),
- PORT_DATA_O(220), PORT_DATA_O(221), PORT_DATA_O(222),
- PORT_DATA_I_PD(223),
- PORT_DATA_I_PU_PD(224),
- PORT_DATA_O(225),
- PORT_DATA_IO_PD(226),
- PORT_DATA_IO_PU_PD(227),
- PORT_DATA_I_PD(228),
- PORT_DATA_IO_PD(229), PORT_DATA_IO_PD(230),
- PORT_DATA_I_PU_PD(231), PORT_DATA_I_PU_PD(232),
- PORT_DATA_IO_PU_PD(233), PORT_DATA_IO_PU_PD(234),
- PORT_DATA_I_PU_PD(235),
- PORT_DATA_O(236),
- PORT_DATA_I_PD(237),
- PORT_DATA_IO_PU_PD(238), PORT_DATA_IO_PU_PD(239),
- PORT_DATA_IO_PD(240), PORT_DATA_IO_PD(241),
- PORT_DATA_IO_PD(242), PORT_DATA_IO_PD(243),
- PORT_DATA_O(244),
- PORT_DATA_IO_PU_PD(245),
- PORT_DATA_O(246),
- PORT_DATA_I_PD(247),
- PORT_DATA_IO_PU_PD(248),
- PORT_DATA_I_PU_PD(249),
- PORT_DATA_IO_PD(250), PORT_DATA_IO_PD(251),
- PORT_DATA_IO_PU_PD(252), PORT_DATA_IO_PU_PD(253),
- PORT_DATA_IO_PU_PD(254), PORT_DATA_IO_PU_PD(255),
- PORT_DATA_IO_PU_PD(256),
-
- /* 49-6 (GPIO) */
- PORT_DATA_IO_PU_PD(257), PORT_DATA_IO_PU_PD(258),
- PORT_DATA_IO_PD(259),
- PORT_DATA_IO_PU(260), PORT_DATA_IO_PU(261), PORT_DATA_IO_PU(262),
- PORT_DATA_IO_PU(263), PORT_DATA_IO_PU(264),
- PORT_DATA_O(265),
- PORT_DATA_IO_PU(266), PORT_DATA_IO_PU(267), PORT_DATA_IO_PU(268),
- PORT_DATA_IO_PU(269), PORT_DATA_IO_PU(270),
- PORT_DATA_O(271),
- PORT_DATA_I_PD(272),
-
- /* Special Pull-up / Pull-down Functions */
- PINMUX_DATA(PORT48_KEYIN0_PU_MARK, MSELBCR_MSEL2_1,
- PORT48_FN2, PORT48_IN_PU),
- PINMUX_DATA(PORT49_KEYIN1_PU_MARK, MSELBCR_MSEL2_1,
- PORT49_FN2, PORT49_IN_PU),
- PINMUX_DATA(PORT50_KEYIN2_PU_MARK, MSELBCR_MSEL2_1,
- PORT50_FN2, PORT50_IN_PU),
- PINMUX_DATA(PORT55_KEYIN3_PU_MARK, MSELBCR_MSEL2_1,
- PORT55_FN2, PORT55_IN_PU),
- PINMUX_DATA(PORT56_KEYIN4_PU_MARK, MSELBCR_MSEL2_1,
- PORT56_FN2, PORT56_IN_PU),
- PINMUX_DATA(PORT57_KEYIN5_PU_MARK, MSELBCR_MSEL2_1,
- PORT57_FN2, PORT57_IN_PU),
- PINMUX_DATA(PORT58_KEYIN6_PU_MARK, MSELBCR_MSEL2_1,
- PORT58_FN2, PORT58_IN_PU),
-
- /* 49-1 (FN) */
- PINMUX_DATA(VBUS0_MARK, PORT0_FN1),
- PINMUX_DATA(CPORT0_MARK, PORT1_FN1),
- PINMUX_DATA(CPORT1_MARK, PORT2_FN1),
- PINMUX_DATA(CPORT2_MARK, PORT3_FN1),
- PINMUX_DATA(CPORT3_MARK, PORT4_FN1),
- PINMUX_DATA(CPORT4_MARK, PORT5_FN1),
- PINMUX_DATA(CPORT5_MARK, PORT6_FN1),
- PINMUX_DATA(CPORT6_MARK, PORT7_FN1),
- PINMUX_DATA(CPORT7_MARK, PORT8_FN1),
- PINMUX_DATA(CPORT8_MARK, PORT9_FN1),
- PINMUX_DATA(CPORT9_MARK, PORT10_FN1),
- PINMUX_DATA(CPORT10_MARK, PORT11_FN1),
- PINMUX_DATA(CPORT11_MARK, PORT12_FN1),
- PINMUX_DATA(SIN2_MARK, PORT12_FN2),
- PINMUX_DATA(CPORT12_MARK, PORT13_FN1),
- PINMUX_DATA(XCTS2_MARK, PORT13_FN2),
- PINMUX_DATA(CPORT13_MARK, PORT14_FN1),
- PINMUX_DATA(RFSPO4_MARK, PORT14_FN2),
- PINMUX_DATA(CPORT14_MARK, PORT15_FN1),
- PINMUX_DATA(RFSPO5_MARK, PORT15_FN2),
- PINMUX_DATA(CPORT15_MARK, PORT16_FN1),
- PINMUX_DATA(CPORT16_MARK, PORT17_FN1),
- PINMUX_DATA(CPORT17_MARK, PORT18_FN1),
- PINMUX_DATA(SOUT2_MARK, PORT18_FN2),
- PINMUX_DATA(CPORT18_MARK, PORT19_FN1),
- PINMUX_DATA(XRTS2_MARK, PORT19_FN1),
- PINMUX_DATA(CPORT19_MARK, PORT20_FN1),
- PINMUX_DATA(CPORT20_MARK, PORT21_FN1),
- PINMUX_DATA(RFSPO6_MARK, PORT21_FN2),
- PINMUX_DATA(CPORT21_MARK, PORT22_FN1),
- PINMUX_DATA(STATUS0_MARK, PORT22_FN2),
- PINMUX_DATA(CPORT22_MARK, PORT23_FN1),
- PINMUX_DATA(STATUS1_MARK, PORT23_FN2),
- PINMUX_DATA(CPORT23_MARK, PORT24_FN1),
- PINMUX_DATA(STATUS2_MARK, PORT24_FN2),
- PINMUX_DATA(RFSPO7_MARK, PORT24_FN3),
- PINMUX_DATA(MPORT0_MARK, PORT25_FN1),
- PINMUX_DATA(MPORT1_MARK, PORT26_FN1),
- PINMUX_DATA(B_SYNLD1_MARK, PORT27_FN1),
- PINMUX_DATA(B_SYNLD2_MARK, PORT28_FN1),
- PINMUX_DATA(XMAINPS_MARK, PORT29_FN1),
- PINMUX_DATA(XDIVPS_MARK, PORT30_FN1),
- PINMUX_DATA(XIDRST_MARK, PORT31_FN1),
- PINMUX_DATA(IDCLK_MARK, PORT32_FN1),
- PINMUX_DATA(IDIO_MARK, PORT33_FN1),
- PINMUX_DATA(SOUT1_MARK, PORT34_FN1),
- PINMUX_DATA(SCIFA4_TXD_MARK, PORT34_FN2),
- PINMUX_DATA(M02_BERDAT_MARK, PORT34_FN3),
- PINMUX_DATA(SIN1_MARK, PORT35_FN1),
- PINMUX_DATA(SCIFA4_RXD_MARK, PORT35_FN2),
- PINMUX_DATA(XWUP_MARK, PORT35_FN3),
- PINMUX_DATA(XRTS1_MARK, PORT36_FN1),
- PINMUX_DATA(SCIFA4_RTS_MARK, PORT36_FN2),
- PINMUX_DATA(M03_BERCLK_MARK, PORT36_FN3),
- PINMUX_DATA(XCTS1_MARK, PORT37_FN1),
- PINMUX_DATA(SCIFA4_CTS_MARK, PORT37_FN2),
-
- /* 49-2 (FN) */
- PINMUX_DATA(HSU_IQ_AGC6_MARK, PORT38_FN1),
- PINMUX_DATA(MFG2_IN2_MARK, PORT38_FN2),
- PINMUX_DATA(MSIOF2_MCK0_MARK, PORT38_FN3),
- PINMUX_DATA(HSU_IQ_AGC5_MARK, PORT39_FN1),
- PINMUX_DATA(MFG2_IN1_MARK, PORT39_FN2),
- PINMUX_DATA(MSIOF2_MCK1_MARK, PORT39_FN3),
- PINMUX_DATA(HSU_IQ_AGC4_MARK, PORT40_FN1),
- PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT40_FN3),
- PINMUX_DATA(HSU_IQ_AGC3_MARK, PORT41_FN1),
- PINMUX_DATA(MFG2_OUT1_MARK, PORT41_FN2),
- PINMUX_DATA(MSIOF2_RSCK_MARK, PORT41_FN3),
- PINMUX_DATA(HSU_IQ_AGC2_MARK, PORT42_FN1),
- PINMUX_DATA(PORT42_KEYOUT0_MARK, MSELBCR_MSEL2_1, PORT42_FN2),
- PINMUX_DATA(HSU_IQ_AGC1_MARK, PORT43_FN1),
- PINMUX_DATA(PORT43_KEYOUT1_MARK, MSELBCR_MSEL2_1, PORT43_FN2),
- PINMUX_DATA(HSU_IQ_AGC0_MARK, PORT44_FN1),
- PINMUX_DATA(PORT44_KEYOUT2_MARK, MSELBCR_MSEL2_1, PORT44_FN2),
- PINMUX_DATA(HSU_IQ_AGC_ST_MARK, PORT45_FN1),
- PINMUX_DATA(PORT45_KEYOUT3_MARK, MSELBCR_MSEL2_1, PORT45_FN2),
- PINMUX_DATA(HSU_IQ_PDO_MARK, PORT46_FN1),
- PINMUX_DATA(PORT46_KEYOUT4_MARK, MSELBCR_MSEL2_1, PORT46_FN2),
- PINMUX_DATA(HSU_IQ_PYO_MARK, PORT47_FN1),
- PINMUX_DATA(PORT47_KEYOUT5_MARK, MSELBCR_MSEL2_1, PORT47_FN2),
- PINMUX_DATA(HSU_EN_TXMUX_G3MO_MARK, PORT48_FN1),
- PINMUX_DATA(PORT48_KEYIN0_MARK, MSELBCR_MSEL2_1, PORT48_FN2),
- PINMUX_DATA(HSU_I_TXMUX_G3MO_MARK, PORT49_FN1),
- PINMUX_DATA(PORT49_KEYIN1_MARK, MSELBCR_MSEL2_1, PORT49_FN2),
- PINMUX_DATA(HSU_Q_TXMUX_G3MO_MARK, PORT50_FN1),
- PINMUX_DATA(PORT50_KEYIN2_MARK, MSELBCR_MSEL2_1, PORT50_FN2),
- PINMUX_DATA(HSU_SYO_MARK, PORT51_FN1),
- PINMUX_DATA(PORT51_MSIOF2_TSYNC_MARK, PORT51_FN2),
- PINMUX_DATA(HSU_SDO_MARK, PORT52_FN1),
- PINMUX_DATA(PORT52_MSIOF2_TSCK_MARK, PORT52_FN2),
- PINMUX_DATA(HSU_TGTTI_G3MO_MARK, PORT53_FN1),
- PINMUX_DATA(PORT53_MSIOF2_TXD_MARK, PORT53_FN2),
- PINMUX_DATA(B_TIME_STAMP_MARK, PORT54_FN1),
- PINMUX_DATA(PORT54_MSIOF2_RXD_MARK, PORT54_FN2),
- PINMUX_DATA(HSU_SDI_MARK, PORT55_FN1),
- PINMUX_DATA(PORT55_KEYIN3_MARK, MSELBCR_MSEL2_1, PORT55_FN2),
- PINMUX_DATA(HSU_SCO_MARK, PORT56_FN1),
- PINMUX_DATA(PORT56_KEYIN4_MARK, MSELBCR_MSEL2_1, PORT56_FN2),
- PINMUX_DATA(HSU_DREQ_MARK, PORT57_FN1),
- PINMUX_DATA(PORT57_KEYIN5_MARK, MSELBCR_MSEL2_1, PORT57_FN2),
- PINMUX_DATA(HSU_DACK_MARK, PORT58_FN1),
- PINMUX_DATA(PORT58_KEYIN6_MARK, MSELBCR_MSEL2_1, PORT58_FN2),
- PINMUX_DATA(HSU_CLK61M_MARK, PORT59_FN1),
- PINMUX_DATA(PORT59_MSIOF2_SS1_MARK, PORT59_FN2),
- PINMUX_DATA(HSU_XRST_MARK, PORT60_FN1),
- PINMUX_DATA(PORT60_MSIOF2_SS2_MARK, PORT60_FN2),
- PINMUX_DATA(PCMCLKO_MARK, PORT61_FN1),
- PINMUX_DATA(SYNC8KO_MARK, PORT62_FN1),
- PINMUX_DATA(DNPCM_A_MARK, PORT63_FN1),
- PINMUX_DATA(UPPCM_A_MARK, PORT64_FN1),
- PINMUX_DATA(XTALB1L_MARK, PORT65_FN1),
- PINMUX_DATA(GPS_AGC1_MARK, PORT66_FN1),
- PINMUX_DATA(SCIFA0_RTS_MARK, PORT66_FN2),
- PINMUX_DATA(GPS_AGC2_MARK, PORT67_FN1),
- PINMUX_DATA(SCIFA0_SCK_MARK, PORT67_FN2),
- PINMUX_DATA(GPS_AGC3_MARK, PORT68_FN1),
- PINMUX_DATA(SCIFA0_TXD_MARK, PORT68_FN2),
- PINMUX_DATA(GPS_AGC4_MARK, PORT69_FN1),
- PINMUX_DATA(SCIFA0_RXD_MARK, PORT69_FN2),
- PINMUX_DATA(GPS_PWRD_MARK, PORT70_FN1),
- PINMUX_DATA(SCIFA0_CTS_MARK, PORT70_FN2),
- PINMUX_DATA(GPS_IM_MARK, PORT71_FN1),
- PINMUX_DATA(GPS_IS_MARK, PORT72_FN1),
- PINMUX_DATA(GPS_QM_MARK, PORT73_FN1),
- PINMUX_DATA(GPS_QS_MARK, PORT74_FN1),
- PINMUX_DATA(SIUBOMC_MARK, PORT75_FN1),
- PINMUX_DATA(TPU2TO0_MARK, PORT75_FN3),
- PINMUX_DATA(SIUCKB_MARK, PORT76_FN1),
- PINMUX_DATA(TPU2TO1_MARK, PORT76_FN3),
- PINMUX_DATA(SIUBOLR_MARK, PORT77_FN1),
- PINMUX_DATA(BBIF2_TSYNC_MARK, PORT77_FN2),
- PINMUX_DATA(TPU2TO2_MARK, PORT77_FN3),
- PINMUX_DATA(SIUBOBT_MARK, PORT78_FN1),
- PINMUX_DATA(BBIF2_TSCK_MARK, PORT78_FN2),
- PINMUX_DATA(TPU2TO3_MARK, PORT78_FN3),
- PINMUX_DATA(SIUBOSLD_MARK, PORT79_FN1),
- PINMUX_DATA(BBIF2_TXD_MARK, PORT79_FN2),
- PINMUX_DATA(TPU3TO0_MARK, PORT79_FN3),
- PINMUX_DATA(SIUBILR_MARK, PORT80_FN1),
- PINMUX_DATA(TPU3TO1_MARK, PORT80_FN3),
- PINMUX_DATA(SIUBIBT_MARK, PORT81_FN1),
- PINMUX_DATA(TPU3TO2_MARK, PORT81_FN3),
- PINMUX_DATA(SIUBISLD_MARK, PORT82_FN1),
- PINMUX_DATA(TPU3TO3_MARK, PORT82_FN3),
- PINMUX_DATA(NMI_MARK, PORT83_FN1),
- PINMUX_DATA(TPU4TO0_MARK, PORT83_FN3),
- PINMUX_DATA(DNPCM_M_MARK, PORT84_FN1),
- PINMUX_DATA(TPU4TO1_MARK, PORT84_FN3),
- PINMUX_DATA(TPU4TO2_MARK, PORT85_FN3),
- PINMUX_DATA(TPU4TO3_MARK, PORT86_FN3),
- PINMUX_DATA(IRQ_TMPB_MARK, PORT87_FN1),
- PINMUX_DATA(PWEN_MARK, PORT88_FN1),
- PINMUX_DATA(MFG1_OUT1_MARK, PORT88_FN2),
- PINMUX_DATA(OVCN_MARK, PORT89_FN1),
- PINMUX_DATA(MFG1_IN1_MARK, PORT89_FN2),
- PINMUX_DATA(OVCN2_MARK, PORT90_FN1),
- PINMUX_DATA(MFG1_IN2_MARK, PORT90_FN2),
-
- /* 49-3 (FN) */
- PINMUX_DATA(RFSPO1_MARK, PORT91_FN1),
- PINMUX_DATA(RFSPO2_MARK, PORT92_FN1),
- PINMUX_DATA(RFSPO3_MARK, PORT93_FN1),
- PINMUX_DATA(PORT93_VIO_CKO2_MARK, PORT93_FN2),
- PINMUX_DATA(USBTERM_MARK, PORT94_FN1),
- PINMUX_DATA(EXTLP_MARK, PORT94_FN2),
- PINMUX_DATA(IDIN_MARK, PORT95_FN1),
- PINMUX_DATA(SCIFA5_CTS_MARK, PORT96_FN1),
- PINMUX_DATA(MFG0_IN1_MARK, PORT96_FN2),
- PINMUX_DATA(SCIFA5_RTS_MARK, PORT97_FN1),
- PINMUX_DATA(MFG0_IN2_MARK, PORT97_FN2),
- PINMUX_DATA(SCIFA5_RXD_MARK, PORT98_FN1),
- PINMUX_DATA(SCIFA5_TXD_MARK, PORT99_FN1),
- PINMUX_DATA(SCIFA5_SCK_MARK, PORT100_FN1),
- PINMUX_DATA(MFG0_OUT1_MARK, PORT100_FN2),
- PINMUX_DATA(A0_EA0_MARK, PORT101_FN1),
- PINMUX_DATA(BS_MARK, PORT101_FN2),
- PINMUX_DATA(A14_EA14_MARK, PORT102_FN1),
- PINMUX_DATA(PORT102_KEYOUT0_MARK, MSELBCR_MSEL2_0, PORT102_FN2),
- PINMUX_DATA(A15_EA15_MARK, PORT103_FN1),
- PINMUX_DATA(PORT103_KEYOUT1_MARK, MSELBCR_MSEL2_0, PORT103_FN2),
- PINMUX_DATA(DV_CLKOL_MARK, PORT103_FN3),
- PINMUX_DATA(A16_EA16_MARK, PORT104_FN1),
- PINMUX_DATA(PORT104_KEYOUT2_MARK, MSELBCR_MSEL2_0, PORT104_FN2),
- PINMUX_DATA(DV_VSYNCL_MARK, PORT104_FN3),
- PINMUX_DATA(MSIOF0_SS1_MARK, PORT104_FN4),
- PINMUX_DATA(A17_EA17_MARK, PORT105_FN1),
- PINMUX_DATA(PORT105_KEYOUT3_MARK, MSELBCR_MSEL2_0, PORT105_FN2),
- PINMUX_DATA(DV_HSYNCL_MARK, PORT105_FN3),
- PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT105_FN4),
- PINMUX_DATA(A18_EA18_MARK, PORT106_FN1),
- PINMUX_DATA(PORT106_KEYOUT4_MARK, MSELBCR_MSEL2_0, PORT106_FN2),
- PINMUX_DATA(DV_DL0_MARK, PORT106_FN3),
- PINMUX_DATA(MSIOF0_TSCK_MARK, PORT106_FN4),
- PINMUX_DATA(A19_EA19_MARK, PORT107_FN1),
- PINMUX_DATA(PORT107_KEYOUT5_MARK, MSELBCR_MSEL2_0, PORT107_FN2),
- PINMUX_DATA(DV_DL1_MARK, PORT107_FN3),
- PINMUX_DATA(MSIOF0_TXD_MARK, PORT107_FN4),
- PINMUX_DATA(A20_EA20_MARK, PORT108_FN1),
- PINMUX_DATA(PORT108_KEYIN0_MARK, MSELBCR_MSEL2_0, PORT108_FN2),
- PINMUX_DATA(DV_DL2_MARK, PORT108_FN3),
- PINMUX_DATA(MSIOF0_RSCK_MARK, PORT108_FN4),
- PINMUX_DATA(A21_EA21_MARK, PORT109_FN1),
- PINMUX_DATA(PORT109_KEYIN1_MARK, MSELBCR_MSEL2_0, PORT109_FN2),
- PINMUX_DATA(DV_DL3_MARK, PORT109_FN3),
- PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT109_FN4),
- PINMUX_DATA(A22_EA22_MARK, PORT110_FN1),
- PINMUX_DATA(PORT110_KEYIN2_MARK, MSELBCR_MSEL2_0, PORT110_FN2),
- PINMUX_DATA(DV_DL4_MARK, PORT110_FN3),
- PINMUX_DATA(MSIOF0_MCK0_MARK, PORT110_FN4),
- PINMUX_DATA(A23_EA23_MARK, PORT111_FN1),
- PINMUX_DATA(PORT111_KEYIN3_MARK, MSELBCR_MSEL2_0, PORT111_FN2),
- PINMUX_DATA(DV_DL5_MARK, PORT111_FN3),
- PINMUX_DATA(MSIOF0_MCK1_MARK, PORT111_FN4),
- PINMUX_DATA(A24_EA24_MARK, PORT112_FN1),
- PINMUX_DATA(PORT112_KEYIN4_MARK, MSELBCR_MSEL2_0, PORT112_FN2),
- PINMUX_DATA(DV_DL6_MARK, PORT112_FN3),
- PINMUX_DATA(MSIOF0_RXD_MARK, PORT112_FN4),
- PINMUX_DATA(A25_EA25_MARK, PORT113_FN1),
- PINMUX_DATA(PORT113_KEYIN5_MARK, MSELBCR_MSEL2_0, PORT113_FN2),
- PINMUX_DATA(DV_DL7_MARK, PORT113_FN3),
- PINMUX_DATA(MSIOF0_SS2_MARK, PORT113_FN4),
- PINMUX_DATA(A26_MARK, PORT114_FN1),
- PINMUX_DATA(PORT113_KEYIN6_MARK, MSELBCR_MSEL2_0, PORT114_FN2),
- PINMUX_DATA(DV_CLKIL_MARK, PORT114_FN3),
- PINMUX_DATA(D0_ED0_NAF0_MARK, PORT115_FN1),
- PINMUX_DATA(D1_ED1_NAF1_MARK, PORT116_FN1),
- PINMUX_DATA(D2_ED2_NAF2_MARK, PORT117_FN1),
- PINMUX_DATA(D3_ED3_NAF3_MARK, PORT118_FN1),
- PINMUX_DATA(D4_ED4_NAF4_MARK, PORT119_FN1),
- PINMUX_DATA(D5_ED5_NAF5_MARK, PORT120_FN1),
- PINMUX_DATA(D6_ED6_NAF6_MARK, PORT121_FN1),
- PINMUX_DATA(D7_ED7_NAF7_MARK, PORT122_FN1),
- PINMUX_DATA(D8_ED8_NAF8_MARK, PORT123_FN1),
- PINMUX_DATA(D9_ED9_NAF9_MARK, PORT124_FN1),
- PINMUX_DATA(D10_ED10_NAF10_MARK, PORT125_FN1),
- PINMUX_DATA(D11_ED11_NAF11_MARK, PORT126_FN1),
- PINMUX_DATA(D12_ED12_NAF12_MARK, PORT127_FN1),
- PINMUX_DATA(D13_ED13_NAF13_MARK, PORT128_FN1),
- PINMUX_DATA(D14_ED14_NAF14_MARK, PORT129_FN1),
- PINMUX_DATA(D15_ED15_NAF15_MARK, PORT130_FN1),
- PINMUX_DATA(CS4_MARK, PORT131_FN1),
- PINMUX_DATA(CS5A_MARK, PORT132_FN1),
- PINMUX_DATA(CS5B_MARK, PORT133_FN1),
- PINMUX_DATA(FCE1_MARK, PORT133_FN2),
- PINMUX_DATA(CS6B_MARK, PORT134_FN1),
- PINMUX_DATA(XCS2_MARK, PORT134_FN2),
- PINMUX_DATA(FCE0_MARK, PORT135_FN1),
- PINMUX_DATA(CS6A_MARK, PORT136_FN1),
- PINMUX_DATA(DACK0_MARK, PORT136_FN2),
- PINMUX_DATA(WAIT_MARK, PORT137_FN1),
- PINMUX_DATA(DREQ0_MARK, PORT137_FN2),
- PINMUX_DATA(RD_XRD_MARK, PORT138_FN1),
- PINMUX_DATA(A27_MARK, PORT139_FN1),
- PINMUX_DATA(RDWR_XWE_MARK, PORT139_FN2),
- PINMUX_DATA(WE0_XWR0_FWE_MARK, PORT140_FN1),
- PINMUX_DATA(WE1_XWR1_MARK, PORT141_FN1),
- PINMUX_DATA(FRB_MARK, PORT142_FN1),
- PINMUX_DATA(CKO_MARK, PORT143_FN1),
- PINMUX_DATA(NBRSTOUT_MARK, PORT144_FN1),
- PINMUX_DATA(NBRST_MARK, PORT145_FN1),
-
- /* 49-4 (FN) */
- PINMUX_DATA(RFSPO0_MARK, PORT146_FN1),
- PINMUX_DATA(PORT146_VIO_CKO2_MARK, PORT146_FN2),
- PINMUX_DATA(TSTMD_MARK, PORT147_FN1),
- PINMUX_DATA(VIO_VD_MARK, PORT148_FN1),
- PINMUX_DATA(VIO_HD_MARK, PORT149_FN1),
- PINMUX_DATA(VIO_D0_MARK, PORT150_FN1),
- PINMUX_DATA(VIO_D1_MARK, PORT151_FN1),
- PINMUX_DATA(VIO_D2_MARK, PORT152_FN1),
- PINMUX_DATA(VIO_D3_MARK, PORT153_FN1),
- PINMUX_DATA(VIO_D4_MARK, PORT154_FN1),
- PINMUX_DATA(VIO_D5_MARK, PORT155_FN1),
- PINMUX_DATA(VIO_D6_MARK, PORT156_FN1),
- PINMUX_DATA(VIO_D7_MARK, PORT157_FN1),
- PINMUX_DATA(VIO_D8_MARK, PORT158_FN1),
- PINMUX_DATA(VIO_D9_MARK, PORT159_FN1),
- PINMUX_DATA(VIO_D10_MARK, PORT160_FN1),
- PINMUX_DATA(VIO_D11_MARK, PORT161_FN1),
- PINMUX_DATA(VIO_D12_MARK, PORT162_FN1),
- PINMUX_DATA(VIO_D13_MARK, PORT163_FN1),
- PINMUX_DATA(VIO_D14_MARK, PORT164_FN1),
- PINMUX_DATA(VIO_D15_MARK, PORT165_FN1),
- PINMUX_DATA(VIO_CLK_MARK, PORT166_FN1),
- PINMUX_DATA(VIO_FIELD_MARK, PORT167_FN1),
- PINMUX_DATA(VIO_CKO_MARK, PORT168_FN1),
- PINMUX_DATA(MFG3_IN1_MARK, PORT169_FN2),
- PINMUX_DATA(MFG3_IN2_MARK, PORT170_FN2),
- PINMUX_DATA(M9_SLCD_A01_MARK, PORT171_FN1),
- PINMUX_DATA(MFG3_OUT1_MARK, PORT171_FN2),
- PINMUX_DATA(TPU0TO0_MARK, PORT171_FN3),
- PINMUX_DATA(M10_SLCD_CK1_MARK, PORT172_FN1),
- PINMUX_DATA(MFG4_IN1_MARK, PORT172_FN2),
- PINMUX_DATA(TPU0TO1_MARK, PORT172_FN3),
- PINMUX_DATA(M11_SLCD_SO1_MARK, PORT173_FN1),
- PINMUX_DATA(MFG4_IN2_MARK, PORT173_FN2),
- PINMUX_DATA(TPU0TO2_MARK, PORT173_FN3),
- PINMUX_DATA(M12_SLCD_CE1_MARK, PORT174_FN1),
- PINMUX_DATA(MFG4_OUT1_MARK, PORT174_FN2),
- PINMUX_DATA(TPU0TO3_MARK, PORT174_FN3),
- PINMUX_DATA(LCDD0_MARK, PORT175_FN1),
- PINMUX_DATA(PORT175_KEYOUT0_MARK, PORT175_FN2),
- PINMUX_DATA(DV_D0_MARK, PORT175_FN3),
- PINMUX_DATA(SIUCKA_MARK, PORT175_FN4),
- PINMUX_DATA(MFG0_OUT2_MARK, PORT175_FN5),
- PINMUX_DATA(LCDD1_MARK, PORT176_FN1),
- PINMUX_DATA(PORT176_KEYOUT1_MARK, PORT176_FN2),
- PINMUX_DATA(DV_D1_MARK, PORT176_FN3),
- PINMUX_DATA(SIUAOLR_MARK, PORT176_FN4),
- PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT176_FN5),
- PINMUX_DATA(LCDD2_MARK, PORT177_FN1),
- PINMUX_DATA(PORT177_KEYOUT2_MARK, PORT177_FN2),
- PINMUX_DATA(DV_D2_MARK, PORT177_FN3),
- PINMUX_DATA(SIUAOBT_MARK, PORT177_FN4),
- PINMUX_DATA(BBIF2_TSCK1_MARK, PORT177_FN5),
- PINMUX_DATA(LCDD3_MARK, PORT178_FN1),
- PINMUX_DATA(PORT178_KEYOUT3_MARK, PORT178_FN2),
- PINMUX_DATA(DV_D3_MARK, PORT178_FN3),
- PINMUX_DATA(SIUAOSLD_MARK, PORT178_FN4),
- PINMUX_DATA(BBIF2_TXD1_MARK, PORT178_FN5),
- PINMUX_DATA(LCDD4_MARK, PORT179_FN1),
- PINMUX_DATA(PORT179_KEYOUT4_MARK, PORT179_FN2),
- PINMUX_DATA(DV_D4_MARK, PORT179_FN3),
- PINMUX_DATA(SIUAISPD_MARK, PORT179_FN4),
- PINMUX_DATA(MFG1_OUT2_MARK, PORT179_FN5),
- PINMUX_DATA(LCDD5_MARK, PORT180_FN1),
- PINMUX_DATA(PORT180_KEYOUT5_MARK, PORT180_FN2),
- PINMUX_DATA(DV_D5_MARK, PORT180_FN3),
- PINMUX_DATA(SIUAILR_MARK, PORT180_FN4),
- PINMUX_DATA(MFG2_OUT2_MARK, PORT180_FN5),
- PINMUX_DATA(LCDD6_MARK, PORT181_FN1),
- PINMUX_DATA(DV_D6_MARK, PORT181_FN3),
- PINMUX_DATA(SIUAIBT_MARK, PORT181_FN4),
- PINMUX_DATA(MFG3_OUT2_MARK, PORT181_FN5),
- PINMUX_DATA(XWR2_MARK, PORT181_FN7),
- PINMUX_DATA(LCDD7_MARK, PORT182_FN1),
- PINMUX_DATA(DV_D7_MARK, PORT182_FN3),
- PINMUX_DATA(SIUAISLD_MARK, PORT182_FN4),
- PINMUX_DATA(MFG4_OUT2_MARK, PORT182_FN5),
- PINMUX_DATA(XWR3_MARK, PORT182_FN7),
- PINMUX_DATA(LCDD8_MARK, PORT183_FN1),
- PINMUX_DATA(DV_D8_MARK, PORT183_FN3),
- PINMUX_DATA(D16_MARK, PORT183_FN6),
- PINMUX_DATA(ED16_MARK, PORT183_FN7),
- PINMUX_DATA(LCDD9_MARK, PORT184_FN1),
- PINMUX_DATA(DV_D9_MARK, PORT184_FN3),
- PINMUX_DATA(D17_MARK, PORT184_FN6),
- PINMUX_DATA(ED17_MARK, PORT184_FN7),
- PINMUX_DATA(LCDD10_MARK, PORT185_FN1),
- PINMUX_DATA(DV_D10_MARK, PORT185_FN3),
- PINMUX_DATA(D18_MARK, PORT185_FN6),
- PINMUX_DATA(ED18_MARK, PORT185_FN7),
- PINMUX_DATA(LCDD11_MARK, PORT186_FN1),
- PINMUX_DATA(DV_D11_MARK, PORT186_FN3),
- PINMUX_DATA(D19_MARK, PORT186_FN6),
- PINMUX_DATA(ED19_MARK, PORT186_FN7),
- PINMUX_DATA(LCDD12_MARK, PORT187_FN1),
- PINMUX_DATA(DV_D12_MARK, PORT187_FN3),
- PINMUX_DATA(D20_MARK, PORT187_FN6),
- PINMUX_DATA(ED20_MARK, PORT187_FN7),
- PINMUX_DATA(LCDD13_MARK, PORT188_FN1),
- PINMUX_DATA(DV_D13_MARK, PORT188_FN3),
- PINMUX_DATA(D21_MARK, PORT188_FN6),
- PINMUX_DATA(ED21_MARK, PORT188_FN7),
- PINMUX_DATA(LCDD14_MARK, PORT189_FN1),
- PINMUX_DATA(DV_D14_MARK, PORT189_FN3),
- PINMUX_DATA(D22_MARK, PORT189_FN6),
- PINMUX_DATA(ED22_MARK, PORT189_FN7),
- PINMUX_DATA(LCDD15_MARK, PORT190_FN1),
- PINMUX_DATA(DV_D15_MARK, PORT190_FN3),
- PINMUX_DATA(D23_MARK, PORT190_FN6),
- PINMUX_DATA(ED23_MARK, PORT190_FN7),
- PINMUX_DATA(LCDD16_MARK, PORT191_FN1),
- PINMUX_DATA(DV_HSYNC_MARK, PORT191_FN3),
- PINMUX_DATA(D24_MARK, PORT191_FN6),
- PINMUX_DATA(ED24_MARK, PORT191_FN7),
- PINMUX_DATA(LCDD17_MARK, PORT192_FN1),
- PINMUX_DATA(DV_VSYNC_MARK, PORT192_FN3),
- PINMUX_DATA(D25_MARK, PORT192_FN6),
- PINMUX_DATA(ED25_MARK, PORT192_FN7),
- PINMUX_DATA(LCDD18_MARK, PORT193_FN1),
- PINMUX_DATA(DREQ2_MARK, PORT193_FN2),
- PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT193_FN5),
- PINMUX_DATA(D26_MARK, PORT193_FN6),
- PINMUX_DATA(ED26_MARK, PORT193_FN7),
- PINMUX_DATA(LCDD19_MARK, PORT194_FN1),
- PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT194_FN5),
- PINMUX_DATA(D27_MARK, PORT194_FN6),
- PINMUX_DATA(ED27_MARK, PORT194_FN7),
- PINMUX_DATA(LCDD20_MARK, PORT195_FN1),
- PINMUX_DATA(TS_SPSYNC1_MARK, PORT195_FN2),
- PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT195_FN5),
- PINMUX_DATA(D28_MARK, PORT195_FN6),
- PINMUX_DATA(ED28_MARK, PORT195_FN7),
- PINMUX_DATA(LCDD21_MARK, PORT196_FN1),
- PINMUX_DATA(TS_SDAT1_MARK, PORT196_FN2),
- PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT196_FN5),
- PINMUX_DATA(D29_MARK, PORT196_FN6),
- PINMUX_DATA(ED29_MARK, PORT196_FN7),
- PINMUX_DATA(LCDD22_MARK, PORT197_FN1),
- PINMUX_DATA(TS_SDEN1_MARK, PORT197_FN2),
- PINMUX_DATA(MSIOF0L_SS1_MARK, PORT197_FN5),
- PINMUX_DATA(D30_MARK, PORT197_FN6),
- PINMUX_DATA(ED30_MARK, PORT197_FN7),
- PINMUX_DATA(LCDD23_MARK, PORT198_FN1),
- PINMUX_DATA(TS_SCK1_MARK, PORT198_FN2),
- PINMUX_DATA(MSIOF0L_SS2_MARK, PORT198_FN5),
- PINMUX_DATA(D31_MARK, PORT198_FN6),
- PINMUX_DATA(ED31_MARK, PORT198_FN7),
- PINMUX_DATA(LCDDCK_MARK, PORT199_FN1),
- PINMUX_DATA(LCDWR_MARK, PORT199_FN2),
- PINMUX_DATA(DV_CKO_MARK, PORT199_FN3),
- PINMUX_DATA(SIUAOSPD_MARK, PORT199_FN4),
- PINMUX_DATA(LCDRD_MARK, PORT200_FN1),
- PINMUX_DATA(DACK2_MARK, PORT200_FN2),
- PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT200_FN5),
-
- /* 49-5 (FN) */
- PINMUX_DATA(LCDHSYN_MARK, PORT201_FN1),
- PINMUX_DATA(LCDCS_MARK, PORT201_FN2),
- PINMUX_DATA(LCDCS2_MARK, PORT201_FN3),
- PINMUX_DATA(DACK3_MARK, PORT201_FN4),
- PINMUX_DATA(LCDDISP_MARK, PORT202_FN1),
- PINMUX_DATA(LCDRS_MARK, PORT202_FN2),
- PINMUX_DATA(DREQ3_MARK, PORT202_FN4),
- PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT202_FN5),
- PINMUX_DATA(LCDCSYN_MARK, PORT203_FN1),
- PINMUX_DATA(LCDCSYN2_MARK, PORT203_FN2),
- PINMUX_DATA(DV_CKI_MARK, PORT203_FN3),
- PINMUX_DATA(LCDLCLK_MARK, PORT204_FN1),
- PINMUX_DATA(DREQ1_MARK, PORT204_FN3),
- PINMUX_DATA(MSIOF0L_RXD_MARK, PORT204_FN5),
- PINMUX_DATA(LCDDON_MARK, PORT205_FN1),
- PINMUX_DATA(LCDDON2_MARK, PORT205_FN2),
- PINMUX_DATA(DACK1_MARK, PORT205_FN3),
- PINMUX_DATA(MSIOF0L_TXD_MARK, PORT205_FN5),
- PINMUX_DATA(VIO_DR0_MARK, PORT206_FN1),
- PINMUX_DATA(VIO_DR1_MARK, PORT207_FN1),
- PINMUX_DATA(VIO_DR2_MARK, PORT208_FN1),
- PINMUX_DATA(VIO_DR3_MARK, PORT209_FN1),
- PINMUX_DATA(VIO_DR4_MARK, PORT210_FN1),
- PINMUX_DATA(VIO_DR5_MARK, PORT211_FN1),
- PINMUX_DATA(VIO_DR6_MARK, PORT212_FN1),
- PINMUX_DATA(VIO_DR7_MARK, PORT213_FN1),
- PINMUX_DATA(VIO_VDR_MARK, PORT214_FN1),
- PINMUX_DATA(VIO_HDR_MARK, PORT215_FN1),
- PINMUX_DATA(VIO_CLKR_MARK, PORT216_FN1),
- PINMUX_DATA(VIO_CKOR_MARK, PORT217_FN1),
- PINMUX_DATA(SCIFA1_TXD_MARK, PORT220_FN2),
- PINMUX_DATA(GPS_PGFA0_MARK, PORT220_FN3),
- PINMUX_DATA(SCIFA1_SCK_MARK, PORT221_FN2),
- PINMUX_DATA(GPS_PGFA1_MARK, PORT221_FN3),
- PINMUX_DATA(SCIFA1_RTS_MARK, PORT222_FN2),
- PINMUX_DATA(GPS_EPPSINMON_MARK, PORT222_FN3),
- PINMUX_DATA(SCIFA1_RXD_MARK, PORT223_FN2),
- PINMUX_DATA(SCIFA1_CTS_MARK, PORT224_FN2),
- PINMUX_DATA(MSIOF1_TXD_MARK, PORT225_FN1),
- PINMUX_DATA(SCIFA1_TXD2_MARK, PORT225_FN2),
- PINMUX_DATA(GPS_TXD_MARK, PORT225_FN3),
- PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT226_FN1),
- PINMUX_DATA(SCIFA1_CTS2_MARK, PORT226_FN2),
- PINMUX_DATA(I2C_SDA2_MARK, PORT226_FN3),
- PINMUX_DATA(MSIOF1_TSCK_MARK, PORT227_FN1),
- PINMUX_DATA(SCIFA1_SCK2_MARK, PORT227_FN2),
- PINMUX_DATA(MSIOF1_RXD_MARK, PORT228_FN1),
- PINMUX_DATA(SCIFA1_RXD2_MARK, PORT228_FN2),
- PINMUX_DATA(GPS_RXD_MARK, PORT228_FN3),
- PINMUX_DATA(MSIOF1_RSCK_MARK, PORT229_FN1),
- PINMUX_DATA(SCIFA1_RTS2_MARK, PORT229_FN2),
- PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT230_FN1),
- PINMUX_DATA(I2C_SCL2_MARK, PORT230_FN3),
- PINMUX_DATA(MSIOF1_MCK0_MARK, PORT231_FN1),
- PINMUX_DATA(MSIOF1_MCK1_MARK, PORT232_FN1),
- PINMUX_DATA(MSIOF1_SS1_MARK, PORT233_FN1),
- PINMUX_DATA(EDBGREQ3_MARK, PORT233_FN2),
- PINMUX_DATA(MSIOF1_SS2_MARK, PORT234_FN1),
- PINMUX_DATA(PORT236_IROUT_MARK, PORT236_FN1),
- PINMUX_DATA(IRDA_OUT_MARK, PORT236_FN2),
- PINMUX_DATA(IRDA_IN_MARK, PORT237_FN2),
- PINMUX_DATA(IRDA_FIRSEL_MARK, PORT238_FN1),
- PINMUX_DATA(TPU1TO0_MARK, PORT239_FN3),
- PINMUX_DATA(TS_SPSYNC3_MARK, PORT239_FN4),
- PINMUX_DATA(TPU1TO1_MARK, PORT240_FN3),
- PINMUX_DATA(TS_SDAT3_MARK, PORT240_FN4),
- PINMUX_DATA(TPU1TO2_MARK, PORT241_FN3),
- PINMUX_DATA(TS_SDEN3_MARK, PORT241_FN4),
- PINMUX_DATA(PORT241_MSIOF2_SS1_MARK, PORT241_FN5),
- PINMUX_DATA(TPU1TO3_MARK, PORT242_FN3),
- PINMUX_DATA(PORT242_MSIOF2_TSCK_MARK, PORT242_FN5),
- PINMUX_DATA(M13_BSW_MARK, PORT243_FN2),
- PINMUX_DATA(PORT243_MSIOF2_TSYNC_MARK, PORT243_FN5),
- PINMUX_DATA(M14_GSW_MARK, PORT244_FN2),
- PINMUX_DATA(PORT244_MSIOF2_TXD_MARK, PORT244_FN5),
- PINMUX_DATA(PORT245_IROUT_MARK, PORT245_FN1),
- PINMUX_DATA(M15_RSW_MARK, PORT245_FN2),
- PINMUX_DATA(SOUT3_MARK, PORT246_FN1),
- PINMUX_DATA(SCIFA2_TXD1_MARK, PORT246_FN2),
- PINMUX_DATA(SIN3_MARK, PORT247_FN1),
- PINMUX_DATA(SCIFA2_RXD1_MARK, PORT247_FN2),
- PINMUX_DATA(XRTS3_MARK, PORT248_FN1),
- PINMUX_DATA(SCIFA2_RTS1_MARK, PORT248_FN2),
- PINMUX_DATA(PORT248_MSIOF2_SS2_MARK, PORT248_FN5),
- PINMUX_DATA(XCTS3_MARK, PORT249_FN1),
- PINMUX_DATA(SCIFA2_CTS1_MARK, PORT249_FN2),
- PINMUX_DATA(PORT249_MSIOF2_RXD_MARK, PORT249_FN5),
- PINMUX_DATA(DINT_MARK, PORT250_FN1),
- PINMUX_DATA(SCIFA2_SCK1_MARK, PORT250_FN2),
- PINMUX_DATA(TS_SCK3_MARK, PORT250_FN4),
- PINMUX_DATA(SDHICLK0_MARK, PORT251_FN1),
- PINMUX_DATA(TCK2_MARK, PORT251_FN2),
- PINMUX_DATA(SDHICD0_MARK, PORT252_FN1),
- PINMUX_DATA(SDHID0_0_MARK, PORT253_FN1),
- PINMUX_DATA(TMS2_MARK, PORT253_FN2),
- PINMUX_DATA(SDHID0_1_MARK, PORT254_FN1),
- PINMUX_DATA(TDO2_MARK, PORT254_FN2),
- PINMUX_DATA(SDHID0_2_MARK, PORT255_FN1),
- PINMUX_DATA(TDI2_MARK, PORT255_FN2),
- PINMUX_DATA(SDHID0_3_MARK, PORT256_FN1),
- PINMUX_DATA(RTCK2_MARK, PORT256_FN2),
-
- /* 49-6 (FN) */
- PINMUX_DATA(SDHICMD0_MARK, PORT257_FN1),
- PINMUX_DATA(TRST2_MARK, PORT257_FN2),
- PINMUX_DATA(SDHIWP0_MARK, PORT258_FN1),
- PINMUX_DATA(EDBGREQ2_MARK, PORT258_FN2),
- PINMUX_DATA(SDHICLK1_MARK, PORT259_FN1),
- PINMUX_DATA(TCK3_MARK, PORT259_FN4),
- PINMUX_DATA(SDHID1_0_MARK, PORT260_FN1),
- PINMUX_DATA(M11_SLCD_SO2_MARK, PORT260_FN2),
- PINMUX_DATA(TS_SPSYNC2_MARK, PORT260_FN3),
- PINMUX_DATA(TMS3_MARK, PORT260_FN4),
- PINMUX_DATA(SDHID1_1_MARK, PORT261_FN1),
- PINMUX_DATA(M9_SLCD_AO2_MARK, PORT261_FN2),
- PINMUX_DATA(TS_SDAT2_MARK, PORT261_FN3),
- PINMUX_DATA(TDO3_MARK, PORT261_FN4),
- PINMUX_DATA(SDHID1_2_MARK, PORT262_FN1),
- PINMUX_DATA(M10_SLCD_CK2_MARK, PORT262_FN2),
- PINMUX_DATA(TS_SDEN2_MARK, PORT262_FN3),
- PINMUX_DATA(TDI3_MARK, PORT262_FN4),
- PINMUX_DATA(SDHID1_3_MARK, PORT263_FN1),
- PINMUX_DATA(M12_SLCD_CE2_MARK, PORT263_FN2),
- PINMUX_DATA(TS_SCK2_MARK, PORT263_FN3),
- PINMUX_DATA(RTCK3_MARK, PORT263_FN4),
- PINMUX_DATA(SDHICMD1_MARK, PORT264_FN1),
- PINMUX_DATA(TRST3_MARK, PORT264_FN4),
- PINMUX_DATA(SDHICLK2_MARK, PORT265_FN1),
- PINMUX_DATA(SCIFB_SCK_MARK, PORT265_FN2),
- PINMUX_DATA(SDHID2_0_MARK, PORT266_FN1),
- PINMUX_DATA(SCIFB_TXD_MARK, PORT266_FN2),
- PINMUX_DATA(SDHID2_1_MARK, PORT267_FN1),
- PINMUX_DATA(SCIFB_CTS_MARK, PORT267_FN2),
- PINMUX_DATA(SDHID2_2_MARK, PORT268_FN1),
- PINMUX_DATA(SCIFB_RXD_MARK, PORT268_FN2),
- PINMUX_DATA(SDHID2_3_MARK, PORT269_FN1),
- PINMUX_DATA(SCIFB_RTS_MARK, PORT269_FN2),
- PINMUX_DATA(SDHICMD2_MARK, PORT270_FN1),
- PINMUX_DATA(RESETOUTS_MARK, PORT271_FN1),
- PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1),
-};
-
-static struct pinmux_gpio pinmux_gpios[] = {
- /* 49-1 -> 49-6 (GPIO) */
- GPIO_PORT_ALL(),
-
- /* Special Pull-up / Pull-down Functions */
- GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU),
- GPIO_FN(PORT50_KEYIN2_PU), GPIO_FN(PORT55_KEYIN3_PU),
- GPIO_FN(PORT56_KEYIN4_PU), GPIO_FN(PORT57_KEYIN5_PU),
- GPIO_FN(PORT58_KEYIN6_PU),
-
- /* 49-1 (FN) */
- GPIO_FN(VBUS0), GPIO_FN(CPORT0), GPIO_FN(CPORT1), GPIO_FN(CPORT2),
- GPIO_FN(CPORT3), GPIO_FN(CPORT4), GPIO_FN(CPORT5), GPIO_FN(CPORT6),
- GPIO_FN(CPORT7), GPIO_FN(CPORT8), GPIO_FN(CPORT9), GPIO_FN(CPORT10),
- GPIO_FN(CPORT11), GPIO_FN(SIN2), GPIO_FN(CPORT12), GPIO_FN(XCTS2),
- GPIO_FN(CPORT13), GPIO_FN(RFSPO4), GPIO_FN(CPORT14), GPIO_FN(RFSPO5),
- GPIO_FN(CPORT15), GPIO_FN(CPORT16), GPIO_FN(CPORT17), GPIO_FN(SOUT2),
- GPIO_FN(CPORT18), GPIO_FN(XRTS2), GPIO_FN(CPORT19), GPIO_FN(CPORT20),
- GPIO_FN(RFSPO6), GPIO_FN(CPORT21), GPIO_FN(STATUS0), GPIO_FN(CPORT22),
- GPIO_FN(STATUS1), GPIO_FN(CPORT23), GPIO_FN(STATUS2), GPIO_FN(RFSPO7),
- GPIO_FN(MPORT0), GPIO_FN(MPORT1), GPIO_FN(B_SYNLD1), GPIO_FN(B_SYNLD2),
- GPIO_FN(XMAINPS), GPIO_FN(XDIVPS), GPIO_FN(XIDRST), GPIO_FN(IDCLK),
- GPIO_FN(IDIO), GPIO_FN(SOUT1), GPIO_FN(SCIFA4_TXD),
- GPIO_FN(M02_BERDAT), GPIO_FN(SIN1), GPIO_FN(SCIFA4_RXD), GPIO_FN(XWUP),
- GPIO_FN(XRTS1), GPIO_FN(SCIFA4_RTS), GPIO_FN(M03_BERCLK),
- GPIO_FN(XCTS1), GPIO_FN(SCIFA4_CTS),
-
- /* 49-2 (FN) */
- GPIO_FN(HSU_IQ_AGC6), GPIO_FN(MFG2_IN2), GPIO_FN(MSIOF2_MCK0),
- GPIO_FN(HSU_IQ_AGC5), GPIO_FN(MFG2_IN1), GPIO_FN(MSIOF2_MCK1),
- GPIO_FN(HSU_IQ_AGC4), GPIO_FN(MSIOF2_RSYNC),
- GPIO_FN(HSU_IQ_AGC3), GPIO_FN(MFG2_OUT1), GPIO_FN(MSIOF2_RSCK),
- GPIO_FN(HSU_IQ_AGC2), GPIO_FN(PORT42_KEYOUT0),
- GPIO_FN(HSU_IQ_AGC1), GPIO_FN(PORT43_KEYOUT1),
- GPIO_FN(HSU_IQ_AGC0), GPIO_FN(PORT44_KEYOUT2),
- GPIO_FN(HSU_IQ_AGC_ST), GPIO_FN(PORT45_KEYOUT3),
- GPIO_FN(HSU_IQ_PDO), GPIO_FN(PORT46_KEYOUT4),
- GPIO_FN(HSU_IQ_PYO), GPIO_FN(PORT47_KEYOUT5),
- GPIO_FN(HSU_EN_TXMUX_G3MO), GPIO_FN(PORT48_KEYIN0),
- GPIO_FN(HSU_I_TXMUX_G3MO), GPIO_FN(PORT49_KEYIN1),
- GPIO_FN(HSU_Q_TXMUX_G3MO), GPIO_FN(PORT50_KEYIN2),
- GPIO_FN(HSU_SYO), GPIO_FN(PORT51_MSIOF2_TSYNC),
- GPIO_FN(HSU_SDO), GPIO_FN(PORT52_MSIOF2_TSCK),
- GPIO_FN(HSU_TGTTI_G3MO), GPIO_FN(PORT53_MSIOF2_TXD),
- GPIO_FN(B_TIME_STAMP), GPIO_FN(PORT54_MSIOF2_RXD),
- GPIO_FN(HSU_SDI), GPIO_FN(PORT55_KEYIN3),
- GPIO_FN(HSU_SCO), GPIO_FN(PORT56_KEYIN4),
- GPIO_FN(HSU_DREQ), GPIO_FN(PORT57_KEYIN5),
- GPIO_FN(HSU_DACK), GPIO_FN(PORT58_KEYIN6),
- GPIO_FN(HSU_CLK61M), GPIO_FN(PORT59_MSIOF2_SS1),
- GPIO_FN(HSU_XRST), GPIO_FN(PORT60_MSIOF2_SS2),
- GPIO_FN(PCMCLKO), GPIO_FN(SYNC8KO), GPIO_FN(DNPCM_A), GPIO_FN(UPPCM_A),
- GPIO_FN(XTALB1L),
- GPIO_FN(GPS_AGC1), GPIO_FN(SCIFA0_RTS),
- GPIO_FN(GPS_AGC2), GPIO_FN(SCIFA0_SCK),
- GPIO_FN(GPS_AGC3), GPIO_FN(SCIFA0_TXD),
- GPIO_FN(GPS_AGC4), GPIO_FN(SCIFA0_RXD),
- GPIO_FN(GPS_PWRD), GPIO_FN(SCIFA0_CTS),
- GPIO_FN(GPS_IM), GPIO_FN(GPS_IS), GPIO_FN(GPS_QM), GPIO_FN(GPS_QS),
- GPIO_FN(SIUBOMC), GPIO_FN(TPU2TO0),
- GPIO_FN(SIUCKB), GPIO_FN(TPU2TO1),
- GPIO_FN(SIUBOLR), GPIO_FN(BBIF2_TSYNC), GPIO_FN(TPU2TO2),
- GPIO_FN(SIUBOBT), GPIO_FN(BBIF2_TSCK), GPIO_FN(TPU2TO3),
- GPIO_FN(SIUBOSLD), GPIO_FN(BBIF2_TXD), GPIO_FN(TPU3TO0),
- GPIO_FN(SIUBILR), GPIO_FN(TPU3TO1),
- GPIO_FN(SIUBIBT), GPIO_FN(TPU3TO2),
- GPIO_FN(SIUBISLD), GPIO_FN(TPU3TO3),
- GPIO_FN(NMI), GPIO_FN(TPU4TO0),
- GPIO_FN(DNPCM_M), GPIO_FN(TPU4TO1), GPIO_FN(TPU4TO2), GPIO_FN(TPU4TO3),
- GPIO_FN(IRQ_TMPB),
- GPIO_FN(PWEN), GPIO_FN(MFG1_OUT1),
- GPIO_FN(OVCN), GPIO_FN(MFG1_IN1),
- GPIO_FN(OVCN2), GPIO_FN(MFG1_IN2),
-
- /* 49-3 (FN) */
- GPIO_FN(RFSPO1), GPIO_FN(RFSPO2), GPIO_FN(RFSPO3),
- GPIO_FN(PORT93_VIO_CKO2),
- GPIO_FN(USBTERM), GPIO_FN(EXTLP), GPIO_FN(IDIN),
- GPIO_FN(SCIFA5_CTS), GPIO_FN(MFG0_IN1),
- GPIO_FN(SCIFA5_RTS), GPIO_FN(MFG0_IN2),
- GPIO_FN(SCIFA5_RXD),
- GPIO_FN(SCIFA5_TXD),
- GPIO_FN(SCIFA5_SCK), GPIO_FN(MFG0_OUT1),
- GPIO_FN(A0_EA0), GPIO_FN(BS),
- GPIO_FN(A14_EA14), GPIO_FN(PORT102_KEYOUT0),
- GPIO_FN(A15_EA15), GPIO_FN(PORT103_KEYOUT1), GPIO_FN(DV_CLKOL),
- GPIO_FN(A16_EA16), GPIO_FN(PORT104_KEYOUT2),
- GPIO_FN(DV_VSYNCL), GPIO_FN(MSIOF0_SS1),
- GPIO_FN(A17_EA17), GPIO_FN(PORT105_KEYOUT3),
- GPIO_FN(DV_HSYNCL), GPIO_FN(MSIOF0_TSYNC),
- GPIO_FN(A18_EA18), GPIO_FN(PORT106_KEYOUT4),
- GPIO_FN(DV_DL0), GPIO_FN(MSIOF0_TSCK),
- GPIO_FN(A19_EA19), GPIO_FN(PORT107_KEYOUT5),
- GPIO_FN(DV_DL1), GPIO_FN(MSIOF0_TXD),
- GPIO_FN(A20_EA20), GPIO_FN(PORT108_KEYIN0),
- GPIO_FN(DV_DL2), GPIO_FN(MSIOF0_RSCK),
- GPIO_FN(A21_EA21), GPIO_FN(PORT109_KEYIN1),
- GPIO_FN(DV_DL3), GPIO_FN(MSIOF0_RSYNC),
- GPIO_FN(A22_EA22), GPIO_FN(PORT110_KEYIN2),
- GPIO_FN(DV_DL4), GPIO_FN(MSIOF0_MCK0),
- GPIO_FN(A23_EA23), GPIO_FN(PORT111_KEYIN3),
- GPIO_FN(DV_DL5), GPIO_FN(MSIOF0_MCK1),
- GPIO_FN(A24_EA24), GPIO_FN(PORT112_KEYIN4),
- GPIO_FN(DV_DL6), GPIO_FN(MSIOF0_RXD),
- GPIO_FN(A25_EA25), GPIO_FN(PORT113_KEYIN5),
- GPIO_FN(DV_DL7), GPIO_FN(MSIOF0_SS2),
- GPIO_FN(A26), GPIO_FN(PORT113_KEYIN6), GPIO_FN(DV_CLKIL),
- GPIO_FN(D0_ED0_NAF0), GPIO_FN(D1_ED1_NAF1), GPIO_FN(D2_ED2_NAF2),
- GPIO_FN(D3_ED3_NAF3), GPIO_FN(D4_ED4_NAF4), GPIO_FN(D5_ED5_NAF5),
- GPIO_FN(D6_ED6_NAF6), GPIO_FN(D7_ED7_NAF7), GPIO_FN(D8_ED8_NAF8),
- GPIO_FN(D9_ED9_NAF9), GPIO_FN(D10_ED10_NAF10), GPIO_FN(D11_ED11_NAF11),
- GPIO_FN(D12_ED12_NAF12), GPIO_FN(D13_ED13_NAF13),
- GPIO_FN(D14_ED14_NAF14), GPIO_FN(D15_ED15_NAF15),
- GPIO_FN(CS4), GPIO_FN(CS5A), GPIO_FN(CS5B), GPIO_FN(FCE1),
- GPIO_FN(CS6B), GPIO_FN(XCS2), GPIO_FN(FCE0), GPIO_FN(CS6A),
- GPIO_FN(DACK0), GPIO_FN(WAIT), GPIO_FN(DREQ0), GPIO_FN(RD_XRD),
- GPIO_FN(A27), GPIO_FN(RDWR_XWE), GPIO_FN(WE0_XWR0_FWE),
- GPIO_FN(WE1_XWR1), GPIO_FN(FRB), GPIO_FN(CKO),
- GPIO_FN(NBRSTOUT), GPIO_FN(NBRST),
-
- /* 49-4 (FN) */
- GPIO_FN(RFSPO0), GPIO_FN(PORT146_VIO_CKO2), GPIO_FN(TSTMD),
- GPIO_FN(VIO_VD), GPIO_FN(VIO_HD),
- GPIO_FN(VIO_D0), GPIO_FN(VIO_D1), GPIO_FN(VIO_D2),
- GPIO_FN(VIO_D3), GPIO_FN(VIO_D4), GPIO_FN(VIO_D5),
- GPIO_FN(VIO_D6), GPIO_FN(VIO_D7), GPIO_FN(VIO_D8),
- GPIO_FN(VIO_D9), GPIO_FN(VIO_D10), GPIO_FN(VIO_D11),
- GPIO_FN(VIO_D12), GPIO_FN(VIO_D13), GPIO_FN(VIO_D14),
- GPIO_FN(VIO_D15), GPIO_FN(VIO_CLK), GPIO_FN(VIO_FIELD),
- GPIO_FN(VIO_CKO),
- GPIO_FN(MFG3_IN1), GPIO_FN(MFG3_IN2),
- GPIO_FN(M9_SLCD_A01), GPIO_FN(MFG3_OUT1), GPIO_FN(TPU0TO0),
- GPIO_FN(M10_SLCD_CK1), GPIO_FN(MFG4_IN1), GPIO_FN(TPU0TO1),
- GPIO_FN(M11_SLCD_SO1), GPIO_FN(MFG4_IN2), GPIO_FN(TPU0TO2),
- GPIO_FN(M12_SLCD_CE1), GPIO_FN(MFG4_OUT1), GPIO_FN(TPU0TO3),
- GPIO_FN(LCDD0), GPIO_FN(PORT175_KEYOUT0), GPIO_FN(DV_D0),
- GPIO_FN(SIUCKA), GPIO_FN(MFG0_OUT2),
- GPIO_FN(LCDD1), GPIO_FN(PORT176_KEYOUT1), GPIO_FN(DV_D1),
- GPIO_FN(SIUAOLR), GPIO_FN(BBIF2_TSYNC1),
- GPIO_FN(LCDD2), GPIO_FN(PORT177_KEYOUT2), GPIO_FN(DV_D2),
- GPIO_FN(SIUAOBT), GPIO_FN(BBIF2_TSCK1),
- GPIO_FN(LCDD3), GPIO_FN(PORT178_KEYOUT3), GPIO_FN(DV_D3),
- GPIO_FN(SIUAOSLD), GPIO_FN(BBIF2_TXD1),
- GPIO_FN(LCDD4), GPIO_FN(PORT179_KEYOUT4), GPIO_FN(DV_D4),
- GPIO_FN(SIUAISPD), GPIO_FN(MFG1_OUT2),
- GPIO_FN(LCDD5), GPIO_FN(PORT180_KEYOUT5), GPIO_FN(DV_D5),
- GPIO_FN(SIUAILR), GPIO_FN(MFG2_OUT2),
- GPIO_FN(LCDD6), GPIO_FN(DV_D6),
- GPIO_FN(SIUAIBT), GPIO_FN(MFG3_OUT2), GPIO_FN(XWR2),
- GPIO_FN(LCDD7), GPIO_FN(DV_D7),
- GPIO_FN(SIUAISLD), GPIO_FN(MFG4_OUT2), GPIO_FN(XWR3),
- GPIO_FN(LCDD8), GPIO_FN(DV_D8), GPIO_FN(D16), GPIO_FN(ED16),
- GPIO_FN(LCDD9), GPIO_FN(DV_D9), GPIO_FN(D17), GPIO_FN(ED17),
- GPIO_FN(LCDD10), GPIO_FN(DV_D10), GPIO_FN(D18), GPIO_FN(ED18),
- GPIO_FN(LCDD11), GPIO_FN(DV_D11), GPIO_FN(D19), GPIO_FN(ED19),
- GPIO_FN(LCDD12), GPIO_FN(DV_D12), GPIO_FN(D20), GPIO_FN(ED20),
- GPIO_FN(LCDD13), GPIO_FN(DV_D13), GPIO_FN(D21), GPIO_FN(ED21),
- GPIO_FN(LCDD14), GPIO_FN(DV_D14), GPIO_FN(D22), GPIO_FN(ED22),
- GPIO_FN(LCDD15), GPIO_FN(DV_D15), GPIO_FN(D23), GPIO_FN(ED23),
- GPIO_FN(LCDD16), GPIO_FN(DV_HSYNC), GPIO_FN(D24), GPIO_FN(ED24),
- GPIO_FN(LCDD17), GPIO_FN(DV_VSYNC), GPIO_FN(D25), GPIO_FN(ED25),
- GPIO_FN(LCDD18), GPIO_FN(DREQ2), GPIO_FN(MSIOF0L_TSCK),
- GPIO_FN(D26), GPIO_FN(ED26),
- GPIO_FN(LCDD19), GPIO_FN(MSIOF0L_TSYNC),
- GPIO_FN(D27), GPIO_FN(ED27),
- GPIO_FN(LCDD20), GPIO_FN(TS_SPSYNC1), GPIO_FN(MSIOF0L_MCK0),
- GPIO_FN(D28), GPIO_FN(ED28),
- GPIO_FN(LCDD21), GPIO_FN(TS_SDAT1), GPIO_FN(MSIOF0L_MCK1),
- GPIO_FN(D29), GPIO_FN(ED29),
- GPIO_FN(LCDD22), GPIO_FN(TS_SDEN1), GPIO_FN(MSIOF0L_SS1),
- GPIO_FN(D30), GPIO_FN(ED30),
- GPIO_FN(LCDD23), GPIO_FN(TS_SCK1), GPIO_FN(MSIOF0L_SS2),
- GPIO_FN(D31), GPIO_FN(ED31),
- GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(DV_CKO), GPIO_FN(SIUAOSPD),
- GPIO_FN(LCDRD), GPIO_FN(DACK2), GPIO_FN(MSIOF0L_RSYNC),
-
- /* 49-5 (FN) */
- GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDCS2), GPIO_FN(DACK3),
- GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(DREQ3), GPIO_FN(MSIOF0L_RSCK),
- GPIO_FN(LCDCSYN), GPIO_FN(LCDCSYN2), GPIO_FN(DV_CKI),
- GPIO_FN(LCDLCLK), GPIO_FN(DREQ1), GPIO_FN(MSIOF0L_RXD),
- GPIO_FN(LCDDON), GPIO_FN(LCDDON2), GPIO_FN(DACK1), GPIO_FN(MSIOF0L_TXD),
- GPIO_FN(VIO_DR0), GPIO_FN(VIO_DR1), GPIO_FN(VIO_DR2), GPIO_FN(VIO_DR3),
- GPIO_FN(VIO_DR4), GPIO_FN(VIO_DR5), GPIO_FN(VIO_DR6), GPIO_FN(VIO_DR7),
- GPIO_FN(VIO_VDR), GPIO_FN(VIO_HDR),
- GPIO_FN(VIO_CLKR), GPIO_FN(VIO_CKOR),
- GPIO_FN(SCIFA1_TXD), GPIO_FN(GPS_PGFA0),
- GPIO_FN(SCIFA1_SCK), GPIO_FN(GPS_PGFA1),
- GPIO_FN(SCIFA1_RTS), GPIO_FN(GPS_EPPSINMON),
- GPIO_FN(SCIFA1_RXD), GPIO_FN(SCIFA1_CTS),
- GPIO_FN(MSIOF1_TXD), GPIO_FN(SCIFA1_TXD2), GPIO_FN(GPS_TXD),
- GPIO_FN(MSIOF1_TSYNC), GPIO_FN(SCIFA1_CTS2), GPIO_FN(I2C_SDA2),
- GPIO_FN(MSIOF1_TSCK), GPIO_FN(SCIFA1_SCK2),
- GPIO_FN(MSIOF1_RXD), GPIO_FN(SCIFA1_RXD2), GPIO_FN(GPS_RXD),
- GPIO_FN(MSIOF1_RSCK), GPIO_FN(SCIFA1_RTS2),
- GPIO_FN(MSIOF1_RSYNC), GPIO_FN(I2C_SCL2),
- GPIO_FN(MSIOF1_MCK0), GPIO_FN(MSIOF1_MCK1),
- GPIO_FN(MSIOF1_SS1), GPIO_FN(EDBGREQ3),
- GPIO_FN(MSIOF1_SS2),
- GPIO_FN(PORT236_IROUT), GPIO_FN(IRDA_OUT),
- GPIO_FN(IRDA_IN), GPIO_FN(IRDA_FIRSEL),
- GPIO_FN(TPU1TO0), GPIO_FN(TS_SPSYNC3),
- GPIO_FN(TPU1TO1), GPIO_FN(TS_SDAT3),
- GPIO_FN(TPU1TO2), GPIO_FN(TS_SDEN3), GPIO_FN(PORT241_MSIOF2_SS1),
- GPIO_FN(TPU1TO3), GPIO_FN(PORT242_MSIOF2_TSCK),
- GPIO_FN(M13_BSW), GPIO_FN(PORT243_MSIOF2_TSYNC),
- GPIO_FN(M14_GSW), GPIO_FN(PORT244_MSIOF2_TXD),
- GPIO_FN(PORT245_IROUT), GPIO_FN(M15_RSW),
- GPIO_FN(SOUT3), GPIO_FN(SCIFA2_TXD1),
- GPIO_FN(SIN3), GPIO_FN(SCIFA2_RXD1),
- GPIO_FN(XRTS3), GPIO_FN(SCIFA2_RTS1), GPIO_FN(PORT248_MSIOF2_SS2),
- GPIO_FN(XCTS3), GPIO_FN(SCIFA2_CTS1), GPIO_FN(PORT249_MSIOF2_RXD),
- GPIO_FN(DINT), GPIO_FN(SCIFA2_SCK1), GPIO_FN(TS_SCK3),
- GPIO_FN(SDHICLK0), GPIO_FN(TCK2),
- GPIO_FN(SDHICD0),
- GPIO_FN(SDHID0_0), GPIO_FN(TMS2),
- GPIO_FN(SDHID0_1), GPIO_FN(TDO2),
- GPIO_FN(SDHID0_2), GPIO_FN(TDI2),
- GPIO_FN(SDHID0_3), GPIO_FN(RTCK2),
-
- /* 49-6 (FN) */
- GPIO_FN(SDHICMD0), GPIO_FN(TRST2),
- GPIO_FN(SDHIWP0), GPIO_FN(EDBGREQ2),
- GPIO_FN(SDHICLK1), GPIO_FN(TCK3),
- GPIO_FN(SDHID1_0), GPIO_FN(M11_SLCD_SO2),
- GPIO_FN(TS_SPSYNC2), GPIO_FN(TMS3),
- GPIO_FN(SDHID1_1), GPIO_FN(M9_SLCD_AO2),
- GPIO_FN(TS_SDAT2), GPIO_FN(TDO3),
- GPIO_FN(SDHID1_2), GPIO_FN(M10_SLCD_CK2),
- GPIO_FN(TS_SDEN2), GPIO_FN(TDI3),
- GPIO_FN(SDHID1_3), GPIO_FN(M12_SLCD_CE2),
- GPIO_FN(TS_SCK2), GPIO_FN(RTCK3),
- GPIO_FN(SDHICMD1), GPIO_FN(TRST3),
- GPIO_FN(SDHICLK2), GPIO_FN(SCIFB_SCK),
- GPIO_FN(SDHID2_0), GPIO_FN(SCIFB_TXD),
- GPIO_FN(SDHID2_1), GPIO_FN(SCIFB_CTS),
- GPIO_FN(SDHID2_2), GPIO_FN(SCIFB_RXD),
- GPIO_FN(SDHID2_3), GPIO_FN(SCIFB_RTS),
- GPIO_FN(SDHICMD2),
- GPIO_FN(RESETOUTS),
- GPIO_FN(DIVLOCK),
-};
-
-static struct pinmux_cfg_reg pinmux_config_regs[] = {
- PORTCR(0, 0xe6050000), /* PORT0CR */
- PORTCR(1, 0xe6050001), /* PORT1CR */
- PORTCR(2, 0xe6050002), /* PORT2CR */
- PORTCR(3, 0xe6050003), /* PORT3CR */
- PORTCR(4, 0xe6050004), /* PORT4CR */
- PORTCR(5, 0xe6050005), /* PORT5CR */
- PORTCR(6, 0xe6050006), /* PORT6CR */
- PORTCR(7, 0xe6050007), /* PORT7CR */
- PORTCR(8, 0xe6050008), /* PORT8CR */
- PORTCR(9, 0xe6050009), /* PORT9CR */
-
- PORTCR(10, 0xe605000a), /* PORT10CR */
- PORTCR(11, 0xe605000b), /* PORT11CR */
- PORTCR(12, 0xe605000c), /* PORT12CR */
- PORTCR(13, 0xe605000d), /* PORT13CR */
- PORTCR(14, 0xe605000e), /* PORT14CR */
- PORTCR(15, 0xe605000f), /* PORT15CR */
- PORTCR(16, 0xe6050010), /* PORT16CR */
- PORTCR(17, 0xe6050011), /* PORT17CR */
- PORTCR(18, 0xe6050012), /* PORT18CR */
- PORTCR(19, 0xe6050013), /* PORT19CR */
-
- PORTCR(20, 0xe6050014), /* PORT20CR */
- PORTCR(21, 0xe6050015), /* PORT21CR */
- PORTCR(22, 0xe6050016), /* PORT22CR */
- PORTCR(23, 0xe6050017), /* PORT23CR */
- PORTCR(24, 0xe6050018), /* PORT24CR */
- PORTCR(25, 0xe6050019), /* PORT25CR */
- PORTCR(26, 0xe605001a), /* PORT26CR */
- PORTCR(27, 0xe605001b), /* PORT27CR */
- PORTCR(28, 0xe605001c), /* PORT28CR */
- PORTCR(29, 0xe605001d), /* PORT29CR */
-
- PORTCR(30, 0xe605001e), /* PORT30CR */
- PORTCR(31, 0xe605001f), /* PORT31CR */
- PORTCR(32, 0xe6050020), /* PORT32CR */
- PORTCR(33, 0xe6050021), /* PORT33CR */
- PORTCR(34, 0xe6050022), /* PORT34CR */
- PORTCR(35, 0xe6050023), /* PORT35CR */
- PORTCR(36, 0xe6050024), /* PORT36CR */
- PORTCR(37, 0xe6050025), /* PORT37CR */
- PORTCR(38, 0xe6050026), /* PORT38CR */
- PORTCR(39, 0xe6050027), /* PORT39CR */
-
- PORTCR(40, 0xe6050028), /* PORT40CR */
- PORTCR(41, 0xe6050029), /* PORT41CR */
- PORTCR(42, 0xe605002a), /* PORT42CR */
- PORTCR(43, 0xe605002b), /* PORT43CR */
- PORTCR(44, 0xe605002c), /* PORT44CR */
- PORTCR(45, 0xe605002d), /* PORT45CR */
- PORTCR(46, 0xe605002e), /* PORT46CR */
- PORTCR(47, 0xe605002f), /* PORT47CR */
- PORTCR(48, 0xe6050030), /* PORT48CR */
- PORTCR(49, 0xe6050031), /* PORT49CR */
-
- PORTCR(50, 0xe6050032), /* PORT50CR */
- PORTCR(51, 0xe6050033), /* PORT51CR */
- PORTCR(52, 0xe6050034), /* PORT52CR */
- PORTCR(53, 0xe6050035), /* PORT53CR */
- PORTCR(54, 0xe6050036), /* PORT54CR */
- PORTCR(55, 0xe6050037), /* PORT55CR */
- PORTCR(56, 0xe6050038), /* PORT56CR */
- PORTCR(57, 0xe6050039), /* PORT57CR */
- PORTCR(58, 0xe605003a), /* PORT58CR */
- PORTCR(59, 0xe605003b), /* PORT59CR */
-
- PORTCR(60, 0xe605003c), /* PORT60CR */
- PORTCR(61, 0xe605003d), /* PORT61CR */
- PORTCR(62, 0xe605003e), /* PORT62CR */
- PORTCR(63, 0xe605003f), /* PORT63CR */
- PORTCR(64, 0xe6050040), /* PORT64CR */
- PORTCR(65, 0xe6050041), /* PORT65CR */
- PORTCR(66, 0xe6050042), /* PORT66CR */
- PORTCR(67, 0xe6050043), /* PORT67CR */
- PORTCR(68, 0xe6050044), /* PORT68CR */
- PORTCR(69, 0xe6050045), /* PORT69CR */
-
- PORTCR(70, 0xe6050046), /* PORT70CR */
- PORTCR(71, 0xe6050047), /* PORT71CR */
- PORTCR(72, 0xe6050048), /* PORT72CR */
- PORTCR(73, 0xe6050049), /* PORT73CR */
- PORTCR(74, 0xe605004a), /* PORT74CR */
- PORTCR(75, 0xe605004b), /* PORT75CR */
- PORTCR(76, 0xe605004c), /* PORT76CR */
- PORTCR(77, 0xe605004d), /* PORT77CR */
- PORTCR(78, 0xe605004e), /* PORT78CR */
- PORTCR(79, 0xe605004f), /* PORT79CR */
-
- PORTCR(80, 0xe6050050), /* PORT80CR */
- PORTCR(81, 0xe6050051), /* PORT81CR */
- PORTCR(82, 0xe6050052), /* PORT82CR */
- PORTCR(83, 0xe6050053), /* PORT83CR */
- PORTCR(84, 0xe6050054), /* PORT84CR */
- PORTCR(85, 0xe6050055), /* PORT85CR */
- PORTCR(86, 0xe6050056), /* PORT86CR */
- PORTCR(87, 0xe6050057), /* PORT87CR */
- PORTCR(88, 0xe6051058), /* PORT88CR */
- PORTCR(89, 0xe6051059), /* PORT89CR */
-
- PORTCR(90, 0xe605105a), /* PORT90CR */
- PORTCR(91, 0xe605105b), /* PORT91CR */
- PORTCR(92, 0xe605105c), /* PORT92CR */
- PORTCR(93, 0xe605105d), /* PORT93CR */
- PORTCR(94, 0xe605105e), /* PORT94CR */
- PORTCR(95, 0xe605105f), /* PORT95CR */
- PORTCR(96, 0xe6051060), /* PORT96CR */
- PORTCR(97, 0xe6051061), /* PORT97CR */
- PORTCR(98, 0xe6051062), /* PORT98CR */
- PORTCR(99, 0xe6051063), /* PORT99CR */
-
- PORTCR(100, 0xe6051064), /* PORT100CR */
- PORTCR(101, 0xe6051065), /* PORT101CR */
- PORTCR(102, 0xe6051066), /* PORT102CR */
- PORTCR(103, 0xe6051067), /* PORT103CR */
- PORTCR(104, 0xe6051068), /* PORT104CR */
- PORTCR(105, 0xe6051069), /* PORT105CR */
- PORTCR(106, 0xe605106a), /* PORT106CR */
- PORTCR(107, 0xe605106b), /* PORT107CR */
- PORTCR(108, 0xe605106c), /* PORT108CR */
- PORTCR(109, 0xe605106d), /* PORT109CR */
-
- PORTCR(110, 0xe605106e), /* PORT110CR */
- PORTCR(111, 0xe605106f), /* PORT111CR */
- PORTCR(112, 0xe6051070), /* PORT112CR */
- PORTCR(113, 0xe6051071), /* PORT113CR */
- PORTCR(114, 0xe6051072), /* PORT114CR */
- PORTCR(115, 0xe6051073), /* PORT115CR */
- PORTCR(116, 0xe6051074), /* PORT116CR */
- PORTCR(117, 0xe6051075), /* PORT117CR */
- PORTCR(118, 0xe6051076), /* PORT118CR */
- PORTCR(119, 0xe6051077), /* PORT119CR */
-
- PORTCR(120, 0xe6051078), /* PORT120CR */
- PORTCR(121, 0xe6051079), /* PORT121CR */
- PORTCR(122, 0xe605107a), /* PORT122CR */
- PORTCR(123, 0xe605107b), /* PORT123CR */
- PORTCR(124, 0xe605107c), /* PORT124CR */
- PORTCR(125, 0xe605107d), /* PORT125CR */
- PORTCR(126, 0xe605107e), /* PORT126CR */
- PORTCR(127, 0xe605107f), /* PORT127CR */
- PORTCR(128, 0xe6051080), /* PORT128CR */
- PORTCR(129, 0xe6051081), /* PORT129CR */
-
- PORTCR(130, 0xe6051082), /* PORT130CR */
- PORTCR(131, 0xe6051083), /* PORT131CR */
- PORTCR(132, 0xe6051084), /* PORT132CR */
- PORTCR(133, 0xe6051085), /* PORT133CR */
- PORTCR(134, 0xe6051086), /* PORT134CR */
- PORTCR(135, 0xe6051087), /* PORT135CR */
- PORTCR(136, 0xe6051088), /* PORT136CR */
- PORTCR(137, 0xe6051089), /* PORT137CR */
- PORTCR(138, 0xe605108a), /* PORT138CR */
- PORTCR(139, 0xe605108b), /* PORT139CR */
-
- PORTCR(140, 0xe605108c), /* PORT140CR */
- PORTCR(141, 0xe605108d), /* PORT141CR */
- PORTCR(142, 0xe605108e), /* PORT142CR */
- PORTCR(143, 0xe605108f), /* PORT143CR */
- PORTCR(144, 0xe6051090), /* PORT144CR */
- PORTCR(145, 0xe6051091), /* PORT145CR */
- PORTCR(146, 0xe6051092), /* PORT146CR */
- PORTCR(147, 0xe6051093), /* PORT147CR */
- PORTCR(148, 0xe6051094), /* PORT148CR */
- PORTCR(149, 0xe6051095), /* PORT149CR */
-
- PORTCR(150, 0xe6051096), /* PORT150CR */
- PORTCR(151, 0xe6051097), /* PORT151CR */
- PORTCR(152, 0xe6051098), /* PORT152CR */
- PORTCR(153, 0xe6051099), /* PORT153CR */
- PORTCR(154, 0xe605109a), /* PORT154CR */
- PORTCR(155, 0xe605109b), /* PORT155CR */
- PORTCR(156, 0xe605109c), /* PORT156CR */
- PORTCR(157, 0xe605109d), /* PORT157CR */
- PORTCR(158, 0xe605109e), /* PORT158CR */
- PORTCR(159, 0xe605109f), /* PORT159CR */
-
- PORTCR(160, 0xe60510a0), /* PORT160CR */
- PORTCR(161, 0xe60510a1), /* PORT161CR */
- PORTCR(162, 0xe60510a2), /* PORT162CR */
- PORTCR(163, 0xe60510a3), /* PORT163CR */
- PORTCR(164, 0xe60510a4), /* PORT164CR */
- PORTCR(165, 0xe60510a5), /* PORT165CR */
- PORTCR(166, 0xe60510a6), /* PORT166CR */
- PORTCR(167, 0xe60510a7), /* PORT167CR */
- PORTCR(168, 0xe60510a8), /* PORT168CR */
- PORTCR(169, 0xe60510a9), /* PORT169CR */
-
- PORTCR(170, 0xe60510aa), /* PORT170CR */
- PORTCR(171, 0xe60510ab), /* PORT171CR */
- PORTCR(172, 0xe60510ac), /* PORT172CR */
- PORTCR(173, 0xe60510ad), /* PORT173CR */
- PORTCR(174, 0xe60510ae), /* PORT174CR */
- PORTCR(175, 0xe60520af), /* PORT175CR */
- PORTCR(176, 0xe60520b0), /* PORT176CR */
- PORTCR(177, 0xe60520b1), /* PORT177CR */
- PORTCR(178, 0xe60520b2), /* PORT178CR */
- PORTCR(179, 0xe60520b3), /* PORT179CR */
-
- PORTCR(180, 0xe60520b4), /* PORT180CR */
- PORTCR(181, 0xe60520b5), /* PORT181CR */
- PORTCR(182, 0xe60520b6), /* PORT182CR */
- PORTCR(183, 0xe60520b7), /* PORT183CR */
- PORTCR(184, 0xe60520b8), /* PORT184CR */
- PORTCR(185, 0xe60520b9), /* PORT185CR */
- PORTCR(186, 0xe60520ba), /* PORT186CR */
- PORTCR(187, 0xe60520bb), /* PORT187CR */
- PORTCR(188, 0xe60520bc), /* PORT188CR */
- PORTCR(189, 0xe60520bd), /* PORT189CR */
-
- PORTCR(190, 0xe60520be), /* PORT190CR */
- PORTCR(191, 0xe60520bf), /* PORT191CR */
- PORTCR(192, 0xe60520c0), /* PORT192CR */
- PORTCR(193, 0xe60520c1), /* PORT193CR */
- PORTCR(194, 0xe60520c2), /* PORT194CR */
- PORTCR(195, 0xe60520c3), /* PORT195CR */
- PORTCR(196, 0xe60520c4), /* PORT196CR */
- PORTCR(197, 0xe60520c5), /* PORT197CR */
- PORTCR(198, 0xe60520c6), /* PORT198CR */
- PORTCR(199, 0xe60520c7), /* PORT199CR */
-
- PORTCR(200, 0xe60520c8), /* PORT200CR */
- PORTCR(201, 0xe60520c9), /* PORT201CR */
- PORTCR(202, 0xe60520ca), /* PORT202CR */
- PORTCR(203, 0xe60520cb), /* PORT203CR */
- PORTCR(204, 0xe60520cc), /* PORT204CR */
- PORTCR(205, 0xe60520cd), /* PORT205CR */
- PORTCR(206, 0xe60520ce), /* PORT206CR */
- PORTCR(207, 0xe60520cf), /* PORT207CR */
- PORTCR(208, 0xe60520d0), /* PORT208CR */
- PORTCR(209, 0xe60520d1), /* PORT209CR */
-
- PORTCR(210, 0xe60520d2), /* PORT210CR */
- PORTCR(211, 0xe60520d3), /* PORT211CR */
- PORTCR(212, 0xe60520d4), /* PORT212CR */
- PORTCR(213, 0xe60520d5), /* PORT213CR */
- PORTCR(214, 0xe60520d6), /* PORT214CR */
- PORTCR(215, 0xe60520d7), /* PORT215CR */
- PORTCR(216, 0xe60520d8), /* PORT216CR */
- PORTCR(217, 0xe60520d9), /* PORT217CR */
- PORTCR(218, 0xe60520da), /* PORT218CR */
- PORTCR(219, 0xe60520db), /* PORT219CR */
-
- PORTCR(220, 0xe60520dc), /* PORT220CR */
- PORTCR(221, 0xe60520dd), /* PORT221CR */
- PORTCR(222, 0xe60520de), /* PORT222CR */
- PORTCR(223, 0xe60520df), /* PORT223CR */
- PORTCR(224, 0xe60520e0), /* PORT224CR */
- PORTCR(225, 0xe60520e1), /* PORT225CR */
- PORTCR(226, 0xe60520e2), /* PORT226CR */
- PORTCR(227, 0xe60520e3), /* PORT227CR */
- PORTCR(228, 0xe60520e4), /* PORT228CR */
- PORTCR(229, 0xe60520e5), /* PORT229CR */
-
- PORTCR(230, 0xe60520e6), /* PORT230CR */
- PORTCR(231, 0xe60520e7), /* PORT231CR */
- PORTCR(232, 0xe60520e8), /* PORT232CR */
- PORTCR(233, 0xe60520e9), /* PORT233CR */
- PORTCR(234, 0xe60520ea), /* PORT234CR */
- PORTCR(235, 0xe60520eb), /* PORT235CR */
- PORTCR(236, 0xe60530ec), /* PORT236CR */
- PORTCR(237, 0xe60530ed), /* PORT237CR */
- PORTCR(238, 0xe60530ee), /* PORT238CR */
- PORTCR(239, 0xe60530ef), /* PORT239CR */
-
- PORTCR(240, 0xe60530f0), /* PORT240CR */
- PORTCR(241, 0xe60530f1), /* PORT241CR */
- PORTCR(242, 0xe60530f2), /* PORT242CR */
- PORTCR(243, 0xe60530f3), /* PORT243CR */
- PORTCR(244, 0xe60530f4), /* PORT244CR */
- PORTCR(245, 0xe60530f5), /* PORT245CR */
- PORTCR(246, 0xe60530f6), /* PORT246CR */
- PORTCR(247, 0xe60530f7), /* PORT247CR */
- PORTCR(248, 0xe60530f8), /* PORT248CR */
- PORTCR(249, 0xe60530f9), /* PORT249CR */
-
- PORTCR(250, 0xe60530fa), /* PORT250CR */
- PORTCR(251, 0xe60530fb), /* PORT251CR */
- PORTCR(252, 0xe60530fc), /* PORT252CR */
- PORTCR(253, 0xe60530fd), /* PORT253CR */
- PORTCR(254, 0xe60530fe), /* PORT254CR */
- PORTCR(255, 0xe60530ff), /* PORT255CR */
- PORTCR(256, 0xe6053100), /* PORT256CR */
- PORTCR(257, 0xe6053101), /* PORT257CR */
- PORTCR(258, 0xe6053102), /* PORT258CR */
- PORTCR(259, 0xe6053103), /* PORT259CR */
-
- PORTCR(260, 0xe6053104), /* PORT260CR */
- PORTCR(261, 0xe6053105), /* PORT261CR */
- PORTCR(262, 0xe6053106), /* PORT262CR */
- PORTCR(263, 0xe6053107), /* PORT263CR */
- PORTCR(264, 0xe6053108), /* PORT264CR */
- PORTCR(265, 0xe6053109), /* PORT265CR */
- PORTCR(266, 0xe605310a), /* PORT266CR */
- PORTCR(267, 0xe605310b), /* PORT267CR */
- PORTCR(268, 0xe605310c), /* PORT268CR */
- PORTCR(269, 0xe605310d), /* PORT269CR */
-
- PORTCR(270, 0xe605310e), /* PORT270CR */
- PORTCR(271, 0xe605310f), /* PORT271CR */
- PORTCR(272, 0xe6053110), /* PORT272CR */
-
- { PINMUX_CFG_REG("MSELBCR", 0xe6058024, 32, 1) {
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- MSELBCR_MSEL2_0, MSELBCR_MSEL2_1,
- 0, 0,
- 0, 0 }
- },
- { },
-};
-
-static struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) {
- PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
- PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
- PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
- PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
- PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
- PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
- PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
- PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA }
- },
- { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054004, 32) {
- PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
- PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
- PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
- PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
- PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA,
- PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
- PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
- PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA }
- },
- { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054008, 32) {
- PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
- PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
- PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
- PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
- PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
- PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
- PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
- PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA }
- },
- { PINMUX_DATA_REG("PORTD127_096DR", 0xe6055004, 32) {
- PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
- PORT123_DATA, PORT122_DATA, PORT121_DATA, PORT120_DATA,
- PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
- PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
- PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
- PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
- PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
- PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA }
- },
- { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055008, 32) {
- PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
- PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
- PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
- PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
- PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
- PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
- PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
- PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA }
- },
- { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056000, 32) {
- PORT191_DATA, PORT190_DATA, PORT189_DATA, PORT188_DATA,
- PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
- PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
- PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA,
- PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
- PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
- PORT167_DATA, PORT166_DATA, PORT165_DATA, PORT164_DATA,
- PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA }
- },
- { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056004, 32) {
- PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA,
- PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA,
- PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA,
- PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA,
- PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA,
- PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
- PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
- PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA }
- },
- { PINMUX_DATA_REG("PORTU255_224DR", 0xe6057000, 32) {
- PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA,
- PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA,
- PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA,
- PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA,
- PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA,
- PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA,
- PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA,
- PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA }
- },
- { PINMUX_DATA_REG("PORTU287_256DR", 0xe6057004, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, PORT272_DATA,
- PORT271_DATA, PORT270_DATA, PORT269_DATA, PORT268_DATA,
- PORT267_DATA, PORT266_DATA, PORT265_DATA, PORT264_DATA,
- PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA,
- PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA }
- },
- { },
-};
-
-static struct pinmux_info sh7367_pinmux_info = {
- .name = "sh7367_pfc",
- .reserved_id = PINMUX_RESERVED,
- .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
- .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
- .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
- .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
- .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
- .first_gpio = GPIO_PORT0,
- .last_gpio = GPIO_FN_DIVLOCK,
-
- .gpios = pinmux_gpios,
- .cfg_regs = pinmux_config_regs,
- .data_regs = pinmux_data_regs,
-
- .gpio_data = pinmux_data,
- .gpio_data_size = ARRAY_SIZE(pinmux_data),
-};
-
-void sh7367_pinmux_init(void)
-{
- register_pinmux(&sh7367_pinmux_info);
-}
diff --git a/arch/arm/mach-shmobile/pfc-sh7377.c b/arch/arm/mach-shmobile/pfc-sh7377.c
deleted file mode 100644
index f3117f6..0000000
--- a/arch/arm/mach-shmobile/pfc-sh7377.c
+++ /dev/null
@@ -1,1688 +0,0 @@
-/*
- * sh7377 processor support - PFC hardware block
- *
- * Copyright (C) 2010 NISHIMOTO Hiroki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of the
- * License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sh_pfc.h>
-#include <mach/sh7377.h>
-
-#define CPU_ALL_PORT(fn, pfx, sfx) \
- PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
- PORT_10(fn, pfx##10, sfx), \
- PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
- PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
- PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
- PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
- PORT_1(fn, pfx##118, sfx), \
- PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
- PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \
- PORT_10(fn, pfx##15, sfx), \
- PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \
- PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \
- PORT_1(fn, pfx##164, sfx), \
- PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
- PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
- PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
- PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
- PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
- PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
- PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
- PORT_1(fn, pfx##260, sfx), PORT_1(fn, pfx##261, sfx), \
- PORT_1(fn, pfx##262, sfx), PORT_1(fn, pfx##263, sfx), \
- PORT_1(fn, pfx##264, sfx)
-
-enum {
- PINMUX_RESERVED = 0,
-
- PINMUX_DATA_BEGIN,
- PORT_ALL(DATA), /* PORT0_DATA -> PORT264_DATA */
- PINMUX_DATA_END,
-
- PINMUX_INPUT_BEGIN,
- PORT_ALL(IN), /* PORT0_IN -> PORT264_IN */
- PINMUX_INPUT_END,
-
- PINMUX_INPUT_PULLUP_BEGIN,
- PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */
- PINMUX_INPUT_PULLUP_END,
-
- PINMUX_INPUT_PULLDOWN_BEGIN,
- PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */
- PINMUX_INPUT_PULLDOWN_END,
-
- PINMUX_OUTPUT_BEGIN,
- PORT_ALL(OUT), /* PORT0_OUT -> PORT264_OUT */
- PINMUX_OUTPUT_END,
-
- PINMUX_FUNCTION_BEGIN,
- PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */
- PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */
- PORT_ALL(FN0), /* PORT0_FN0 -> PORT264_FN0 */
- PORT_ALL(FN1), /* PORT0_FN1 -> PORT264_FN1 */
- PORT_ALL(FN2), /* PORT0_FN2 -> PORT264_FN2 */
- PORT_ALL(FN3), /* PORT0_FN3 -> PORT264_FN3 */
- PORT_ALL(FN4), /* PORT0_FN4 -> PORT264_FN4 */
- PORT_ALL(FN5), /* PORT0_FN5 -> PORT264_FN5 */
- PORT_ALL(FN6), /* PORT0_FN6 -> PORT264_FN6 */
- PORT_ALL(FN7), /* PORT0_FN7 -> PORT264_FN7 */
-
- MSELBCR_MSEL17_1, MSELBCR_MSEL17_0,
- MSELBCR_MSEL16_1, MSELBCR_MSEL16_0,
- PINMUX_FUNCTION_END,
-
- PINMUX_MARK_BEGIN,
- /* Special Pull-up / Pull-down Functions */
- PORT66_KEYIN0_PU_MARK, PORT67_KEYIN1_PU_MARK,
- PORT68_KEYIN2_PU_MARK, PORT69_KEYIN3_PU_MARK,
- PORT70_KEYIN4_PU_MARK, PORT71_KEYIN5_PU_MARK,
- PORT72_KEYIN6_PU_MARK,
-
- /* 55-1 */
- VBUS_0_MARK,
- CPORT0_MARK,
- CPORT1_MARK,
- CPORT2_MARK,
- CPORT3_MARK,
- CPORT4_MARK,
- CPORT5_MARK,
- CPORT6_MARK,
- CPORT7_MARK,
- CPORT8_MARK,
- CPORT9_MARK,
- CPORT10_MARK,
- CPORT11_MARK, SIN2_MARK,
- CPORT12_MARK, XCTS2_MARK,
- CPORT13_MARK, RFSPO4_MARK,
- CPORT14_MARK, RFSPO5_MARK,
- CPORT15_MARK, SCIFA0_SCK_MARK, GPS_AGC2_MARK,
- CPORT16_MARK, SCIFA0_TXD_MARK, GPS_AGC3_MARK,
- CPORT17_IC_OE_MARK, SOUT2_MARK,
- CPORT18_MARK, XRTS2_MARK, PORT19_VIO_CKO2_MARK,
- CPORT19_MPORT1_MARK,
- CPORT20_MARK, RFSPO6_MARK,
- CPORT21_MARK, STATUS0_MARK,
- CPORT22_MARK, STATUS1_MARK,
- CPORT23_MARK, STATUS2_MARK, RFSPO7_MARK,
- B_SYNLD1_MARK,
- B_SYNLD2_MARK, SYSENMSK_MARK,
- XMAINPS_MARK,
- XDIVPS_MARK,
- XIDRST_MARK,
- IDCLK_MARK, IC_DP_MARK,
- IDIO_MARK, IC_DM_MARK,
- SOUT1_MARK, SCIFA4_TXD_MARK, M02_BERDAT_MARK,
- SIN1_MARK, SCIFA4_RXD_MARK, XWUP_MARK,
- XRTS1_MARK, SCIFA4_RTS_MARK, M03_BERCLK_MARK,
- XCTS1_MARK, SCIFA4_CTS_MARK,
- PCMCLKO_MARK,
- SYNC8KO_MARK,
-
- /* 55-2 */
- DNPCM_A_MARK,
- UPPCM_A_MARK,
- VACK_MARK,
- XTALB1L_MARK,
- GPS_AGC1_MARK, SCIFA0_RTS_MARK,
- GPS_AGC4_MARK, SCIFA0_RXD_MARK,
- GPS_PWRDOWN_MARK, SCIFA0_CTS_MARK,
- GPS_IM_MARK,
- GPS_IS_MARK,
- GPS_QM_MARK,
- GPS_QS_MARK,
- FMSOCK_MARK, PORT49_IRDA_OUT_MARK, PORT49_IROUT_MARK,
- FMSOOLR_MARK, BBIF2_TSYNC2_MARK, TPU2TO2_MARK, IPORT3_MARK,
- FMSIOLR_MARK,
- FMSOOBT_MARK, BBIF2_TSCK2_MARK, TPU2TO3_MARK, OPORT1_MARK,
- FMSIOBT_MARK,
- FMSOSLD_MARK, BBIF2_TXD2_MARK, OPORT2_MARK,
- FMSOILR_MARK, PORT53_IRDA_IN_MARK, TPU3TO3_MARK, OPORT3_MARK,
- FMSIILR_MARK,
- FMSOIBT_MARK, PORT54_IRDA_FIRSEL_MARK, TPU3TO2_MARK, FMSIIBT_MARK,
- FMSISLD_MARK, MFG0_OUT1_MARK, TPU0TO0_MARK,
- A0_EA0_MARK, BS_MARK,
- A12_EA12_MARK, PORT58_VIO_CKOR_MARK, TPU4TO2_MARK,
- A13_EA13_MARK, PORT59_IROUT_MARK, MFG0_OUT2_MARK, TPU0TO1_MARK,
- A14_EA14_MARK, PORT60_KEYOUT5_MARK,
- A15_EA15_MARK, PORT61_KEYOUT4_MARK,
- A16_EA16_MARK, PORT62_KEYOUT3_MARK, MSIOF0_SS1_MARK,
- A17_EA17_MARK, PORT63_KEYOUT2_MARK, MSIOF0_TSYNC_MARK,
- A18_EA18_MARK, PORT64_KEYOUT1_MARK, MSIOF0_TSCK_MARK,
- A19_EA19_MARK, PORT65_KEYOUT0_MARK, MSIOF0_TXD_MARK,
- A20_EA20_MARK, PORT66_KEYIN0_MARK, MSIOF0_RSCK_MARK,
- A21_EA21_MARK, PORT67_KEYIN1_MARK, MSIOF0_RSYNC_MARK,
- A22_EA22_MARK, PORT68_KEYIN2_MARK, MSIOF0_MCK0_MARK,
- A23_EA23_MARK, PORT69_KEYIN3_MARK, MSIOF0_MCK1_MARK,
- A24_EA24_MARK, PORT70_KEYIN4_MARK, MSIOF0_RXD_MARK,
- A25_EA25_MARK, PORT71_KEYIN5_MARK, MSIOF0_SS2_MARK,
- A26_MARK, PORT72_KEYIN6_MARK,
- D0_ED0_NAF0_MARK,
- D1_ED1_NAF1_MARK,
- D2_ED2_NAF2_MARK,
- D3_ED3_NAF3_MARK,
- D4_ED4_NAF4_MARK,
- D5_ED5_NAF5_MARK,
- D6_ED6_NAF6_MARK,
- D7_ED7_NAF7_MARK,
- D8_ED8_NAF8_MARK,
- D9_ED9_NAF9_MARK,
- D10_ED10_NAF10_MARK,
- D11_ED11_NAF11_MARK,
- D12_ED12_NAF12_MARK,
- D13_ED13_NAF13_MARK,
- D14_ED14_NAF14_MARK,
- D15_ED15_NAF15_MARK,
- CS4_MARK,
- CS5A_MARK, FMSICK_MARK,
- CS5B_MARK, FCE1_MARK,
-
- /* 55-3 */
- CS6B_MARK, XCS2_MARK, CS6A_MARK, DACK0_MARK,
- FCE0_MARK,
- WAIT_MARK, DREQ0_MARK,
- RD_XRD_MARK,
- WE0_XWR0_FWE_MARK,
- WE1_XWR1_MARK,
- FRB_MARK,
- CKO_MARK,
- NBRSTOUT_MARK,
- NBRST_MARK,
- GPS_EPPSIN_MARK,
- LATCHPULSE_MARK,
- LTESIGNAL_MARK,
- LEGACYSTATE_MARK,
- TCKON_MARK,
- VIO_VD_MARK, PORT128_KEYOUT0_MARK, IPORT0_MARK,
- VIO_HD_MARK, PORT129_KEYOUT1_MARK, IPORT1_MARK,
- VIO_D0_MARK, PORT130_KEYOUT2_MARK, PORT130_MSIOF2_RXD_MARK,
- VIO_D1_MARK, PORT131_KEYOUT3_MARK, PORT131_MSIOF2_SS1_MARK,
- VIO_D2_MARK, PORT132_KEYOUT4_MARK, PORT132_MSIOF2_SS2_MARK,
- VIO_D3_MARK, PORT133_KEYOUT5_MARK, PORT133_MSIOF2_TSYNC_MARK,
- VIO_D4_MARK, PORT134_KEYIN0_MARK, PORT134_MSIOF2_TXD_MARK,
- VIO_D5_MARK, PORT135_KEYIN1_MARK, PORT135_MSIOF2_TSCK_MARK,
- VIO_D6_MARK, PORT136_KEYIN2_MARK,
- VIO_D7_MARK, PORT137_KEYIN3_MARK,
- VIO_D8_MARK, M9_SLCD_A01_MARK, PORT138_FSIAOMC_MARK,
- VIO_D9_MARK, M10_SLCD_CK1_MARK, PORT139_FSIAOLR_MARK,
- VIO_D10_MARK, M11_SLCD_SO1_MARK, TPU0TO2_MARK, PORT140_FSIAOBT_MARK,
- VIO_D11_MARK, M12_SLCD_CE1_MARK, TPU0TO3_MARK, PORT141_FSIAOSLD_MARK,
- VIO_D12_MARK, M13_BSW_MARK, PORT142_FSIACK_MARK,
- VIO_D13_MARK, M14_GSW_MARK, PORT143_FSIAILR_MARK,
- VIO_D14_MARK, M15_RSW_MARK, PORT144_FSIAIBT_MARK,
- VIO_D15_MARK, TPU1TO3_MARK, PORT145_FSIAISLD_MARK,
- VIO_CLK_MARK, PORT146_KEYIN4_MARK, IPORT2_MARK,
- VIO_FIELD_MARK, PORT147_KEYIN5_MARK,
- VIO_CKO_MARK, PORT148_KEYIN6_MARK,
- A27_MARK, RDWR_XWE_MARK, MFG0_IN1_MARK,
- MFG0_IN2_MARK,
- TS_SPSYNC3_MARK, MSIOF2_RSCK_MARK,
- TS_SDAT3_MARK, MSIOF2_RSYNC_MARK,
- TPU1TO2_MARK, TS_SDEN3_MARK, PORT153_MSIOF2_SS1_MARK,
- SOUT3_MARK, SCIFA2_TXD1_MARK, MSIOF2_MCK0_MARK,
- SIN3_MARK, SCIFA2_RXD1_MARK, MSIOF2_MCK1_MARK,
- XRTS3_MARK, SCIFA2_RTS1_MARK, PORT156_MSIOF2_SS2_MARK,
- XCTS3_MARK, SCIFA2_CTS1_MARK, PORT157_MSIOF2_RXD_MARK,
-
- /* 55-4 */
- DINT_MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK,
- PORT159_SCIFB_SCK_MARK, PORT159_SCIFA5_SCK_MARK, NMI_MARK,
- PORT160_SCIFB_TXD_MARK, PORT160_SCIFA5_TXD_MARK, SOUT0_MARK,
- PORT161_SCIFB_CTS_MARK, PORT161_SCIFA5_CTS_MARK, XCTS0_MARK,
- MFG3_IN2_MARK,
- PORT162_SCIFB_RXD_MARK, PORT162_SCIFA5_RXD_MARK, SIN0_MARK,
- MFG3_IN1_MARK,
- PORT163_SCIFB_RTS_MARK, PORT163_SCIFA5_RTS_MARK, XRTS0_MARK,
- MFG3_OUT1_MARK, TPU3TO0_MARK,
- LCDD0_MARK, PORT192_KEYOUT0_MARK, EXT_CKI_MARK,
- LCDD1_MARK, PORT193_KEYOUT1_MARK, PORT193_SCIFA5_CTS_MARK,
- BBIF2_TSYNC1_MARK,
- LCDD2_MARK, PORT194_KEYOUT2_MARK, PORT194_SCIFA5_RTS_MARK,
- BBIF2_TSCK1_MARK,
- LCDD3_MARK, PORT195_KEYOUT3_MARK, PORT195_SCIFA5_RXD_MARK,
- BBIF2_TXD1_MARK,
- LCDD4_MARK, PORT196_KEYOUT4_MARK, PORT196_SCIFA5_TXD_MARK,
- LCDD5_MARK, PORT197_KEYOUT5_MARK, PORT197_SCIFA5_SCK_MARK,
- MFG2_OUT2_MARK,
- TPU2TO1_MARK,
- LCDD6_MARK, XWR2_MARK,
- LCDD7_MARK, TPU4TO1_MARK, MFG4_OUT2_MARK, XWR3_MARK,
- LCDD8_MARK, PORT200_KEYIN0_MARK, VIO_DR0_MARK, D16_MARK, ED16_MARK,
- LCDD9_MARK, PORT201_KEYIN1_MARK, VIO_DR1_MARK, D17_MARK, ED17_MARK,
- LCDD10_MARK, PORT202_KEYIN2_MARK, VIO_DR2_MARK, D18_MARK, ED18_MARK,
- LCDD11_MARK, PORT203_KEYIN3_MARK, VIO_DR3_MARK, D19_MARK, ED19_MARK,
- LCDD12_MARK, PORT204_KEYIN4_MARK, VIO_DR4_MARK, D20_MARK, ED20_MARK,
- LCDD13_MARK, PORT205_KEYIN5_MARK, VIO_DR5_MARK, D21_MARK, ED21_MARK,
- LCDD14_MARK, PORT206_KEYIN6_MARK, VIO_DR6_MARK, D22_MARK, ED22_MARK,
- LCDD15_MARK, PORT207_MSIOF0L_SS1_MARK, PORT207_KEYOUT0_MARK,
- VIO_DR7_MARK, D23_MARK, ED23_MARK,
- LCDD16_MARK, PORT208_MSIOF0L_SS2_MARK, PORT208_KEYOUT1_MARK,
- VIO_VDR_MARK, D24_MARK, ED24_MARK,
- LCDD17_MARK, PORT209_KEYOUT2_MARK, VIO_HDR_MARK, D25_MARK, ED25_MARK,
- LCDD18_MARK, DREQ2_MARK, PORT210_MSIOF0L_SS1_MARK, D26_MARK, ED26_MARK,
- LCDD19_MARK, PORT211_MSIOF0L_SS2_MARK, D27_MARK, ED27_MARK,
- LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, D28_MARK, ED28_MARK,
- LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, D29_MARK, ED29_MARK,
- LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_RSCK_MARK, D30_MARK, ED30_MARK,
- LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_RSYNC_MARK, D31_MARK, ED31_MARK,
- LCDDCK_MARK, LCDWR_MARK, PORT216_KEYOUT3_MARK, VIO_CLKR_MARK,
- LCDRD_MARK, DACK2_MARK, MSIOF0L_TSYNC_MARK,
- LCDHSYN_MARK, LCDCS_MARK, LCDCS2_MARK, DACK3_MARK,
- PORT218_VIO_CKOR_MARK, PORT218_KEYOUT4_MARK,
- LCDDISP_MARK, LCDRS_MARK, DREQ3_MARK, MSIOF0L_TSCK_MARK,
- LCDVSYN_MARK, LCDVSYN2_MARK, PORT220_KEYOUT5_MARK,
- LCDLCLK_MARK, DREQ1_MARK, PWEN_MARK, MSIOF0L_RXD_MARK,
- LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK,
- SCIFA1_TXD_MARK, OVCN2_MARK,
- EXTLP_MARK, SCIFA1_SCK_MARK, USBTERM_MARK, PORT226_VIO_CKO2_MARK,
- SCIFA1_RTS_MARK, IDIN_MARK,
- SCIFA1_RXD_MARK,
- SCIFA1_CTS_MARK, MFG1_IN1_MARK,
- MSIOF1_TXD_MARK, SCIFA2_TXD2_MARK, PORT230_FSIAOMC_MARK,
- MSIOF1_TSYNC_MARK, SCIFA2_CTS2_MARK, PORT231_FSIAOLR_MARK,
- MSIOF1_TSCK_MARK, SCIFA2_SCK2_MARK, PORT232_FSIAOBT_MARK,
- MSIOF1_RXD_MARK, SCIFA2_RXD2_MARK, GPS_VCOTRIG_MARK,
- PORT233_FSIACK_MARK,
- MSIOF1_RSCK_MARK, SCIFA2_RTS2_MARK, PORT234_FSIAOSLD_MARK,
- MSIOF1_RSYNC_MARK, OPORT0_MARK, MFG1_IN2_MARK, PORT235_FSIAILR_MARK,
- MSIOF1_MCK0_MARK, I2C_SDA2_MARK, PORT236_FSIAIBT_MARK,
- MSIOF1_MCK1_MARK, I2C_SCL2_MARK, PORT237_FSIAISLD_MARK,
- MSIOF1_SS1_MARK, EDBGREQ3_MARK,
-
- /* 55-5 */
- MSIOF1_SS2_MARK,
- SCIFA6_TXD_MARK,
- PORT241_IRDA_OUT_MARK, PORT241_IROUT_MARK, MFG4_OUT1_MARK,
- TPU4TO0_MARK,
- PORT242_IRDA_IN_MARK, MFG4_IN2_MARK,
- PORT243_IRDA_FIRSEL_MARK, PORT243_VIO_CKO2_MARK,
- PORT244_SCIFA5_CTS_MARK, MFG2_IN1_MARK, PORT244_SCIFB_CTS_MARK,
- PORT244_MSIOF2_RXD_MARK,
- PORT245_SCIFA5_RTS_MARK, MFG2_IN2_MARK, PORT245_SCIFB_RTS_MARK,
- PORT245_MSIOF2_TXD_MARK,
- PORT246_SCIFA5_RXD_MARK, MFG1_OUT1_MARK, PORT246_SCIFB_RXD_MARK,
- TPU1TO0_MARK,
- PORT247_SCIFA5_TXD_MARK, MFG3_OUT2_MARK, PORT247_SCIFB_TXD_MARK,
- TPU3TO1_MARK,
- PORT248_SCIFA5_SCK_MARK, MFG2_OUT1_MARK, PORT248_SCIFB_SCK_MARK,
- TPU2TO0_MARK,
- PORT248_MSIOF2_TSCK_MARK,
- PORT249_IROUT_MARK, MFG4_IN1_MARK, PORT249_MSIOF2_TSYNC_MARK,
- SDHICLK0_MARK, TCK2_SWCLK_MC0_MARK,
- SDHICD0_MARK,
- SDHID0_0_MARK, TMS2_SWDIO_MC0_MARK,
- SDHID0_1_MARK, TDO2_SWO0_MC0_MARK,
- SDHID0_2_MARK, TDI2_MARK,
- SDHID0_3_MARK, RTCK2_SWO1_MC0_MARK,
- SDHICMD0_MARK, TRST2_MARK,
- SDHIWP0_MARK, EDBGREQ2_MARK,
- SDHICLK1_MARK, TCK3_SWCLK_MC1_MARK,
- SDHID1_0_MARK, M11_SLCD_SO2_MARK, TS_SPSYNC2_MARK,
- TMS3_SWDIO_MC1_MARK,
- SDHID1_1_MARK, M9_SLCD_A02_MARK, TS_SDAT2_MARK, TDO3_SWO0_MC1_MARK,
- SDHID1_2_MARK, M10_SLCD_CK2_MARK, TS_SDEN2_MARK, TDI3_MARK,
- SDHID1_3_MARK, M12_SLCD_CE2_MARK, TS_SCK2_MARK, RTCK3_SWO1_MC1_MARK,
- SDHICMD1_MARK, TRST3_MARK,
- RESETOUTS_MARK,
- PINMUX_MARK_END,
-};
-
-static pinmux_enum_t pinmux_data[] = {
- /* specify valid pin states for each pin in GPIO mode */
- /* 55-1 (GPIO) */
- PORT_DATA_I_PD(0), PORT_DATA_I_PU(1),
- PORT_DATA_I_PU(2), PORT_DATA_I_PU(3),
- PORT_DATA_I_PU(4), PORT_DATA_I_PU(5),
- PORT_DATA_I_PU(6), PORT_DATA_I_PU(7),
- PORT_DATA_I_PU(8), PORT_DATA_I_PU(9),
- PORT_DATA_I_PU(10), PORT_DATA_I_PU(11),
- PORT_DATA_IO_PU(12), PORT_DATA_IO_PU(13),
- PORT_DATA_IO_PU_PD(14), PORT_DATA_IO_PU_PD(15),
- PORT_DATA_O(16), PORT_DATA_IO(17),
- PORT_DATA_O(18), PORT_DATA_O(19),
- PORT_DATA_O(20), PORT_DATA_O(21),
- PORT_DATA_O(22), PORT_DATA_O(23),
- PORT_DATA_O(24), PORT_DATA_I_PD(25),
- PORT_DATA_I_PD(26), PORT_DATA_O(27),
- PORT_DATA_O(28), PORT_DATA_O(29),
- PORT_DATA_IO(30), PORT_DATA_IO_PU(31),
- PORT_DATA_IO_PD(32), PORT_DATA_I_PU(33),
- PORT_DATA_IO_PD(34), PORT_DATA_I_PU_PD(35),
- PORT_DATA_O(36), PORT_DATA_IO(37),
-
- /* 55-2 (GPIO) */
- PORT_DATA_O(38), PORT_DATA_I_PU(39),
- PORT_DATA_I_PU_PD(40), PORT_DATA_O(41),
- PORT_DATA_IO_PD(42), PORT_DATA_IO_PD(43),
- PORT_DATA_IO_PD(44), PORT_DATA_I_PD(45),
- PORT_DATA_I_PD(46), PORT_DATA_I_PD(47),
- PORT_DATA_I_PD(48), PORT_DATA_IO_PU_PD(49),
- PORT_DATA_IO_PD(50), PORT_DATA_IO_PD(51),
- PORT_DATA_O(52), PORT_DATA_IO_PU_PD(53),
- PORT_DATA_IO_PU_PD(54), PORT_DATA_IO_PD(55),
- PORT_DATA_I_PU_PD(56), PORT_DATA_IO(57),
- PORT_DATA_IO(58), PORT_DATA_IO(59),
- PORT_DATA_IO(60), PORT_DATA_IO(61),
- PORT_DATA_IO_PD(62), PORT_DATA_IO_PD(63),
- PORT_DATA_IO_PD(64), PORT_DATA_IO_PD(65),
- PORT_DATA_IO_PU_PD(66), PORT_DATA_IO_PU_PD(67),
- PORT_DATA_IO_PU_PD(68), PORT_DATA_IO_PU_PD(69),
- PORT_DATA_IO_PU_PD(70), PORT_DATA_IO_PU_PD(71),
- PORT_DATA_IO_PU_PD(72), PORT_DATA_I_PU_PD(73),
- PORT_DATA_IO_PU(74), PORT_DATA_IO_PU(75),
- PORT_DATA_IO_PU(76), PORT_DATA_IO_PU(77),
- PORT_DATA_IO_PU(78), PORT_DATA_IO_PU(79),
- PORT_DATA_IO_PU(80), PORT_DATA_IO_PU(81),
- PORT_DATA_IO_PU(82), PORT_DATA_IO_PU(83),
- PORT_DATA_IO_PU(84), PORT_DATA_IO_PU(85),
- PORT_DATA_IO_PU(86), PORT_DATA_IO_PU(87),
- PORT_DATA_IO_PU(88), PORT_DATA_IO_PU(89),
- PORT_DATA_O(90), PORT_DATA_IO_PU(91),
- PORT_DATA_O(92),
-
- /* 55-3 (GPIO) */
- PORT_DATA_IO_PU(93),
- PORT_DATA_O(94),
- PORT_DATA_I_PU_PD(95),
- PORT_DATA_IO(96), PORT_DATA_IO(97),
- PORT_DATA_IO(98), PORT_DATA_I_PU(99),
- PORT_DATA_O(100), PORT_DATA_O(101),
- PORT_DATA_I_PU(102), PORT_DATA_IO_PD(103),
- PORT_DATA_I_PD(104), PORT_DATA_I_PD(105),
- PORT_DATA_I_PD(106), PORT_DATA_I_PD(107),
- PORT_DATA_I_PD(108), PORT_DATA_IO_PD(109),
- PORT_DATA_IO_PD(110), PORT_DATA_I_PD(111),
- PORT_DATA_IO_PD(112), PORT_DATA_IO_PD(113),
- PORT_DATA_IO_PD(114), PORT_DATA_I_PD(115),
- PORT_DATA_I_PD(116), PORT_DATA_IO_PD(117),
- PORT_DATA_I_PD(118), PORT_DATA_IO_PD(128),
- PORT_DATA_IO_PD(129), PORT_DATA_IO_PD(130),
- PORT_DATA_IO_PD(131), PORT_DATA_IO_PD(132),
- PORT_DATA_IO_PD(133), PORT_DATA_IO_PU_PD(134),
- PORT_DATA_IO_PU_PD(135), PORT_DATA_IO_PU_PD(136),
- PORT_DATA_IO_PU_PD(137), PORT_DATA_IO_PD(138),
- PORT_DATA_IO_PD(139), PORT_DATA_IO_PD(140),
- PORT_DATA_IO_PD(141), PORT_DATA_IO_PD(142),
- PORT_DATA_IO_PD(143), PORT_DATA_IO_PU_PD(144),
- PORT_DATA_IO_PD(145), PORT_DATA_IO_PU_PD(146),
- PORT_DATA_IO_PU_PD(147), PORT_DATA_IO_PU_PD(148),
- PORT_DATA_IO_PU_PD(149), PORT_DATA_I_PD(150),
- PORT_DATA_IO_PU_PD(151), PORT_DATA_IO_PD(152),
- PORT_DATA_IO_PD(153), PORT_DATA_IO_PD(154),
- PORT_DATA_I_PD(155), PORT_DATA_IO_PU_PD(156),
- PORT_DATA_I_PD(157), PORT_DATA_IO_PD(158),
-
- /* 55-4 (GPIO) */
- PORT_DATA_IO_PU_PD(159), PORT_DATA_IO_PU_PD(160),
- PORT_DATA_I_PU_PD(161), PORT_DATA_I_PU_PD(162),
- PORT_DATA_IO_PU_PD(163), PORT_DATA_I_PU_PD(164),
- PORT_DATA_IO_PD(192), PORT_DATA_IO_PD(193),
- PORT_DATA_IO_PD(194), PORT_DATA_IO_PD(195),
- PORT_DATA_IO_PD(196), PORT_DATA_IO_PD(197),
- PORT_DATA_IO_PD(198), PORT_DATA_IO_PD(199),
- PORT_DATA_IO_PU_PD(200), PORT_DATA_IO_PU_PD(201),
- PORT_DATA_IO_PU_PD(202), PORT_DATA_IO_PU_PD(203),
- PORT_DATA_IO_PU_PD(204), PORT_DATA_IO_PU_PD(205),
- PORT_DATA_IO_PU_PD(206), PORT_DATA_IO_PD(207),
- PORT_DATA_IO_PD(208), PORT_DATA_IO_PD(209),
- PORT_DATA_IO_PD(210), PORT_DATA_IO_PD(211),
- PORT_DATA_IO_PD(212), PORT_DATA_IO_PD(213),
- PORT_DATA_IO_PD(214), PORT_DATA_IO_PD(215),
- PORT_DATA_IO_PD(216), PORT_DATA_IO_PD(217),
- PORT_DATA_O(218), PORT_DATA_IO_PD(219),
- PORT_DATA_IO_PD(220), PORT_DATA_IO_PD(221),
- PORT_DATA_IO_PU_PD(222),
- PORT_DATA_I_PU_PD(223), PORT_DATA_I_PU_PD(224),
- PORT_DATA_IO_PU_PD(225), PORT_DATA_O(226),
- PORT_DATA_IO_PU_PD(227), PORT_DATA_I_PD(228),
- PORT_DATA_I_PD(229), PORT_DATA_IO(230),
- PORT_DATA_IO_PD(231), PORT_DATA_IO_PU_PD(232),
- PORT_DATA_I_PD(233), PORT_DATA_IO_PU_PD(234),
- PORT_DATA_IO_PU_PD(235), PORT_DATA_IO_PU_PD(236),
- PORT_DATA_IO_PD(237), PORT_DATA_IO_PU_PD(238),
-
- /* 55-5 (GPIO) */
- PORT_DATA_IO_PU_PD(239), PORT_DATA_IO_PU_PD(240),
- PORT_DATA_O(241), PORT_DATA_I_PD(242),
- PORT_DATA_IO_PU_PD(243), PORT_DATA_IO_PU_PD(244),
- PORT_DATA_IO_PU_PD(245), PORT_DATA_IO_PU_PD(246),
- PORT_DATA_IO_PU_PD(247), PORT_DATA_IO_PU_PD(248),
- PORT_DATA_IO_PU_PD(249), PORT_DATA_IO_PD(250),
- PORT_DATA_IO_PU_PD(251), PORT_DATA_IO_PU_PD(252),
- PORT_DATA_IO_PU_PD(253), PORT_DATA_IO_PU_PD(254),
- PORT_DATA_IO_PU_PD(255), PORT_DATA_IO_PU_PD(256),
- PORT_DATA_IO_PU_PD(257), PORT_DATA_IO_PD(258),
- PORT_DATA_IO_PU_PD(259), PORT_DATA_IO_PU_PD(260),
- PORT_DATA_IO_PU_PD(261), PORT_DATA_IO_PU_PD(262),
- PORT_DATA_IO_PU_PD(263),
-
- /* Special Pull-up / Pull-down Functions */
- PINMUX_DATA(PORT66_KEYIN0_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
- PORT66_FN2, PORT66_IN_PU),
- PINMUX_DATA(PORT67_KEYIN1_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
- PORT67_FN2, PORT67_IN_PU),
- PINMUX_DATA(PORT68_KEYIN2_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
- PORT68_FN2, PORT68_IN_PU),
- PINMUX_DATA(PORT69_KEYIN3_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
- PORT69_FN2, PORT69_IN_PU),
- PINMUX_DATA(PORT70_KEYIN4_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
- PORT70_FN2, PORT70_IN_PU),
- PINMUX_DATA(PORT71_KEYIN5_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
- PORT71_FN2, PORT71_IN_PU),
- PINMUX_DATA(PORT72_KEYIN6_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
- PORT72_FN2, PORT72_IN_PU),
-
-
- /* 55-1 (FN) */
- PINMUX_DATA(VBUS_0_MARK, PORT0_FN1),
- PINMUX_DATA(CPORT0_MARK, PORT1_FN1),
- PINMUX_DATA(CPORT1_MARK, PORT2_FN1),
- PINMUX_DATA(CPORT2_MARK, PORT3_FN1),
- PINMUX_DATA(CPORT3_MARK, PORT4_FN1),
- PINMUX_DATA(CPORT4_MARK, PORT5_FN1),
- PINMUX_DATA(CPORT5_MARK, PORT6_FN1),
- PINMUX_DATA(CPORT6_MARK, PORT7_FN1),
- PINMUX_DATA(CPORT7_MARK, PORT8_FN1),
- PINMUX_DATA(CPORT8_MARK, PORT9_FN1),
- PINMUX_DATA(CPORT9_MARK, PORT10_FN1),
- PINMUX_DATA(CPORT10_MARK, PORT11_FN1),
- PINMUX_DATA(CPORT11_MARK, PORT12_FN1),
- PINMUX_DATA(SIN2_MARK, PORT12_FN2),
- PINMUX_DATA(CPORT12_MARK, PORT13_FN1),
- PINMUX_DATA(XCTS2_MARK, PORT13_FN2),
- PINMUX_DATA(CPORT13_MARK, PORT14_FN1),
- PINMUX_DATA(RFSPO4_MARK, PORT14_FN2),
- PINMUX_DATA(CPORT14_MARK, PORT15_FN1),
- PINMUX_DATA(RFSPO5_MARK, PORT15_FN2),
- PINMUX_DATA(CPORT15_MARK, PORT16_FN1),
- PINMUX_DATA(SCIFA0_SCK_MARK, PORT16_FN2),
- PINMUX_DATA(GPS_AGC2_MARK, PORT16_FN3),
- PINMUX_DATA(CPORT16_MARK, PORT17_FN1),
- PINMUX_DATA(SCIFA0_TXD_MARK, PORT17_FN2),
- PINMUX_DATA(GPS_AGC3_MARK, PORT17_FN3),
- PINMUX_DATA(CPORT17_IC_OE_MARK, PORT18_FN1),
- PINMUX_DATA(SOUT2_MARK, PORT18_FN2),
- PINMUX_DATA(CPORT18_MARK, PORT19_FN1),
- PINMUX_DATA(XRTS2_MARK, PORT19_FN2),
- PINMUX_DATA(PORT19_VIO_CKO2_MARK, PORT19_FN3),
- PINMUX_DATA(CPORT19_MPORT1_MARK, PORT20_FN1),
- PINMUX_DATA(CPORT20_MARK, PORT21_FN1),
- PINMUX_DATA(RFSPO6_MARK, PORT21_FN2),
- PINMUX_DATA(CPORT21_MARK, PORT22_FN1),
- PINMUX_DATA(STATUS0_MARK, PORT22_FN2),
- PINMUX_DATA(CPORT22_MARK, PORT23_FN1),
- PINMUX_DATA(STATUS1_MARK, PORT23_FN2),
- PINMUX_DATA(CPORT23_MARK, PORT24_FN1),
- PINMUX_DATA(STATUS2_MARK, PORT24_FN2),
- PINMUX_DATA(RFSPO7_MARK, PORT24_FN3),
- PINMUX_DATA(B_SYNLD1_MARK, PORT25_FN1),
- PINMUX_DATA(B_SYNLD2_MARK, PORT26_FN1),
- PINMUX_DATA(SYSENMSK_MARK, PORT26_FN2),
- PINMUX_DATA(XMAINPS_MARK, PORT27_FN1),
- PINMUX_DATA(XDIVPS_MARK, PORT28_FN1),
- PINMUX_DATA(XIDRST_MARK, PORT29_FN1),
- PINMUX_DATA(IDCLK_MARK, PORT30_FN1),
- PINMUX_DATA(IC_DP_MARK, PORT30_FN2),
- PINMUX_DATA(IDIO_MARK, PORT31_FN1),
- PINMUX_DATA(IC_DM_MARK, PORT31_FN2),
- PINMUX_DATA(SOUT1_MARK, PORT32_FN1),
- PINMUX_DATA(SCIFA4_TXD_MARK, PORT32_FN2),
- PINMUX_DATA(M02_BERDAT_MARK, PORT32_FN3),
- PINMUX_DATA(SIN1_MARK, PORT33_FN1),
- PINMUX_DATA(SCIFA4_RXD_MARK, PORT33_FN2),
- PINMUX_DATA(XWUP_MARK, PORT33_FN3),
- PINMUX_DATA(XRTS1_MARK, PORT34_FN1),
- PINMUX_DATA(SCIFA4_RTS_MARK, PORT34_FN2),
- PINMUX_DATA(M03_BERCLK_MARK, PORT34_FN3),
- PINMUX_DATA(XCTS1_MARK, PORT35_FN1),
- PINMUX_DATA(SCIFA4_CTS_MARK, PORT35_FN2),
- PINMUX_DATA(PCMCLKO_MARK, PORT36_FN1),
- PINMUX_DATA(SYNC8KO_MARK, PORT37_FN1),
-
- /* 55-2 (FN) */
- PINMUX_DATA(DNPCM_A_MARK, PORT38_FN1),
- PINMUX_DATA(UPPCM_A_MARK, PORT39_FN1),
- PINMUX_DATA(VACK_MARK, PORT40_FN1),
- PINMUX_DATA(XTALB1L_MARK, PORT41_FN1),
- PINMUX_DATA(GPS_AGC1_MARK, PORT42_FN1),
- PINMUX_DATA(SCIFA0_RTS_MARK, PORT42_FN2),
- PINMUX_DATA(GPS_AGC4_MARK, PORT43_FN1),
- PINMUX_DATA(SCIFA0_RXD_MARK, PORT43_FN2),
- PINMUX_DATA(GPS_PWRDOWN_MARK, PORT44_FN1),
- PINMUX_DATA(SCIFA0_CTS_MARK, PORT44_FN2),
- PINMUX_DATA(GPS_IM_MARK, PORT45_FN1),
- PINMUX_DATA(GPS_IS_MARK, PORT46_FN1),
- PINMUX_DATA(GPS_QM_MARK, PORT47_FN1),
- PINMUX_DATA(GPS_QS_MARK, PORT48_FN1),
- PINMUX_DATA(FMSOCK_MARK, PORT49_FN1),
- PINMUX_DATA(PORT49_IRDA_OUT_MARK, PORT49_FN2),
- PINMUX_DATA(PORT49_IROUT_MARK, PORT49_FN3),
- PINMUX_DATA(FMSOOLR_MARK, PORT50_FN1),
- PINMUX_DATA(BBIF2_TSYNC2_MARK, PORT50_FN2),
- PINMUX_DATA(TPU2TO2_MARK, PORT50_FN3),
- PINMUX_DATA(IPORT3_MARK, PORT50_FN4),
- PINMUX_DATA(FMSIOLR_MARK, PORT50_FN5),
- PINMUX_DATA(FMSOOBT_MARK, PORT51_FN1),
- PINMUX_DATA(BBIF2_TSCK2_MARK, PORT51_FN2),
- PINMUX_DATA(TPU2TO3_MARK, PORT51_FN3),
- PINMUX_DATA(OPORT1_MARK, PORT51_FN4),
- PINMUX_DATA(FMSIOBT_MARK, PORT51_FN5),
- PINMUX_DATA(FMSOSLD_MARK, PORT52_FN1),
- PINMUX_DATA(BBIF2_TXD2_MARK, PORT52_FN2),
- PINMUX_DATA(OPORT2_MARK, PORT52_FN3),
- PINMUX_DATA(FMSOILR_MARK, PORT53_FN1),
- PINMUX_DATA(PORT53_IRDA_IN_MARK, PORT53_FN2),
- PINMUX_DATA(TPU3TO3_MARK, PORT53_FN3),
- PINMUX_DATA(OPORT3_MARK, PORT53_FN4),
- PINMUX_DATA(FMSIILR_MARK, PORT53_FN5),
- PINMUX_DATA(FMSOIBT_MARK, PORT54_FN1),
- PINMUX_DATA(PORT54_IRDA_FIRSEL_MARK, PORT54_FN2),
- PINMUX_DATA(TPU3TO2_MARK, PORT54_FN3),
- PINMUX_DATA(FMSIIBT_MARK, PORT54_FN4),
- PINMUX_DATA(FMSISLD_MARK, PORT55_FN1),
- PINMUX_DATA(MFG0_OUT1_MARK, PORT55_FN2),
- PINMUX_DATA(TPU0TO0_MARK, PORT55_FN3),
- PINMUX_DATA(A0_EA0_MARK, PORT57_FN1),
- PINMUX_DATA(BS_MARK, PORT57_FN2),
- PINMUX_DATA(A12_EA12_MARK, PORT58_FN1),
- PINMUX_DATA(PORT58_VIO_CKOR_MARK, PORT58_FN2),
- PINMUX_DATA(TPU4TO2_MARK, PORT58_FN3),
- PINMUX_DATA(A13_EA13_MARK, PORT59_FN1),
- PINMUX_DATA(PORT59_IROUT_MARK, PORT59_FN2),
- PINMUX_DATA(MFG0_OUT2_MARK, PORT59_FN3),
- PINMUX_DATA(TPU0TO1_MARK, PORT59_FN4),
- PINMUX_DATA(A14_EA14_MARK, PORT60_FN1),
- PINMUX_DATA(PORT60_KEYOUT5_MARK, PORT60_FN2),
- PINMUX_DATA(A15_EA15_MARK, PORT61_FN1),
- PINMUX_DATA(PORT61_KEYOUT4_MARK, PORT61_FN2),
- PINMUX_DATA(A16_EA16_MARK, PORT62_FN1),
- PINMUX_DATA(PORT62_KEYOUT3_MARK, PORT62_FN2),
- PINMUX_DATA(MSIOF0_SS1_MARK, PORT62_FN3),
- PINMUX_DATA(A17_EA17_MARK, PORT63_FN1),
- PINMUX_DATA(PORT63_KEYOUT2_MARK, PORT63_FN2),
- PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT63_FN3),
- PINMUX_DATA(A18_EA18_MARK, PORT64_FN1),
- PINMUX_DATA(PORT64_KEYOUT1_MARK, PORT64_FN2),
- PINMUX_DATA(MSIOF0_TSCK_MARK, PORT64_FN3),
- PINMUX_DATA(A19_EA19_MARK, PORT65_FN1),
- PINMUX_DATA(PORT65_KEYOUT0_MARK, PORT65_FN2),
- PINMUX_DATA(MSIOF0_TXD_MARK, PORT65_FN3),
- PINMUX_DATA(A20_EA20_MARK, PORT66_FN1),
- PINMUX_DATA(PORT66_KEYIN0_MARK, PORT66_FN2),
- PINMUX_DATA(MSIOF0_RSCK_MARK, PORT66_FN3),
- PINMUX_DATA(A21_EA21_MARK, PORT67_FN1),
- PINMUX_DATA(PORT67_KEYIN1_MARK, PORT67_FN2),
- PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT67_FN3),
- PINMUX_DATA(A22_EA22_MARK, PORT68_FN1),
- PINMUX_DATA(PORT68_KEYIN2_MARK, PORT68_FN2),
- PINMUX_DATA(MSIOF0_MCK0_MARK, PORT68_FN3),
- PINMUX_DATA(A23_EA23_MARK, PORT69_FN1),
- PINMUX_DATA(PORT69_KEYIN3_MARK, PORT69_FN2),
- PINMUX_DATA(MSIOF0_MCK1_MARK, PORT69_FN3),
- PINMUX_DATA(A24_EA24_MARK, PORT70_FN1),
- PINMUX_DATA(PORT70_KEYIN4_MARK, PORT70_FN2),
- PINMUX_DATA(MSIOF0_RXD_MARK, PORT70_FN3),
- PINMUX_DATA(A25_EA25_MARK, PORT71_FN1),
- PINMUX_DATA(PORT71_KEYIN5_MARK, PORT71_FN2),
- PINMUX_DATA(MSIOF0_SS2_MARK, PORT71_FN3),
- PINMUX_DATA(A26_MARK, PORT72_FN1),
- PINMUX_DATA(PORT72_KEYIN6_MARK, PORT72_FN2),
- PINMUX_DATA(D0_ED0_NAF0_MARK, PORT74_FN1),
- PINMUX_DATA(D1_ED1_NAF1_MARK, PORT75_FN1),
- PINMUX_DATA(D2_ED2_NAF2_MARK, PORT76_FN1),
- PINMUX_DATA(D3_ED3_NAF3_MARK, PORT77_FN1),
- PINMUX_DATA(D4_ED4_NAF4_MARK, PORT78_FN1),
- PINMUX_DATA(D5_ED5_NAF5_MARK, PORT79_FN1),
- PINMUX_DATA(D6_ED6_NAF6_MARK, PORT80_FN1),
- PINMUX_DATA(D7_ED7_NAF7_MARK, PORT81_FN1),
- PINMUX_DATA(D8_ED8_NAF8_MARK, PORT82_FN1),
- PINMUX_DATA(D9_ED9_NAF9_MARK, PORT83_FN1),
- PINMUX_DATA(D10_ED10_NAF10_MARK, PORT84_FN1),
- PINMUX_DATA(D11_ED11_NAF11_MARK, PORT85_FN1),
- PINMUX_DATA(D12_ED12_NAF12_MARK, PORT86_FN1),
- PINMUX_DATA(D13_ED13_NAF13_MARK, PORT87_FN1),
- PINMUX_DATA(D14_ED14_NAF14_MARK, PORT88_FN1),
- PINMUX_DATA(D15_ED15_NAF15_MARK, PORT89_FN1),
- PINMUX_DATA(CS4_MARK, PORT90_FN1),
- PINMUX_DATA(CS5A_MARK, PORT91_FN1),
- PINMUX_DATA(FMSICK_MARK, PORT91_FN2),
- PINMUX_DATA(CS5B_MARK, PORT92_FN1),
- PINMUX_DATA(FCE1_MARK, PORT92_FN2),
-
- /* 55-3 (FN) */
- PINMUX_DATA(CS6B_MARK, PORT93_FN1),
- PINMUX_DATA(XCS2_MARK, PORT93_FN2),
- PINMUX_DATA(CS6A_MARK, PORT93_FN3),
- PINMUX_DATA(DACK0_MARK, PORT93_FN4),
- PINMUX_DATA(FCE0_MARK, PORT94_FN1),
- PINMUX_DATA(WAIT_MARK, PORT95_FN1),
- PINMUX_DATA(DREQ0_MARK, PORT95_FN2),
- PINMUX_DATA(RD_XRD_MARK, PORT96_FN1),
- PINMUX_DATA(WE0_XWR0_FWE_MARK, PORT97_FN1),
- PINMUX_DATA(WE1_XWR1_MARK, PORT98_FN1),
- PINMUX_DATA(FRB_MARK, PORT99_FN1),
- PINMUX_DATA(CKO_MARK, PORT100_FN1),
- PINMUX_DATA(NBRSTOUT_MARK, PORT101_FN1),
- PINMUX_DATA(NBRST_MARK, PORT102_FN1),
- PINMUX_DATA(GPS_EPPSIN_MARK, PORT106_FN1),
- PINMUX_DATA(LATCHPULSE_MARK, PORT110_FN1),
- PINMUX_DATA(LTESIGNAL_MARK, PORT111_FN1),
- PINMUX_DATA(LEGACYSTATE_MARK, PORT112_FN1),
- PINMUX_DATA(TCKON_MARK, PORT118_FN1),
- PINMUX_DATA(VIO_VD_MARK, PORT128_FN1),
- PINMUX_DATA(PORT128_KEYOUT0_MARK, PORT128_FN2),
- PINMUX_DATA(IPORT0_MARK, PORT128_FN3),
- PINMUX_DATA(VIO_HD_MARK, PORT129_FN1),
- PINMUX_DATA(PORT129_KEYOUT1_MARK, PORT129_FN2),
- PINMUX_DATA(IPORT1_MARK, PORT129_FN3),
- PINMUX_DATA(VIO_D0_MARK, PORT130_FN1),
- PINMUX_DATA(PORT130_KEYOUT2_MARK, PORT130_FN2),
- PINMUX_DATA(PORT130_MSIOF2_RXD_MARK, PORT130_FN3),
- PINMUX_DATA(VIO_D1_MARK, PORT131_FN1),
- PINMUX_DATA(PORT131_KEYOUT3_MARK, PORT131_FN2),
- PINMUX_DATA(PORT131_MSIOF2_SS1_MARK, PORT131_FN3),
- PINMUX_DATA(VIO_D2_MARK, PORT132_FN1),
- PINMUX_DATA(PORT132_KEYOUT4_MARK, PORT132_FN2),
- PINMUX_DATA(PORT132_MSIOF2_SS2_MARK, PORT132_FN3),
- PINMUX_DATA(VIO_D3_MARK, PORT133_FN1),
- PINMUX_DATA(PORT133_KEYOUT5_MARK, PORT133_FN2),
- PINMUX_DATA(PORT133_MSIOF2_TSYNC_MARK, PORT133_FN3),
- PINMUX_DATA(VIO_D4_MARK, PORT134_FN1),
- PINMUX_DATA(PORT134_KEYIN0_MARK, PORT134_FN2),
- PINMUX_DATA(PORT134_MSIOF2_TXD_MARK, PORT134_FN3),
- PINMUX_DATA(VIO_D5_MARK, PORT135_FN1),
- PINMUX_DATA(PORT135_KEYIN1_MARK, PORT135_FN2),
- PINMUX_DATA(PORT135_MSIOF2_TSCK_MARK, PORT135_FN3),
- PINMUX_DATA(VIO_D6_MARK, PORT136_FN1),
- PINMUX_DATA(PORT136_KEYIN2_MARK, PORT136_FN2),
- PINMUX_DATA(VIO_D7_MARK, PORT137_FN1),
- PINMUX_DATA(PORT137_KEYIN3_MARK, PORT137_FN2),
- PINMUX_DATA(VIO_D8_MARK, PORT138_FN1),
- PINMUX_DATA(M9_SLCD_A01_MARK, PORT138_FN2),
- PINMUX_DATA(PORT138_FSIAOMC_MARK, PORT138_FN3),
- PINMUX_DATA(VIO_D9_MARK, PORT139_FN1),
- PINMUX_DATA(M10_SLCD_CK1_MARK, PORT139_FN2),
- PINMUX_DATA(PORT139_FSIAOLR_MARK, PORT139_FN3),
- PINMUX_DATA(VIO_D10_MARK, PORT140_FN1),
- PINMUX_DATA(M11_SLCD_SO1_MARK, PORT140_FN2),
- PINMUX_DATA(TPU0TO2_MARK, PORT140_FN3),
- PINMUX_DATA(PORT140_FSIAOBT_MARK, PORT140_FN4),
- PINMUX_DATA(VIO_D11_MARK, PORT141_FN1),
- PINMUX_DATA(M12_SLCD_CE1_MARK, PORT141_FN2),
- PINMUX_DATA(TPU0TO3_MARK, PORT141_FN3),
- PINMUX_DATA(PORT141_FSIAOSLD_MARK, PORT141_FN4),
- PINMUX_DATA(VIO_D12_MARK, PORT142_FN1),
- PINMUX_DATA(M13_BSW_MARK, PORT142_FN2),
- PINMUX_DATA(PORT142_FSIACK_MARK, PORT142_FN3),
- PINMUX_DATA(VIO_D13_MARK, PORT143_FN1),
- PINMUX_DATA(M14_GSW_MARK, PORT143_FN2),
- PINMUX_DATA(PORT143_FSIAILR_MARK, PORT143_FN3),
- PINMUX_DATA(VIO_D14_MARK, PORT144_FN1),
- PINMUX_DATA(M15_RSW_MARK, PORT144_FN2),
- PINMUX_DATA(PORT144_FSIAIBT_MARK, PORT144_FN3),
- PINMUX_DATA(VIO_D15_MARK, PORT145_FN1),
- PINMUX_DATA(TPU1TO3_MARK, PORT145_FN2),
- PINMUX_DATA(PORT145_FSIAISLD_MARK, PORT145_FN3),
- PINMUX_DATA(VIO_CLK_MARK, PORT146_FN1),
- PINMUX_DATA(PORT146_KEYIN4_MARK, PORT146_FN2),
- PINMUX_DATA(IPORT2_MARK, PORT146_FN3),
- PINMUX_DATA(VIO_FIELD_MARK, PORT147_FN1),
- PINMUX_DATA(PORT147_KEYIN5_MARK, PORT147_FN2),
- PINMUX_DATA(VIO_CKO_MARK, PORT148_FN1),
- PINMUX_DATA(PORT148_KEYIN6_MARK, PORT148_FN2),
- PINMUX_DATA(A27_MARK, PORT149_FN1),
- PINMUX_DATA(RDWR_XWE_MARK, PORT149_FN2),
- PINMUX_DATA(MFG0_IN1_MARK, PORT149_FN3),
- PINMUX_DATA(MFG0_IN2_MARK, PORT150_FN1),
- PINMUX_DATA(TS_SPSYNC3_MARK, PORT151_FN1),
- PINMUX_DATA(MSIOF2_RSCK_MARK, PORT151_FN2),
- PINMUX_DATA(TS_SDAT3_MARK, PORT152_FN1),
- PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT152_FN2),
- PINMUX_DATA(TPU1TO2_MARK, PORT153_FN1),
- PINMUX_DATA(TS_SDEN3_MARK, PORT153_FN2),
- PINMUX_DATA(PORT153_MSIOF2_SS1_MARK, PORT153_FN3),
- PINMUX_DATA(SOUT3_MARK, PORT154_FN1),
- PINMUX_DATA(SCIFA2_TXD1_MARK, PORT154_FN2),
- PINMUX_DATA(MSIOF2_MCK0_MARK, PORT154_FN3),
- PINMUX_DATA(SIN3_MARK, PORT155_FN1),
- PINMUX_DATA(SCIFA2_RXD1_MARK, PORT155_FN2),
- PINMUX_DATA(MSIOF2_MCK1_MARK, PORT155_FN3),
- PINMUX_DATA(XRTS3_MARK, PORT156_FN1),
- PINMUX_DATA(SCIFA2_RTS1_MARK, PORT156_FN2),
- PINMUX_DATA(PORT156_MSIOF2_SS2_MARK, PORT156_FN3),
- PINMUX_DATA(XCTS3_MARK, PORT157_FN1),
- PINMUX_DATA(SCIFA2_CTS1_MARK, PORT157_FN2),
- PINMUX_DATA(PORT157_MSIOF2_RXD_MARK, PORT157_FN3),
-
- /* 55-4 (FN) */
- PINMUX_DATA(DINT_MARK, PORT158_FN1),
- PINMUX_DATA(SCIFA2_SCK1_MARK, PORT158_FN2),
- PINMUX_DATA(TS_SCK3_MARK, PORT158_FN3),
- PINMUX_DATA(PORT159_SCIFB_SCK_MARK, PORT159_FN1),
- PINMUX_DATA(PORT159_SCIFA5_SCK_MARK, PORT159_FN2),
- PINMUX_DATA(NMI_MARK, PORT159_FN3),
- PINMUX_DATA(PORT160_SCIFB_TXD_MARK, PORT160_FN1),
- PINMUX_DATA(PORT160_SCIFA5_TXD_MARK, PORT160_FN2),
- PINMUX_DATA(SOUT0_MARK, PORT160_FN3),
- PINMUX_DATA(PORT161_SCIFB_CTS_MARK, PORT161_FN1),
- PINMUX_DATA(PORT161_SCIFA5_CTS_MARK, PORT161_FN2),
- PINMUX_DATA(XCTS0_MARK, PORT161_FN3),
- PINMUX_DATA(MFG3_IN2_MARK, PORT161_FN4),
- PINMUX_DATA(PORT162_SCIFB_RXD_MARK, PORT162_FN1),
- PINMUX_DATA(PORT162_SCIFA5_RXD_MARK, PORT162_FN2),
- PINMUX_DATA(SIN0_MARK, PORT162_FN3),
- PINMUX_DATA(MFG3_IN1_MARK, PORT162_FN4),
- PINMUX_DATA(PORT163_SCIFB_RTS_MARK, PORT163_FN1),
- PINMUX_DATA(PORT163_SCIFA5_RTS_MARK, PORT163_FN2),
- PINMUX_DATA(XRTS0_MARK, PORT163_FN3),
- PINMUX_DATA(MFG3_OUT1_MARK, PORT163_FN4),
- PINMUX_DATA(TPU3TO0_MARK, PORT163_FN5),
- PINMUX_DATA(LCDD0_MARK, PORT192_FN1),
- PINMUX_DATA(PORT192_KEYOUT0_MARK, PORT192_FN2),
- PINMUX_DATA(EXT_CKI_MARK, PORT192_FN3),
- PINMUX_DATA(LCDD1_MARK, PORT193_FN1),
- PINMUX_DATA(PORT193_KEYOUT1_MARK, PORT193_FN2),
- PINMUX_DATA(PORT193_SCIFA5_CTS_MARK, PORT193_FN3),
- PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT193_FN4),
- PINMUX_DATA(LCDD2_MARK, PORT194_FN1),
- PINMUX_DATA(PORT194_KEYOUT2_MARK, PORT194_FN2),
- PINMUX_DATA(PORT194_SCIFA5_RTS_MARK, PORT194_FN3),
- PINMUX_DATA(BBIF2_TSCK1_MARK, PORT194_FN4),
- PINMUX_DATA(LCDD3_MARK, PORT195_FN1),
- PINMUX_DATA(PORT195_KEYOUT3_MARK, PORT195_FN2),
- PINMUX_DATA(PORT195_SCIFA5_RXD_MARK, PORT195_FN3),
- PINMUX_DATA(BBIF2_TXD1_MARK, PORT195_FN4),
- PINMUX_DATA(LCDD4_MARK, PORT196_FN1),
- PINMUX_DATA(PORT196_KEYOUT4_MARK, PORT196_FN2),
- PINMUX_DATA(PORT196_SCIFA5_TXD_MARK, PORT196_FN3),
- PINMUX_DATA(LCDD5_MARK, PORT197_FN1),
- PINMUX_DATA(PORT197_KEYOUT5_MARK, PORT197_FN2),
- PINMUX_DATA(PORT197_SCIFA5_SCK_MARK, PORT197_FN3),
- PINMUX_DATA(MFG2_OUT2_MARK, PORT197_FN4),
- PINMUX_DATA(LCDD6_MARK, PORT198_FN1),
- PINMUX_DATA(LCDD7_MARK, PORT199_FN1),
- PINMUX_DATA(TPU4TO1_MARK, PORT199_FN2),
- PINMUX_DATA(MFG4_OUT2_MARK, PORT199_FN3),
- PINMUX_DATA(LCDD8_MARK, PORT200_FN1),
- PINMUX_DATA(PORT200_KEYIN0_MARK, PORT200_FN2),
- PINMUX_DATA(VIO_DR0_MARK, PORT200_FN3),
- PINMUX_DATA(D16_MARK, PORT200_FN4),
- PINMUX_DATA(LCDD9_MARK, PORT201_FN1),
- PINMUX_DATA(PORT201_KEYIN1_MARK, PORT201_FN2),
- PINMUX_DATA(VIO_DR1_MARK, PORT201_FN3),
- PINMUX_DATA(D17_MARK, PORT201_FN4),
- PINMUX_DATA(LCDD10_MARK, PORT202_FN1),
- PINMUX_DATA(PORT202_KEYIN2_MARK, PORT202_FN2),
- PINMUX_DATA(VIO_DR2_MARK, PORT202_FN3),
- PINMUX_DATA(D18_MARK, PORT202_FN4),
- PINMUX_DATA(LCDD11_MARK, PORT203_FN1),
- PINMUX_DATA(PORT203_KEYIN3_MARK, PORT203_FN2),
- PINMUX_DATA(VIO_DR3_MARK, PORT203_FN3),
- PINMUX_DATA(D19_MARK, PORT203_FN4),
- PINMUX_DATA(LCDD12_MARK, PORT204_FN1),
- PINMUX_DATA(PORT204_KEYIN4_MARK, PORT204_FN2),
- PINMUX_DATA(VIO_DR4_MARK, PORT204_FN3),
- PINMUX_DATA(D20_MARK, PORT204_FN4),
- PINMUX_DATA(LCDD13_MARK, PORT205_FN1),
- PINMUX_DATA(PORT205_KEYIN5_MARK, PORT205_FN2),
- PINMUX_DATA(VIO_DR5_MARK, PORT205_FN3),
- PINMUX_DATA(D21_MARK, PORT205_FN4),
- PINMUX_DATA(LCDD14_MARK, PORT206_FN1),
- PINMUX_DATA(PORT206_KEYIN6_MARK, PORT206_FN2),
- PINMUX_DATA(VIO_DR6_MARK, PORT206_FN3),
- PINMUX_DATA(D22_MARK, PORT206_FN4),
- PINMUX_DATA(LCDD15_MARK, PORT207_FN1),
- PINMUX_DATA(PORT207_MSIOF0L_SS1_MARK, PORT207_FN2),
- PINMUX_DATA(PORT207_KEYOUT0_MARK, PORT207_FN3),
- PINMUX_DATA(VIO_DR7_MARK, PORT207_FN4),
- PINMUX_DATA(D23_MARK, PORT207_FN5),
- PINMUX_DATA(LCDD16_MARK, PORT208_FN1),
- PINMUX_DATA(PORT208_MSIOF0L_SS2_MARK, PORT208_FN2),
- PINMUX_DATA(PORT208_KEYOUT1_MARK, PORT208_FN3),
- PINMUX_DATA(VIO_VDR_MARK, PORT208_FN4),
- PINMUX_DATA(D24_MARK, PORT208_FN5),
- PINMUX_DATA(LCDD17_MARK, PORT209_FN1),
- PINMUX_DATA(PORT209_KEYOUT2_MARK, PORT209_FN2),
- PINMUX_DATA(VIO_HDR_MARK, PORT209_FN3),
- PINMUX_DATA(D25_MARK, PORT209_FN4),
- PINMUX_DATA(LCDD18_MARK, PORT210_FN1),
- PINMUX_DATA(DREQ2_MARK, PORT210_FN2),
- PINMUX_DATA(PORT210_MSIOF0L_SS1_MARK, PORT210_FN3),
- PINMUX_DATA(D26_MARK, PORT210_FN4),
- PINMUX_DATA(LCDD19_MARK, PORT211_FN1),
- PINMUX_DATA(PORT211_MSIOF0L_SS2_MARK, PORT211_FN2),
- PINMUX_DATA(D27_MARK, PORT211_FN3),
- PINMUX_DATA(LCDD20_MARK, PORT212_FN1),
- PINMUX_DATA(TS_SPSYNC1_MARK, PORT212_FN2),
- PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT212_FN3),
- PINMUX_DATA(D28_MARK, PORT212_FN4),
- PINMUX_DATA(LCDD21_MARK, PORT213_FN1),
- PINMUX_DATA(TS_SDAT1_MARK, PORT213_FN2),
- PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT213_FN3),
- PINMUX_DATA(D29_MARK, PORT213_FN4),
- PINMUX_DATA(LCDD22_MARK, PORT214_FN1),
- PINMUX_DATA(TS_SDEN1_MARK, PORT214_FN2),
- PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT214_FN3),
- PINMUX_DATA(D30_MARK, PORT214_FN4),
- PINMUX_DATA(LCDD23_MARK, PORT215_FN1),
- PINMUX_DATA(TS_SCK1_MARK, PORT215_FN2),
- PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT215_FN3),
- PINMUX_DATA(D31_MARK, PORT215_FN4),
- PINMUX_DATA(LCDDCK_MARK, PORT216_FN1),
- PINMUX_DATA(LCDWR_MARK, PORT216_FN2),
- PINMUX_DATA(PORT216_KEYOUT3_MARK, PORT216_FN3),
- PINMUX_DATA(VIO_CLKR_MARK, PORT216_FN4),
- PINMUX_DATA(LCDRD_MARK, PORT217_FN1),
- PINMUX_DATA(DACK2_MARK, PORT217_FN2),
- PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT217_FN3),
- PINMUX_DATA(LCDHSYN_MARK, PORT218_FN1),
- PINMUX_DATA(LCDCS_MARK, PORT218_FN2),
- PINMUX_DATA(LCDCS2_MARK, PORT218_FN3),
- PINMUX_DATA(DACK3_MARK, PORT218_FN4),
- PINMUX_DATA(PORT218_VIO_CKOR_MARK, PORT218_FN5),
- PINMUX_DATA(PORT218_KEYOUT4_MARK, PORT218_FN6),
- PINMUX_DATA(LCDDISP_MARK, PORT219_FN1),
- PINMUX_DATA(LCDRS_MARK, PORT219_FN2),
- PINMUX_DATA(DREQ3_MARK, PORT219_FN3),
- PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT219_FN4),
- PINMUX_DATA(LCDVSYN_MARK, PORT220_FN1),
- PINMUX_DATA(LCDVSYN2_MARK, PORT220_FN2),
- PINMUX_DATA(PORT220_KEYOUT5_MARK, PORT220_FN3),
- PINMUX_DATA(LCDLCLK_MARK, PORT221_FN1),
- PINMUX_DATA(DREQ1_MARK, PORT221_FN2),
- PINMUX_DATA(PWEN_MARK, PORT221_FN3),
- PINMUX_DATA(MSIOF0L_RXD_MARK, PORT221_FN4),
- PINMUX_DATA(LCDDON_MARK, PORT222_FN1),
- PINMUX_DATA(LCDDON2_MARK, PORT222_FN2),
- PINMUX_DATA(DACK1_MARK, PORT222_FN3),
- PINMUX_DATA(OVCN_MARK, PORT222_FN4),
- PINMUX_DATA(MSIOF0L_TXD_MARK, PORT222_FN5),
- PINMUX_DATA(SCIFA1_TXD_MARK, PORT225_FN1),
- PINMUX_DATA(OVCN2_MARK, PORT225_FN2),
- PINMUX_DATA(EXTLP_MARK, PORT226_FN1),
- PINMUX_DATA(SCIFA1_SCK_MARK, PORT226_FN2),
- PINMUX_DATA(USBTERM_MARK, PORT226_FN3),
- PINMUX_DATA(PORT226_VIO_CKO2_MARK, PORT226_FN4),
- PINMUX_DATA(SCIFA1_RTS_MARK, PORT227_FN1),
- PINMUX_DATA(IDIN_MARK, PORT227_FN2),
- PINMUX_DATA(SCIFA1_RXD_MARK, PORT228_FN1),
- PINMUX_DATA(SCIFA1_CTS_MARK, PORT229_FN1),
- PINMUX_DATA(MFG1_IN1_MARK, PORT229_FN2),
- PINMUX_DATA(MSIOF1_TXD_MARK, PORT230_FN1),
- PINMUX_DATA(SCIFA2_TXD2_MARK, PORT230_FN2),
- PINMUX_DATA(PORT230_FSIAOMC_MARK, PORT230_FN3),
- PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT231_FN1),
- PINMUX_DATA(SCIFA2_CTS2_MARK, PORT231_FN2),
- PINMUX_DATA(PORT231_FSIAOLR_MARK, PORT231_FN3),
- PINMUX_DATA(MSIOF1_TSCK_MARK, PORT232_FN1),
- PINMUX_DATA(SCIFA2_SCK2_MARK, PORT232_FN2),
- PINMUX_DATA(PORT232_FSIAOBT_MARK, PORT232_FN3),
- PINMUX_DATA(MSIOF1_RXD_MARK, PORT233_FN1),
- PINMUX_DATA(SCIFA2_RXD2_MARK, PORT233_FN2),
- PINMUX_DATA(GPS_VCOTRIG_MARK, PORT233_FN3),
- PINMUX_DATA(PORT233_FSIACK_MARK, PORT233_FN4),
- PINMUX_DATA(MSIOF1_RSCK_MARK, PORT234_FN1),
- PINMUX_DATA(SCIFA2_RTS2_MARK, PORT234_FN2),
- PINMUX_DATA(PORT234_FSIAOSLD_MARK, PORT234_FN3),
- PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT235_FN1),
- PINMUX_DATA(OPORT0_MARK, PORT235_FN2),
- PINMUX_DATA(MFG1_IN2_MARK, PORT235_FN3),
- PINMUX_DATA(PORT235_FSIAILR_MARK, PORT235_FN4),
- PINMUX_DATA(MSIOF1_MCK0_MARK, PORT236_FN1),
- PINMUX_DATA(I2C_SDA2_MARK, PORT236_FN2),
- PINMUX_DATA(PORT236_FSIAIBT_MARK, PORT236_FN3),
- PINMUX_DATA(MSIOF1_MCK1_MARK, PORT237_FN1),
- PINMUX_DATA(I2C_SCL2_MARK, PORT237_FN2),
- PINMUX_DATA(PORT237_FSIAISLD_MARK, PORT237_FN3),
- PINMUX_DATA(MSIOF1_SS1_MARK, PORT238_FN1),
- PINMUX_DATA(EDBGREQ3_MARK, PORT238_FN2),
-
- /* 55-5 (FN) */
- PINMUX_DATA(MSIOF1_SS2_MARK, PORT239_FN1),
- PINMUX_DATA(SCIFA6_TXD_MARK, PORT240_FN1),
- PINMUX_DATA(PORT241_IRDA_OUT_MARK, PORT241_FN1),
- PINMUX_DATA(PORT241_IROUT_MARK, PORT241_FN2),
- PINMUX_DATA(MFG4_OUT1_MARK, PORT241_FN3),
- PINMUX_DATA(TPU4TO0_MARK, PORT241_FN4),
- PINMUX_DATA(PORT242_IRDA_IN_MARK, PORT242_FN1),
- PINMUX_DATA(MFG4_IN2_MARK, PORT242_FN2),
- PINMUX_DATA(PORT243_IRDA_FIRSEL_MARK, PORT243_FN1),
- PINMUX_DATA(PORT243_VIO_CKO2_MARK, PORT243_FN2),
- PINMUX_DATA(PORT244_SCIFA5_CTS_MARK, PORT244_FN1),
- PINMUX_DATA(MFG2_IN1_MARK, PORT244_FN2),
- PINMUX_DATA(PORT244_SCIFB_CTS_MARK, PORT244_FN3),
- PINMUX_DATA(PORT245_SCIFA5_RTS_MARK, PORT245_FN1),
- PINMUX_DATA(MFG2_IN2_MARK, PORT245_FN2),
- PINMUX_DATA(PORT245_SCIFB_RTS_MARK, PORT245_FN3),
- PINMUX_DATA(PORT246_SCIFA5_RXD_MARK, PORT246_FN1),
- PINMUX_DATA(MFG1_OUT1_MARK, PORT246_FN2),
- PINMUX_DATA(PORT246_SCIFB_RXD_MARK, PORT246_FN3),
- PINMUX_DATA(TPU1TO0_MARK, PORT246_FN4),
- PINMUX_DATA(PORT247_SCIFA5_TXD_MARK, PORT247_FN1),
- PINMUX_DATA(MFG3_OUT2_MARK, PORT247_FN2),
- PINMUX_DATA(PORT247_SCIFB_TXD_MARK, PORT247_FN3),
- PINMUX_DATA(TPU3TO1_MARK, PORT247_FN4),
- PINMUX_DATA(PORT248_SCIFA5_SCK_MARK, PORT248_FN1),
- PINMUX_DATA(MFG2_OUT1_MARK, PORT248_FN2),
- PINMUX_DATA(PORT248_SCIFB_SCK_MARK, PORT248_FN3),
- PINMUX_DATA(TPU2TO0_MARK, PORT248_FN4),
- PINMUX_DATA(PORT249_IROUT_MARK, PORT249_FN1),
- PINMUX_DATA(MFG4_IN1_MARK, PORT249_FN2),
- PINMUX_DATA(SDHICLK0_MARK, PORT250_FN1),
- PINMUX_DATA(TCK2_SWCLK_MC0_MARK, PORT250_FN2),
- PINMUX_DATA(SDHICD0_MARK, PORT251_FN1),
- PINMUX_DATA(SDHID0_0_MARK, PORT252_FN1),
- PINMUX_DATA(TMS2_SWDIO_MC0_MARK, PORT252_FN2),
- PINMUX_DATA(SDHID0_1_MARK, PORT253_FN1),
- PINMUX_DATA(TDO2_SWO0_MC0_MARK, PORT253_FN2),
- PINMUX_DATA(SDHID0_2_MARK, PORT254_FN1),
- PINMUX_DATA(TDI2_MARK, PORT254_FN2),
- PINMUX_DATA(SDHID0_3_MARK, PORT255_FN1),
- PINMUX_DATA(RTCK2_SWO1_MC0_MARK, PORT255_FN2),
- PINMUX_DATA(SDHICMD0_MARK, PORT256_FN1),
- PINMUX_DATA(TRST2_MARK, PORT256_FN2),
- PINMUX_DATA(SDHIWP0_MARK, PORT257_FN1),
- PINMUX_DATA(EDBGREQ2_MARK, PORT257_FN2),
- PINMUX_DATA(SDHICLK1_MARK, PORT258_FN1),
- PINMUX_DATA(TCK3_SWCLK_MC1_MARK, PORT258_FN2),
- PINMUX_DATA(SDHID1_0_MARK, PORT259_FN1),
- PINMUX_DATA(M11_SLCD_SO2_MARK, PORT259_FN2),
- PINMUX_DATA(TS_SPSYNC2_MARK, PORT259_FN3),
- PINMUX_DATA(TMS3_SWDIO_MC1_MARK, PORT259_FN4),
- PINMUX_DATA(SDHID1_1_MARK, PORT260_FN1),
- PINMUX_DATA(M9_SLCD_A02_MARK, PORT260_FN2),
- PINMUX_DATA(TS_SDAT2_MARK, PORT260_FN3),
- PINMUX_DATA(TDO3_SWO0_MC1_MARK, PORT260_FN4),
- PINMUX_DATA(SDHID1_2_MARK, PORT261_FN1),
- PINMUX_DATA(M10_SLCD_CK2_MARK, PORT261_FN2),
- PINMUX_DATA(TS_SDEN2_MARK, PORT261_FN3),
- PINMUX_DATA(TDI3_MARK, PORT261_FN4),
- PINMUX_DATA(SDHID1_3_MARK, PORT262_FN1),
- PINMUX_DATA(M12_SLCD_CE2_MARK, PORT262_FN2),
- PINMUX_DATA(TS_SCK2_MARK, PORT262_FN3),
- PINMUX_DATA(RTCK3_SWO1_MC1_MARK, PORT262_FN4),
- PINMUX_DATA(SDHICMD1_MARK, PORT263_FN1),
- PINMUX_DATA(TRST3_MARK, PORT263_FN2),
- PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1),
-};
-
-static struct pinmux_gpio pinmux_gpios[] = {
- /* 55-1 -> 55-5 (GPIO) */
- GPIO_PORT_ALL(),
-
- /* Special Pull-up / Pull-down Functions */
- GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU),
- GPIO_FN(PORT68_KEYIN2_PU), GPIO_FN(PORT69_KEYIN3_PU),
- GPIO_FN(PORT70_KEYIN4_PU), GPIO_FN(PORT71_KEYIN5_PU),
- GPIO_FN(PORT72_KEYIN6_PU),
-
- /* 55-1 (FN) */
- GPIO_FN(VBUS_0),
- GPIO_FN(CPORT0),
- GPIO_FN(CPORT1),
- GPIO_FN(CPORT2),
- GPIO_FN(CPORT3),
- GPIO_FN(CPORT4),
- GPIO_FN(CPORT5),
- GPIO_FN(CPORT6),
- GPIO_FN(CPORT7),
- GPIO_FN(CPORT8),
- GPIO_FN(CPORT9),
- GPIO_FN(CPORT10),
- GPIO_FN(CPORT11), GPIO_FN(SIN2),
- GPIO_FN(CPORT12), GPIO_FN(XCTS2),
- GPIO_FN(CPORT13), GPIO_FN(RFSPO4),
- GPIO_FN(CPORT14), GPIO_FN(RFSPO5),
- GPIO_FN(CPORT15), GPIO_FN(SCIFA0_SCK), GPIO_FN(GPS_AGC2),
- GPIO_FN(CPORT16), GPIO_FN(SCIFA0_TXD), GPIO_FN(GPS_AGC3),
- GPIO_FN(CPORT17_IC_OE), GPIO_FN(SOUT2),
- GPIO_FN(CPORT18), GPIO_FN(XRTS2), GPIO_FN(PORT19_VIO_CKO2),
- GPIO_FN(CPORT19_MPORT1),
- GPIO_FN(CPORT20), GPIO_FN(RFSPO6),
- GPIO_FN(CPORT21), GPIO_FN(STATUS0),
- GPIO_FN(CPORT22), GPIO_FN(STATUS1),
- GPIO_FN(CPORT23), GPIO_FN(STATUS2), GPIO_FN(RFSPO7),
- GPIO_FN(B_SYNLD1),
- GPIO_FN(B_SYNLD2), GPIO_FN(SYSENMSK),
- GPIO_FN(XMAINPS),
- GPIO_FN(XDIVPS),
- GPIO_FN(XIDRST),
- GPIO_FN(IDCLK), GPIO_FN(IC_DP),
- GPIO_FN(IDIO), GPIO_FN(IC_DM),
- GPIO_FN(SOUT1), GPIO_FN(SCIFA4_TXD), GPIO_FN(M02_BERDAT),
- GPIO_FN(SIN1), GPIO_FN(SCIFA4_RXD), GPIO_FN(XWUP),
- GPIO_FN(XRTS1), GPIO_FN(SCIFA4_RTS), GPIO_FN(M03_BERCLK),
- GPIO_FN(XCTS1), GPIO_FN(SCIFA4_CTS),
- GPIO_FN(PCMCLKO),
- GPIO_FN(SYNC8KO),
-
- /* 55-2 (FN) */
- GPIO_FN(DNPCM_A),
- GPIO_FN(UPPCM_A),
- GPIO_FN(VACK),
- GPIO_FN(XTALB1L),
- GPIO_FN(GPS_AGC1), GPIO_FN(SCIFA0_RTS),
- GPIO_FN(GPS_AGC4), GPIO_FN(SCIFA0_RXD),
- GPIO_FN(GPS_PWRDOWN), GPIO_FN(SCIFA0_CTS),
- GPIO_FN(GPS_IM),
- GPIO_FN(GPS_IS),
- GPIO_FN(GPS_QM),
- GPIO_FN(GPS_QS),
- GPIO_FN(FMSOCK), GPIO_FN(PORT49_IRDA_OUT), GPIO_FN(PORT49_IROUT),
- GPIO_FN(FMSOOLR), GPIO_FN(BBIF2_TSYNC2), GPIO_FN(TPU2TO2),
- GPIO_FN(IPORT3), GPIO_FN(FMSIOLR),
- GPIO_FN(FMSOOBT), GPIO_FN(BBIF2_TSCK2), GPIO_FN(TPU2TO3),
- GPIO_FN(OPORT1), GPIO_FN(FMSIOBT),
- GPIO_FN(FMSOSLD), GPIO_FN(BBIF2_TXD2), GPIO_FN(OPORT2),
- GPIO_FN(FMSOILR), GPIO_FN(PORT53_IRDA_IN), GPIO_FN(TPU3TO3),
- GPIO_FN(OPORT3), GPIO_FN(FMSIILR),
- GPIO_FN(FMSOIBT), GPIO_FN(PORT54_IRDA_FIRSEL), GPIO_FN(TPU3TO2),
- GPIO_FN(FMSIIBT),
- GPIO_FN(FMSISLD), GPIO_FN(MFG0_OUT1), GPIO_FN(TPU0TO0),
- GPIO_FN(A0_EA0), GPIO_FN(BS),
- GPIO_FN(A12_EA12), GPIO_FN(PORT58_VIO_CKOR), GPIO_FN(TPU4TO2),
- GPIO_FN(A13_EA13), GPIO_FN(PORT59_IROUT), GPIO_FN(MFG0_OUT2),
- GPIO_FN(TPU0TO1),
- GPIO_FN(A14_EA14), GPIO_FN(PORT60_KEYOUT5),
- GPIO_FN(A15_EA15), GPIO_FN(PORT61_KEYOUT4),
- GPIO_FN(A16_EA16), GPIO_FN(PORT62_KEYOUT3), GPIO_FN(MSIOF0_SS1),
- GPIO_FN(A17_EA17), GPIO_FN(PORT63_KEYOUT2), GPIO_FN(MSIOF0_TSYNC),
- GPIO_FN(A18_EA18), GPIO_FN(PORT64_KEYOUT1), GPIO_FN(MSIOF0_TSCK),
- GPIO_FN(A19_EA19), GPIO_FN(PORT65_KEYOUT0), GPIO_FN(MSIOF0_TXD),
- GPIO_FN(A20_EA20), GPIO_FN(PORT66_KEYIN0), GPIO_FN(MSIOF0_RSCK),
- GPIO_FN(A21_EA21), GPIO_FN(PORT67_KEYIN1), GPIO_FN(MSIOF0_RSYNC),
- GPIO_FN(A22_EA22), GPIO_FN(PORT68_KEYIN2), GPIO_FN(MSIOF0_MCK0),
- GPIO_FN(A23_EA23), GPIO_FN(PORT69_KEYIN3), GPIO_FN(MSIOF0_MCK1),
- GPIO_FN(A24_EA24), GPIO_FN(PORT70_KEYIN4), GPIO_FN(MSIOF0_RXD),
- GPIO_FN(A25_EA25), GPIO_FN(PORT71_KEYIN5), GPIO_FN(MSIOF0_SS2),
- GPIO_FN(A26), GPIO_FN(PORT72_KEYIN6),
- GPIO_FN(D0_ED0_NAF0),
- GPIO_FN(D1_ED1_NAF1),
- GPIO_FN(D2_ED2_NAF2),
- GPIO_FN(D3_ED3_NAF3),
- GPIO_FN(D4_ED4_NAF4),
- GPIO_FN(D5_ED5_NAF5),
- GPIO_FN(D6_ED6_NAF6),
- GPIO_FN(D7_ED7_NAF7),
- GPIO_FN(D8_ED8_NAF8),
- GPIO_FN(D9_ED9_NAF9),
- GPIO_FN(D10_ED10_NAF10),
- GPIO_FN(D11_ED11_NAF11),
- GPIO_FN(D12_ED12_NAF12),
- GPIO_FN(D13_ED13_NAF13),
- GPIO_FN(D14_ED14_NAF14),
- GPIO_FN(D15_ED15_NAF15),
- GPIO_FN(CS4),
- GPIO_FN(CS5A), GPIO_FN(FMSICK),
-
- /* 55-3 (FN) */
- GPIO_FN(CS5B), GPIO_FN(FCE1),
- GPIO_FN(CS6B), GPIO_FN(XCS2), GPIO_FN(CS6A), GPIO_FN(DACK0),
- GPIO_FN(FCE0),
- GPIO_FN(WAIT), GPIO_FN(DREQ0),
- GPIO_FN(RD_XRD),
- GPIO_FN(WE0_XWR0_FWE),
- GPIO_FN(WE1_XWR1),
- GPIO_FN(FRB),
- GPIO_FN(CKO),
- GPIO_FN(NBRSTOUT),
- GPIO_FN(NBRST),
- GPIO_FN(GPS_EPPSIN),
- GPIO_FN(LATCHPULSE),
- GPIO_FN(LTESIGNAL),
- GPIO_FN(LEGACYSTATE),
- GPIO_FN(TCKON),
- GPIO_FN(VIO_VD), GPIO_FN(PORT128_KEYOUT0), GPIO_FN(IPORT0),
- GPIO_FN(VIO_HD), GPIO_FN(PORT129_KEYOUT1), GPIO_FN(IPORT1),
- GPIO_FN(VIO_D0), GPIO_FN(PORT130_KEYOUT2), GPIO_FN(PORT130_MSIOF2_RXD),
- GPIO_FN(VIO_D1), GPIO_FN(PORT131_KEYOUT3), GPIO_FN(PORT131_MSIOF2_SS1),
- GPIO_FN(VIO_D2), GPIO_FN(PORT132_KEYOUT4), GPIO_FN(PORT132_MSIOF2_SS2),
- GPIO_FN(VIO_D3), GPIO_FN(PORT133_KEYOUT5),
- GPIO_FN(PORT133_MSIOF2_TSYNC),
- GPIO_FN(VIO_D4), GPIO_FN(PORT134_KEYIN0), GPIO_FN(PORT134_MSIOF2_TXD),
- GPIO_FN(VIO_D5), GPIO_FN(PORT135_KEYIN1), GPIO_FN(PORT135_MSIOF2_TSCK),
- GPIO_FN(VIO_D6), GPIO_FN(PORT136_KEYIN2),
- GPIO_FN(VIO_D7), GPIO_FN(PORT137_KEYIN3),
- GPIO_FN(VIO_D8), GPIO_FN(M9_SLCD_A01), GPIO_FN(PORT138_FSIAOMC),
- GPIO_FN(VIO_D9), GPIO_FN(M10_SLCD_CK1), GPIO_FN(PORT139_FSIAOLR),
- GPIO_FN(VIO_D10), GPIO_FN(M11_SLCD_SO1), GPIO_FN(TPU0TO2),
- GPIO_FN(PORT140_FSIAOBT),
- GPIO_FN(VIO_D11), GPIO_FN(M12_SLCD_CE1), GPIO_FN(TPU0TO3),
- GPIO_FN(PORT141_FSIAOSLD),
- GPIO_FN(VIO_D12), GPIO_FN(M13_BSW), GPIO_FN(PORT142_FSIACK),
- GPIO_FN(VIO_D13), GPIO_FN(M14_GSW), GPIO_FN(PORT143_FSIAILR),
- GPIO_FN(VIO_D14), GPIO_FN(M15_RSW), GPIO_FN(PORT144_FSIAIBT),
- GPIO_FN(VIO_D15), GPIO_FN(TPU1TO3), GPIO_FN(PORT145_FSIAISLD),
- GPIO_FN(VIO_CLK), GPIO_FN(PORT146_KEYIN4), GPIO_FN(IPORT2),
- GPIO_FN(VIO_FIELD), GPIO_FN(PORT147_KEYIN5),
- GPIO_FN(VIO_CKO), GPIO_FN(PORT148_KEYIN6),
- GPIO_FN(A27), GPIO_FN(RDWR_XWE), GPIO_FN(MFG0_IN1),
- GPIO_FN(MFG0_IN2),
- GPIO_FN(TS_SPSYNC3), GPIO_FN(MSIOF2_RSCK),
- GPIO_FN(TS_SDAT3), GPIO_FN(MSIOF2_RSYNC),
- GPIO_FN(TPU1TO2), GPIO_FN(TS_SDEN3), GPIO_FN(PORT153_MSIOF2_SS1),
- GPIO_FN(SOUT3), GPIO_FN(SCIFA2_TXD1), GPIO_FN(MSIOF2_MCK0),
- GPIO_FN(SIN3), GPIO_FN(SCIFA2_RXD1), GPIO_FN(MSIOF2_MCK1),
- GPIO_FN(XRTS3), GPIO_FN(SCIFA2_RTS1), GPIO_FN(PORT156_MSIOF2_SS2),
- GPIO_FN(XCTS3), GPIO_FN(SCIFA2_CTS1), GPIO_FN(PORT157_MSIOF2_RXD),
-
- /* 55-4 (FN) */
- GPIO_FN(DINT), GPIO_FN(SCIFA2_SCK1), GPIO_FN(TS_SCK3),
- GPIO_FN(PORT159_SCIFB_SCK), GPIO_FN(PORT159_SCIFA5_SCK), GPIO_FN(NMI),
- GPIO_FN(PORT160_SCIFB_TXD), GPIO_FN(PORT160_SCIFA5_TXD), GPIO_FN(SOUT0),
- GPIO_FN(PORT161_SCIFB_CTS), GPIO_FN(PORT161_SCIFA5_CTS), GPIO_FN(XCTS0),
- GPIO_FN(MFG3_IN2),
- GPIO_FN(PORT162_SCIFB_RXD), GPIO_FN(PORT162_SCIFA5_RXD), GPIO_FN(SIN0),
- GPIO_FN(MFG3_IN1),
- GPIO_FN(PORT163_SCIFB_RTS), GPIO_FN(PORT163_SCIFA5_RTS), GPIO_FN(XRTS0),
- GPIO_FN(MFG3_OUT1), GPIO_FN(TPU3TO0),
- GPIO_FN(LCDD0), GPIO_FN(PORT192_KEYOUT0), GPIO_FN(EXT_CKI),
- GPIO_FN(LCDD1), GPIO_FN(PORT193_KEYOUT1), GPIO_FN(PORT193_SCIFA5_CTS),
- GPIO_FN(BBIF2_TSYNC1),
- GPIO_FN(LCDD2), GPIO_FN(PORT194_KEYOUT2), GPIO_FN(PORT194_SCIFA5_RTS),
- GPIO_FN(BBIF2_TSCK1),
- GPIO_FN(LCDD3), GPIO_FN(PORT195_KEYOUT3), GPIO_FN(PORT195_SCIFA5_RXD),
- GPIO_FN(BBIF2_TXD1),
- GPIO_FN(LCDD4), GPIO_FN(PORT196_KEYOUT4), GPIO_FN(PORT196_SCIFA5_TXD),
- GPIO_FN(LCDD5), GPIO_FN(PORT197_KEYOUT5), GPIO_FN(PORT197_SCIFA5_SCK),
- GPIO_FN(MFG2_OUT2),
- GPIO_FN(LCDD6),
- GPIO_FN(LCDD7), GPIO_FN(TPU4TO1), GPIO_FN(MFG4_OUT2),
- GPIO_FN(LCDD8), GPIO_FN(PORT200_KEYIN0), GPIO_FN(VIO_DR0),
- GPIO_FN(D16),
- GPIO_FN(LCDD9), GPIO_FN(PORT201_KEYIN1), GPIO_FN(VIO_DR1),
- GPIO_FN(D17),
- GPIO_FN(LCDD10), GPIO_FN(PORT202_KEYIN2), GPIO_FN(VIO_DR2),
- GPIO_FN(D18),
- GPIO_FN(LCDD11), GPIO_FN(PORT203_KEYIN3), GPIO_FN(VIO_DR3),
- GPIO_FN(D19),
- GPIO_FN(LCDD12), GPIO_FN(PORT204_KEYIN4), GPIO_FN(VIO_DR4),
- GPIO_FN(D20),
- GPIO_FN(LCDD13), GPIO_FN(PORT205_KEYIN5), GPIO_FN(VIO_DR5),
- GPIO_FN(D21),
- GPIO_FN(LCDD14), GPIO_FN(PORT206_KEYIN6), GPIO_FN(VIO_DR6),
- GPIO_FN(D22),
- GPIO_FN(LCDD15), GPIO_FN(PORT207_MSIOF0L_SS1), GPIO_FN(PORT207_KEYOUT0),
- GPIO_FN(VIO_DR7), GPIO_FN(D23),
- GPIO_FN(LCDD16), GPIO_FN(PORT208_MSIOF0L_SS2), GPIO_FN(PORT208_KEYOUT1),
- GPIO_FN(VIO_VDR), GPIO_FN(D24),
- GPIO_FN(LCDD17), GPIO_FN(PORT209_KEYOUT2), GPIO_FN(VIO_HDR),
- GPIO_FN(D25),
- GPIO_FN(LCDD18), GPIO_FN(DREQ2), GPIO_FN(PORT210_MSIOF0L_SS1),
- GPIO_FN(D26),
- GPIO_FN(LCDD19), GPIO_FN(PORT211_MSIOF0L_SS2), GPIO_FN(D27),
- GPIO_FN(LCDD20), GPIO_FN(TS_SPSYNC1), GPIO_FN(MSIOF0L_MCK0),
- GPIO_FN(D28),
- GPIO_FN(LCDD21), GPIO_FN(TS_SDAT1), GPIO_FN(MSIOF0L_MCK1),
- GPIO_FN(D29),
- GPIO_FN(LCDD22), GPIO_FN(TS_SDEN1), GPIO_FN(MSIOF0L_RSCK),
- GPIO_FN(D30),
- GPIO_FN(LCDD23), GPIO_FN(TS_SCK1), GPIO_FN(MSIOF0L_RSYNC),
- GPIO_FN(D31),
- GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(PORT216_KEYOUT3),
- GPIO_FN(VIO_CLKR),
- GPIO_FN(LCDRD), GPIO_FN(DACK2), GPIO_FN(MSIOF0L_TSYNC),
- GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDCS2), GPIO_FN(DACK3),
- GPIO_FN(PORT218_VIO_CKOR), GPIO_FN(PORT218_KEYOUT4),
- GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(DREQ3), GPIO_FN(MSIOF0L_TSCK),
- GPIO_FN(LCDVSYN), GPIO_FN(LCDVSYN2), GPIO_FN(PORT220_KEYOUT5),
- GPIO_FN(LCDLCLK), GPIO_FN(DREQ1), GPIO_FN(PWEN), GPIO_FN(MSIOF0L_RXD),
- GPIO_FN(LCDDON), GPIO_FN(LCDDON2), GPIO_FN(DACK1), GPIO_FN(OVCN),
- GPIO_FN(MSIOF0L_TXD),
- GPIO_FN(SCIFA1_TXD), GPIO_FN(OVCN2),
- GPIO_FN(EXTLP), GPIO_FN(SCIFA1_SCK), GPIO_FN(USBTERM),
- GPIO_FN(PORT226_VIO_CKO2),
- GPIO_FN(SCIFA1_RTS), GPIO_FN(IDIN),
- GPIO_FN(SCIFA1_RXD),
- GPIO_FN(SCIFA1_CTS), GPIO_FN(MFG1_IN1),
- GPIO_FN(MSIOF1_TXD), GPIO_FN(SCIFA2_TXD2), GPIO_FN(PORT230_FSIAOMC),
- GPIO_FN(MSIOF1_TSYNC), GPIO_FN(SCIFA2_CTS2), GPIO_FN(PORT231_FSIAOLR),
- GPIO_FN(MSIOF1_TSCK), GPIO_FN(SCIFA2_SCK2), GPIO_FN(PORT232_FSIAOBT),
- GPIO_FN(MSIOF1_RXD), GPIO_FN(SCIFA2_RXD2), GPIO_FN(GPS_VCOTRIG),
- GPIO_FN(PORT233_FSIACK),
- GPIO_FN(MSIOF1_RSCK), GPIO_FN(SCIFA2_RTS2), GPIO_FN(PORT234_FSIAOSLD),
- GPIO_FN(MSIOF1_RSYNC), GPIO_FN(OPORT0), GPIO_FN(MFG1_IN2),
- GPIO_FN(PORT235_FSIAILR),
- GPIO_FN(MSIOF1_MCK0), GPIO_FN(I2C_SDA2), GPIO_FN(PORT236_FSIAIBT),
- GPIO_FN(MSIOF1_MCK1), GPIO_FN(I2C_SCL2), GPIO_FN(PORT237_FSIAISLD),
- GPIO_FN(MSIOF1_SS1), GPIO_FN(EDBGREQ3),
-
- /* 55-5 (FN) */
- GPIO_FN(MSIOF1_SS2),
- GPIO_FN(SCIFA6_TXD),
- GPIO_FN(PORT241_IRDA_OUT), GPIO_FN(PORT241_IROUT), GPIO_FN(MFG4_OUT1),
- GPIO_FN(TPU4TO0),
- GPIO_FN(PORT242_IRDA_IN), GPIO_FN(MFG4_IN2),
- GPIO_FN(PORT243_IRDA_FIRSEL), GPIO_FN(PORT243_VIO_CKO2),
- GPIO_FN(PORT244_SCIFA5_CTS), GPIO_FN(MFG2_IN1),
- GPIO_FN(PORT244_SCIFB_CTS),
- GPIO_FN(PORT245_SCIFA5_RTS), GPIO_FN(MFG2_IN2),
- GPIO_FN(PORT245_SCIFB_RTS),
- GPIO_FN(PORT246_SCIFA5_RXD), GPIO_FN(MFG1_OUT1),
- GPIO_FN(PORT246_SCIFB_RXD), GPIO_FN(TPU1TO0),
- GPIO_FN(PORT247_SCIFA5_TXD), GPIO_FN(MFG3_OUT2),
- GPIO_FN(PORT247_SCIFB_TXD), GPIO_FN(TPU3TO1),
- GPIO_FN(PORT248_SCIFA5_SCK), GPIO_FN(MFG2_OUT1),
- GPIO_FN(PORT248_SCIFB_SCK), GPIO_FN(TPU2TO0),
- GPIO_FN(PORT249_IROUT), GPIO_FN(MFG4_IN1),
- GPIO_FN(SDHICLK0), GPIO_FN(TCK2_SWCLK_MC0),
- GPIO_FN(SDHICD0),
- GPIO_FN(SDHID0_0), GPIO_FN(TMS2_SWDIO_MC0),
- GPIO_FN(SDHID0_1), GPIO_FN(TDO2_SWO0_MC0),
- GPIO_FN(SDHID0_2), GPIO_FN(TDI2),
- GPIO_FN(SDHID0_3), GPIO_FN(RTCK2_SWO1_MC0),
- GPIO_FN(SDHICMD0), GPIO_FN(TRST2),
- GPIO_FN(SDHIWP0), GPIO_FN(EDBGREQ2),
- GPIO_FN(SDHICLK1), GPIO_FN(TCK3_SWCLK_MC1),
- GPIO_FN(SDHID1_0), GPIO_FN(M11_SLCD_SO2), GPIO_FN(TS_SPSYNC2),
- GPIO_FN(TMS3_SWDIO_MC1),
- GPIO_FN(SDHID1_1), GPIO_FN(M9_SLCD_A02), GPIO_FN(TS_SDAT2),
- GPIO_FN(TDO3_SWO0_MC1),
- GPIO_FN(SDHID1_2), GPIO_FN(M10_SLCD_CK2), GPIO_FN(TS_SDEN2),
- GPIO_FN(TDI3),
- GPIO_FN(SDHID1_3), GPIO_FN(M12_SLCD_CE2), GPIO_FN(TS_SCK2),
- GPIO_FN(RTCK3_SWO1_MC1),
- GPIO_FN(SDHICMD1), GPIO_FN(TRST3),
- GPIO_FN(RESETOUTS),
-};
-
-static struct pinmux_cfg_reg pinmux_config_regs[] = {
- PORTCR(0, 0xe6050000), /* PORT0CR */
- PORTCR(1, 0xe6050001), /* PORT1CR */
- PORTCR(2, 0xe6050002), /* PORT2CR */
- PORTCR(3, 0xe6050003), /* PORT3CR */
- PORTCR(4, 0xe6050004), /* PORT4CR */
- PORTCR(5, 0xe6050005), /* PORT5CR */
- PORTCR(6, 0xe6050006), /* PORT6CR */
- PORTCR(7, 0xe6050007), /* PORT7CR */
- PORTCR(8, 0xe6050008), /* PORT8CR */
- PORTCR(9, 0xe6050009), /* PORT9CR */
-
- PORTCR(10, 0xe605000a), /* PORT10CR */
- PORTCR(11, 0xe605000b), /* PORT11CR */
- PORTCR(12, 0xe605000c), /* PORT12CR */
- PORTCR(13, 0xe605000d), /* PORT13CR */
- PORTCR(14, 0xe605000e), /* PORT14CR */
- PORTCR(15, 0xe605000f), /* PORT15CR */
- PORTCR(16, 0xe6050010), /* PORT16CR */
- PORTCR(17, 0xe6050011), /* PORT17CR */
- PORTCR(18, 0xe6050012), /* PORT18CR */
- PORTCR(19, 0xe6050013), /* PORT19CR */
-
- PORTCR(20, 0xe6050014), /* PORT20CR */
- PORTCR(21, 0xe6050015), /* PORT21CR */
- PORTCR(22, 0xe6050016), /* PORT22CR */
- PORTCR(23, 0xe6050017), /* PORT23CR */
- PORTCR(24, 0xe6050018), /* PORT24CR */
- PORTCR(25, 0xe6050019), /* PORT25CR */
- PORTCR(26, 0xe605001a), /* PORT26CR */
- PORTCR(27, 0xe605001b), /* PORT27CR */
- PORTCR(28, 0xe605001c), /* PORT28CR */
- PORTCR(29, 0xe605001d), /* PORT29CR */
-
- PORTCR(30, 0xe605001e), /* PORT30CR */
- PORTCR(31, 0xe605001f), /* PORT31CR */
- PORTCR(32, 0xe6050020), /* PORT32CR */
- PORTCR(33, 0xe6050021), /* PORT33CR */
- PORTCR(34, 0xe6050022), /* PORT34CR */
- PORTCR(35, 0xe6050023), /* PORT35CR */
- PORTCR(36, 0xe6050024), /* PORT36CR */
- PORTCR(37, 0xe6050025), /* PORT37CR */
- PORTCR(38, 0xe6050026), /* PORT38CR */
- PORTCR(39, 0xe6050027), /* PORT39CR */
-
- PORTCR(40, 0xe6050028), /* PORT40CR */
- PORTCR(41, 0xe6050029), /* PORT41CR */
- PORTCR(42, 0xe605002a), /* PORT42CR */
- PORTCR(43, 0xe605002b), /* PORT43CR */
- PORTCR(44, 0xe605002c), /* PORT44CR */
- PORTCR(45, 0xe605002d), /* PORT45CR */
- PORTCR(46, 0xe605002e), /* PORT46CR */
- PORTCR(47, 0xe605002f), /* PORT47CR */
- PORTCR(48, 0xe6050030), /* PORT48CR */
- PORTCR(49, 0xe6050031), /* PORT49CR */
-
- PORTCR(50, 0xe6050032), /* PORT50CR */
- PORTCR(51, 0xe6050033), /* PORT51CR */
- PORTCR(52, 0xe6050034), /* PORT52CR */
- PORTCR(53, 0xe6050035), /* PORT53CR */
- PORTCR(54, 0xe6050036), /* PORT54CR */
- PORTCR(55, 0xe6050037), /* PORT55CR */
- PORTCR(56, 0xe6050038), /* PORT56CR */
- PORTCR(57, 0xe6050039), /* PORT57CR */
- PORTCR(58, 0xe605003a), /* PORT58CR */
- PORTCR(59, 0xe605003b), /* PORT59CR */
-
- PORTCR(60, 0xe605003c), /* PORT60CR */
- PORTCR(61, 0xe605003d), /* PORT61CR */
- PORTCR(62, 0xe605003e), /* PORT62CR */
- PORTCR(63, 0xe605003f), /* PORT63CR */
- PORTCR(64, 0xe6050040), /* PORT64CR */
- PORTCR(65, 0xe6050041), /* PORT65CR */
- PORTCR(66, 0xe6050042), /* PORT66CR */
- PORTCR(67, 0xe6050043), /* PORT67CR */
- PORTCR(68, 0xe6050044), /* PORT68CR */
- PORTCR(69, 0xe6050045), /* PORT69CR */
-
- PORTCR(70, 0xe6050046), /* PORT70CR */
- PORTCR(71, 0xe6050047), /* PORT71CR */
- PORTCR(72, 0xe6050048), /* PORT72CR */
- PORTCR(73, 0xe6050049), /* PORT73CR */
- PORTCR(74, 0xe605004a), /* PORT74CR */
- PORTCR(75, 0xe605004b), /* PORT75CR */
- PORTCR(76, 0xe605004c), /* PORT76CR */
- PORTCR(77, 0xe605004d), /* PORT77CR */
- PORTCR(78, 0xe605004e), /* PORT78CR */
- PORTCR(79, 0xe605004f), /* PORT79CR */
-
- PORTCR(80, 0xe6050050), /* PORT80CR */
- PORTCR(81, 0xe6050051), /* PORT81CR */
- PORTCR(82, 0xe6050052), /* PORT82CR */
- PORTCR(83, 0xe6050053), /* PORT83CR */
- PORTCR(84, 0xe6050054), /* PORT84CR */
- PORTCR(85, 0xe6050055), /* PORT85CR */
- PORTCR(86, 0xe6050056), /* PORT86CR */
- PORTCR(87, 0xe6050057), /* PORT87CR */
- PORTCR(88, 0xe6050058), /* PORT88CR */
- PORTCR(89, 0xe6050059), /* PORT89CR */
-
- PORTCR(90, 0xe605005a), /* PORT90CR */
- PORTCR(91, 0xe605005b), /* PORT91CR */
- PORTCR(92, 0xe605005c), /* PORT92CR */
- PORTCR(93, 0xe605005d), /* PORT93CR */
- PORTCR(94, 0xe605005e), /* PORT94CR */
- PORTCR(95, 0xe605005f), /* PORT95CR */
- PORTCR(96, 0xe6050060), /* PORT96CR */
- PORTCR(97, 0xe6050061), /* PORT97CR */
- PORTCR(98, 0xe6050062), /* PORT98CR */
- PORTCR(99, 0xe6050063), /* PORT99CR */
-
- PORTCR(100, 0xe6050064), /* PORT100CR */
- PORTCR(101, 0xe6050065), /* PORT101CR */
- PORTCR(102, 0xe6050066), /* PORT102CR */
- PORTCR(103, 0xe6050067), /* PORT103CR */
- PORTCR(104, 0xe6050068), /* PORT104CR */
- PORTCR(105, 0xe6050069), /* PORT105CR */
- PORTCR(106, 0xe605006a), /* PORT106CR */
- PORTCR(107, 0xe605006b), /* PORT107CR */
- PORTCR(108, 0xe605006c), /* PORT108CR */
- PORTCR(109, 0xe605006d), /* PORT109CR */
-
- PORTCR(110, 0xe605006e), /* PORT110CR */
- PORTCR(111, 0xe605006f), /* PORT111CR */
- PORTCR(112, 0xe6050070), /* PORT112CR */
- PORTCR(113, 0xe6050071), /* PORT113CR */
- PORTCR(114, 0xe6050072), /* PORT114CR */
- PORTCR(115, 0xe6050073), /* PORT115CR */
- PORTCR(116, 0xe6050074), /* PORT116CR */
- PORTCR(117, 0xe6050075), /* PORT117CR */
- PORTCR(118, 0xe6050076), /* PORT118CR */
-
- PORTCR(128, 0xe6051080), /* PORT128CR */
- PORTCR(129, 0xe6051081), /* PORT129CR */
-
- PORTCR(130, 0xe6051082), /* PORT130CR */
- PORTCR(131, 0xe6051083), /* PORT131CR */
- PORTCR(132, 0xe6051084), /* PORT132CR */
- PORTCR(133, 0xe6051085), /* PORT133CR */
- PORTCR(134, 0xe6051086), /* PORT134CR */
- PORTCR(135, 0xe6051087), /* PORT135CR */
- PORTCR(136, 0xe6051088), /* PORT136CR */
- PORTCR(137, 0xe6051089), /* PORT137CR */
- PORTCR(138, 0xe605108a), /* PORT138CR */
- PORTCR(139, 0xe605108b), /* PORT139CR */
-
- PORTCR(140, 0xe605108c), /* PORT140CR */
- PORTCR(141, 0xe605108d), /* PORT141CR */
- PORTCR(142, 0xe605108e), /* PORT142CR */
- PORTCR(143, 0xe605108f), /* PORT143CR */
- PORTCR(144, 0xe6051090), /* PORT144CR */
- PORTCR(145, 0xe6051091), /* PORT145CR */
- PORTCR(146, 0xe6051092), /* PORT146CR */
- PORTCR(147, 0xe6051093), /* PORT147CR */
- PORTCR(148, 0xe6051094), /* PORT148CR */
- PORTCR(149, 0xe6051095), /* PORT149CR */
-
- PORTCR(150, 0xe6051096), /* PORT150CR */
- PORTCR(151, 0xe6051097), /* PORT151CR */
- PORTCR(152, 0xe6051098), /* PORT152CR */
- PORTCR(153, 0xe6051099), /* PORT153CR */
- PORTCR(154, 0xe605109a), /* PORT154CR */
- PORTCR(155, 0xe605109b), /* PORT155CR */
- PORTCR(156, 0xe605109c), /* PORT156CR */
- PORTCR(157, 0xe605109d), /* PORT157CR */
- PORTCR(158, 0xe605109e), /* PORT158CR */
- PORTCR(159, 0xe605109f), /* PORT159CR */
-
- PORTCR(160, 0xe60510a0), /* PORT160CR */
- PORTCR(161, 0xe60510a1), /* PORT161CR */
- PORTCR(162, 0xe60510a2), /* PORT162CR */
- PORTCR(163, 0xe60510a3), /* PORT163CR */
- PORTCR(164, 0xe60510a4), /* PORT164CR */
-
- PORTCR(192, 0xe60520c0), /* PORT192CR */
- PORTCR(193, 0xe60520c1), /* PORT193CR */
- PORTCR(194, 0xe60520c2), /* PORT194CR */
- PORTCR(195, 0xe60520c3), /* PORT195CR */
- PORTCR(196, 0xe60520c4), /* PORT196CR */
- PORTCR(197, 0xe60520c5), /* PORT197CR */
- PORTCR(198, 0xe60520c6), /* PORT198CR */
- PORTCR(199, 0xe60520c7), /* PORT199CR */
-
- PORTCR(200, 0xe60520c8), /* PORT200CR */
- PORTCR(201, 0xe60520c9), /* PORT201CR */
- PORTCR(202, 0xe60520ca), /* PORT202CR */
- PORTCR(203, 0xe60520cb), /* PORT203CR */
- PORTCR(204, 0xe60520cc), /* PORT204CR */
- PORTCR(205, 0xe60520cd), /* PORT205CR */
- PORTCR(206, 0xe60520ce), /* PORT206CR */
- PORTCR(207, 0xe60520cf), /* PORT207CR */
- PORTCR(208, 0xe60520d0), /* PORT208CR */
- PORTCR(209, 0xe60520d1), /* PORT209CR */
-
- PORTCR(210, 0xe60520d2), /* PORT210CR */
- PORTCR(211, 0xe60520d3), /* PORT211CR */
- PORTCR(212, 0xe60520d4), /* PORT212CR */
- PORTCR(213, 0xe60520d5), /* PORT213CR */
- PORTCR(214, 0xe60520d6), /* PORT214CR */
- PORTCR(215, 0xe60520d7), /* PORT215CR */
- PORTCR(216, 0xe60520d8), /* PORT216CR */
- PORTCR(217, 0xe60520d9), /* PORT217CR */
- PORTCR(218, 0xe60520da), /* PORT218CR */
- PORTCR(219, 0xe60520db), /* PORT219CR */
-
- PORTCR(220, 0xe60520dc), /* PORT220CR */
- PORTCR(221, 0xe60520dd), /* PORT221CR */
- PORTCR(222, 0xe60520de), /* PORT222CR */
- PORTCR(223, 0xe60520df), /* PORT223CR */
- PORTCR(224, 0xe60520e0), /* PORT224CR */
- PORTCR(225, 0xe60520e1), /* PORT225CR */
- PORTCR(226, 0xe60520e2), /* PORT226CR */
- PORTCR(227, 0xe60520e3), /* PORT227CR */
- PORTCR(228, 0xe60520e4), /* PORT228CR */
- PORTCR(229, 0xe60520e5), /* PORT229CR */
-
- PORTCR(230, 0xe60520e6), /* PORT230CR */
- PORTCR(231, 0xe60520e7), /* PORT231CR */
- PORTCR(232, 0xe60520e8), /* PORT232CR */
- PORTCR(233, 0xe60520e9), /* PORT233CR */
- PORTCR(234, 0xe60520ea), /* PORT234CR */
- PORTCR(235, 0xe60520eb), /* PORT235CR */
- PORTCR(236, 0xe60520ec), /* PORT236CR */
- PORTCR(237, 0xe60520ed), /* PORT237CR */
- PORTCR(238, 0xe60520ee), /* PORT238CR */
- PORTCR(239, 0xe60520ef), /* PORT239CR */
-
- PORTCR(240, 0xe60520f0), /* PORT240CR */
- PORTCR(241, 0xe60520f1), /* PORT241CR */
- PORTCR(242, 0xe60520f2), /* PORT242CR */
- PORTCR(243, 0xe60520f3), /* PORT243CR */
- PORTCR(244, 0xe60520f4), /* PORT244CR */
- PORTCR(245, 0xe60520f5), /* PORT245CR */
- PORTCR(246, 0xe60520f6), /* PORT246CR */
- PORTCR(247, 0xe60520f7), /* PORT247CR */
- PORTCR(248, 0xe60520f8), /* PORT248CR */
- PORTCR(249, 0xe60520f9), /* PORT249CR */
-
- PORTCR(250, 0xe60520fa), /* PORT250CR */
- PORTCR(251, 0xe60520fb), /* PORT251CR */
- PORTCR(252, 0xe60520fc), /* PORT252CR */
- PORTCR(253, 0xe60520fd), /* PORT253CR */
- PORTCR(254, 0xe60520fe), /* PORT254CR */
- PORTCR(255, 0xe60520ff), /* PORT255CR */
- PORTCR(256, 0xe6052100), /* PORT256CR */
- PORTCR(257, 0xe6052101), /* PORT257CR */
- PORTCR(258, 0xe6052102), /* PORT258CR */
- PORTCR(259, 0xe6052103), /* PORT259CR */
-
- PORTCR(260, 0xe6052104), /* PORT260CR */
- PORTCR(261, 0xe6052105), /* PORT261CR */
- PORTCR(262, 0xe6052106), /* PORT262CR */
- PORTCR(263, 0xe6052107), /* PORT263CR */
- PORTCR(264, 0xe6052108), /* PORT264CR */
-
- { PINMUX_CFG_REG("MSELBCR", 0xe6058024, 32, 1) {
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- MSELBCR_MSEL17_0, MSELBCR_MSEL17_1,
- MSELBCR_MSEL16_0, MSELBCR_MSEL16_1,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
- },
- { },
-};
-
-static struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) {
- PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
- PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
- PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
- PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
- PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
- PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
- PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
- PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA }
- },
- { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054004, 32) {
- PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
- PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
- PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
- PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
- PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA,
- PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
- PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
- PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA }
- },
- { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054008, 32) {
- PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
- PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
- PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
- PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
- PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
- PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
- PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
- PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA }
- },
- { PINMUX_DATA_REG("PORTD127_096DR", 0xe605400C, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, PORT118_DATA, PORT117_DATA, PORT116_DATA,
- PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
- PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
- PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
- PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
- PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA }
- },
- { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055000, 32) {
- PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
- PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
- PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
- PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
- PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
- PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
- PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
- PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA }
- },
- { PINMUX_DATA_REG("PORTR191_160DR", 0xe6055004, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, PORT164_DATA,
- PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA }
- },
- { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056000, 32) {
- PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA,
- PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA,
- PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA,
- PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA,
- PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA,
- PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
- PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
- PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA }
- },
- { PINMUX_DATA_REG("PORTU255_224DR", 0xe6056004, 32) {
- PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA,
- PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA,
- PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA,
- PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA,
- PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA,
- PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA,
- PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA,
- PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA }
- },
- { PINMUX_DATA_REG("PORTU287_256DR", 0xe6056008, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, PORT264_DATA,
- PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA,
- PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA }
- },
- { },
-};
-
-static struct pinmux_info sh7377_pinmux_info = {
- .name = "sh7377_pfc",
- .reserved_id = PINMUX_RESERVED,
- .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
- .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
- .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
- .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
- .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
- .first_gpio = GPIO_PORT0,
- .last_gpio = GPIO_FN_RESETOUTS,
-
- .gpios = pinmux_gpios,
- .cfg_regs = pinmux_config_regs,
- .data_regs = pinmux_data_regs,
-
- .gpio_data = pinmux_data,
- .gpio_data_size = ARRAY_SIZE(pinmux_data),
-};
-
-void sh7377_pinmux_init(void)
-{
- register_pinmux(&sh7377_pinmux_info);
-}
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 11bb1d9..6ac242c 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -590,6 +590,21 @@
.num_resources = ARRAY_SIZE(i2c1_resources),
};
+static struct resource pmu_resources[] = {
+ [0] = {
+ .start = evt2irq(0x19a0),
+ .end = evt2irq(0x19a0),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device pmu_device = {
+ .name = "arm-pmu",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(pmu_resources),
+ .resource = pmu_resources,
+};
+
static struct platform_device *r8a7740_late_devices[] __initdata = {
&i2c0_device,
&i2c1_device,
@@ -597,6 +612,7 @@
&dma1_device,
&dma2_device,
&usb_dma_device,
+ &pmu_device,
};
/*
@@ -747,7 +763,7 @@
NULL,
};
-DT_MACHINE_START(SH7372_DT, "Generic R8A7740 (Flattened Device Tree)")
+DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
.map_io = r8a7740_map_io,
.init_early = r8a7740_add_early_devices_dt,
.init_irq = r8a7740_init_irq,
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index ebbffc2..7a1ad4f 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -229,6 +229,79 @@
.num_resources = ARRAY_SIZE(tmu01_resources),
};
+/* I2C */
+static struct resource rcar_i2c0_res[] = {
+ {
+ .start = 0xffc70000,
+ .end = 0xffc70fff,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = gic_spi(79),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device i2c0_device = {
+ .name = "i2c-rcar",
+ .id = 0,
+ .resource = rcar_i2c0_res,
+ .num_resources = ARRAY_SIZE(rcar_i2c0_res),
+};
+
+static struct resource rcar_i2c1_res[] = {
+ {
+ .start = 0xffc71000,
+ .end = 0xffc71fff,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = gic_spi(82),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device i2c1_device = {
+ .name = "i2c-rcar",
+ .id = 1,
+ .resource = rcar_i2c1_res,
+ .num_resources = ARRAY_SIZE(rcar_i2c1_res),
+};
+
+static struct resource rcar_i2c2_res[] = {
+ {
+ .start = 0xffc72000,
+ .end = 0xffc72fff,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = gic_spi(80),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device i2c2_device = {
+ .name = "i2c-rcar",
+ .id = 2,
+ .resource = rcar_i2c2_res,
+ .num_resources = ARRAY_SIZE(rcar_i2c2_res),
+};
+
+static struct resource rcar_i2c3_res[] = {
+ {
+ .start = 0xffc73000,
+ .end = 0xffc73fff,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = gic_spi(81),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device i2c3_device = {
+ .name = "i2c-rcar",
+ .id = 3,
+ .resource = rcar_i2c3_res,
+ .num_resources = ARRAY_SIZE(rcar_i2c3_res),
+};
+
static struct platform_device *r8a7779_early_devices[] __initdata = {
&scif0_device,
&scif1_device,
@@ -238,6 +311,10 @@
&scif5_device,
&tmu00_device,
&tmu01_device,
+ &i2c0_device,
+ &i2c1_device,
+ &i2c2_device,
+ &i2c3_device,
};
static struct platform_device *r8a7779_late_devices[] __initdata = {
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c
deleted file mode 100644
index e647f54..0000000
--- a/arch/arm/mach-shmobile/setup-sh7367.c
+++ /dev/null
@@ -1,481 +0,0 @@
-/*
- * sh7367 processor support
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2008 Yoshihiro Shimoda
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/platform_device.h>
-#include <linux/uio_driver.h>
-#include <linux/delay.h>
-#include <linux/input.h>
-#include <linux/io.h>
-#include <linux/serial_sci.h>
-#include <linux/sh_timer.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/irqs.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/time.h>
-
-static struct map_desc sh7367_io_desc[] __initdata = {
- /* create a 1:1 entity map for 0xe6xxxxxx
- * used by CPGA, INTC and PFC.
- */
- {
- .virtual = 0xe6000000,
- .pfn = __phys_to_pfn(0xe6000000),
- .length = 256 << 20,
- .type = MT_DEVICE_NONSHARED
- },
-};
-
-void __init sh7367_map_io(void)
-{
- iotable_init(sh7367_io_desc, ARRAY_SIZE(sh7367_io_desc));
-}
-
-/* SCIFA0 */
-static struct plat_sci_port scif0_platform_data = {
- .mapbase = 0xe6c40000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFA,
- .irqs = { evt2irq(0xc00), evt2irq(0xc00),
- evt2irq(0xc00), evt2irq(0xc00) },
-};
-
-static struct platform_device scif0_device = {
- .name = "sh-sci",
- .id = 0,
- .dev = {
- .platform_data = &scif0_platform_data,
- },
-};
-
-/* SCIFA1 */
-static struct plat_sci_port scif1_platform_data = {
- .mapbase = 0xe6c50000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFA,
- .irqs = { evt2irq(0xc20), evt2irq(0xc20),
- evt2irq(0xc20), evt2irq(0xc20) },
-};
-
-static struct platform_device scif1_device = {
- .name = "sh-sci",
- .id = 1,
- .dev = {
- .platform_data = &scif1_platform_data,
- },
-};
-
-/* SCIFA2 */
-static struct plat_sci_port scif2_platform_data = {
- .mapbase = 0xe6c60000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFA,
- .irqs = { evt2irq(0xc40), evt2irq(0xc40),
- evt2irq(0xc40), evt2irq(0xc40) },
-};
-
-static struct platform_device scif2_device = {
- .name = "sh-sci",
- .id = 2,
- .dev = {
- .platform_data = &scif2_platform_data,
- },
-};
-
-/* SCIFA3 */
-static struct plat_sci_port scif3_platform_data = {
- .mapbase = 0xe6c70000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFA,
- .irqs = { evt2irq(0xc60), evt2irq(0xc60),
- evt2irq(0xc60), evt2irq(0xc60) },
-};
-
-static struct platform_device scif3_device = {
- .name = "sh-sci",
- .id = 3,
- .dev = {
- .platform_data = &scif3_platform_data,
- },
-};
-
-/* SCIFA4 */
-static struct plat_sci_port scif4_platform_data = {
- .mapbase = 0xe6c80000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFA,
- .irqs = { evt2irq(0xd20), evt2irq(0xd20),
- evt2irq(0xd20), evt2irq(0xd20) },
-};
-
-static struct platform_device scif4_device = {
- .name = "sh-sci",
- .id = 4,
- .dev = {
- .platform_data = &scif4_platform_data,
- },
-};
-
-/* SCIFA5 */
-static struct plat_sci_port scif5_platform_data = {
- .mapbase = 0xe6cb0000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFA,
- .irqs = { evt2irq(0xd40), evt2irq(0xd40),
- evt2irq(0xd40), evt2irq(0xd40) },
-};
-
-static struct platform_device scif5_device = {
- .name = "sh-sci",
- .id = 5,
- .dev = {
- .platform_data = &scif5_platform_data,
- },
-};
-
-/* SCIFB */
-static struct plat_sci_port scif6_platform_data = {
- .mapbase = 0xe6c30000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFB,
- .irqs = { evt2irq(0xd60), evt2irq(0xd60),
- evt2irq(0xd60), evt2irq(0xd60) },
-};
-
-static struct platform_device scif6_device = {
- .name = "sh-sci",
- .id = 6,
- .dev = {
- .platform_data = &scif6_platform_data,
- },
-};
-
-static struct sh_timer_config cmt10_platform_data = {
- .name = "CMT10",
- .channel_offset = 0x10,
- .timer_bit = 0,
- .clockevent_rating = 125,
- .clocksource_rating = 125,
-};
-
-static struct resource cmt10_resources[] = {
- [0] = {
- .name = "CMT10",
- .start = 0xe6138010,
- .end = 0xe613801b,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = evt2irq(0xb00), /* CMT1_CMT10 */
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device cmt10_device = {
- .name = "sh_cmt",
- .id = 10,
- .dev = {
- .platform_data = &cmt10_platform_data,
- },
- .resource = cmt10_resources,
- .num_resources = ARRAY_SIZE(cmt10_resources),
-};
-
-/* VPU */
-static struct uio_info vpu_platform_data = {
- .name = "VPU5",
- .version = "0",
- .irq = intcs_evt2irq(0x980),
-};
-
-static struct resource vpu_resources[] = {
- [0] = {
- .name = "VPU",
- .start = 0xfe900000,
- .end = 0xfe902807,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device vpu_device = {
- .name = "uio_pdrv_genirq",
- .id = 0,
- .dev = {
- .platform_data = &vpu_platform_data,
- },
- .resource = vpu_resources,
- .num_resources = ARRAY_SIZE(vpu_resources),
-};
-
-/* VEU0 */
-static struct uio_info veu0_platform_data = {
- .name = "VEU0",
- .version = "0",
- .irq = intcs_evt2irq(0x700),
-};
-
-static struct resource veu0_resources[] = {
- [0] = {
- .name = "VEU0",
- .start = 0xfe920000,
- .end = 0xfe9200b7,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu0_device = {
- .name = "uio_pdrv_genirq",
- .id = 1,
- .dev = {
- .platform_data = &veu0_platform_data,
- },
- .resource = veu0_resources,
- .num_resources = ARRAY_SIZE(veu0_resources),
-};
-
-/* VEU1 */
-static struct uio_info veu1_platform_data = {
- .name = "VEU1",
- .version = "0",
- .irq = intcs_evt2irq(0x720),
-};
-
-static struct resource veu1_resources[] = {
- [0] = {
- .name = "VEU1",
- .start = 0xfe924000,
- .end = 0xfe9240b7,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu1_device = {
- .name = "uio_pdrv_genirq",
- .id = 2,
- .dev = {
- .platform_data = &veu1_platform_data,
- },
- .resource = veu1_resources,
- .num_resources = ARRAY_SIZE(veu1_resources),
-};
-
-/* VEU2 */
-static struct uio_info veu2_platform_data = {
- .name = "VEU2",
- .version = "0",
- .irq = intcs_evt2irq(0x740),
-};
-
-static struct resource veu2_resources[] = {
- [0] = {
- .name = "VEU2",
- .start = 0xfe928000,
- .end = 0xfe9280b7,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu2_device = {
- .name = "uio_pdrv_genirq",
- .id = 3,
- .dev = {
- .platform_data = &veu2_platform_data,
- },
- .resource = veu2_resources,
- .num_resources = ARRAY_SIZE(veu2_resources),
-};
-
-/* VEU3 */
-static struct uio_info veu3_platform_data = {
- .name = "VEU3",
- .version = "0",
- .irq = intcs_evt2irq(0x760),
-};
-
-static struct resource veu3_resources[] = {
- [0] = {
- .name = "VEU3",
- .start = 0xfe92c000,
- .end = 0xfe92c0b7,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu3_device = {
- .name = "uio_pdrv_genirq",
- .id = 4,
- .dev = {
- .platform_data = &veu3_platform_data,
- },
- .resource = veu3_resources,
- .num_resources = ARRAY_SIZE(veu3_resources),
-};
-
-/* VEU2H */
-static struct uio_info veu2h_platform_data = {
- .name = "VEU2H",
- .version = "0",
- .irq = intcs_evt2irq(0x520),
-};
-
-static struct resource veu2h_resources[] = {
- [0] = {
- .name = "VEU2H",
- .start = 0xfe93c000,
- .end = 0xfe93c27b,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu2h_device = {
- .name = "uio_pdrv_genirq",
- .id = 5,
- .dev = {
- .platform_data = &veu2h_platform_data,
- },
- .resource = veu2h_resources,
- .num_resources = ARRAY_SIZE(veu2h_resources),
-};
-
-/* JPU */
-static struct uio_info jpu_platform_data = {
- .name = "JPU",
- .version = "0",
- .irq = intcs_evt2irq(0x560),
-};
-
-static struct resource jpu_resources[] = {
- [0] = {
- .name = "JPU",
- .start = 0xfe980000,
- .end = 0xfe9902d3,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device jpu_device = {
- .name = "uio_pdrv_genirq",
- .id = 6,
- .dev = {
- .platform_data = &jpu_platform_data,
- },
- .resource = jpu_resources,
- .num_resources = ARRAY_SIZE(jpu_resources),
-};
-
-/* SPU1 */
-static struct uio_info spu1_platform_data = {
- .name = "SPU1",
- .version = "0",
- .irq = evt2irq(0xfc0),
-};
-
-static struct resource spu1_resources[] = {
- [0] = {
- .name = "SPU1",
- .start = 0xfe300000,
- .end = 0xfe3fffff,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device spu1_device = {
- .name = "uio_pdrv_genirq",
- .id = 7,
- .dev = {
- .platform_data = &spu1_platform_data,
- },
- .resource = spu1_resources,
- .num_resources = ARRAY_SIZE(spu1_resources),
-};
-
-static struct platform_device *sh7367_early_devices[] __initdata = {
- &scif0_device,
- &scif1_device,
- &scif2_device,
- &scif3_device,
- &scif4_device,
- &scif5_device,
- &scif6_device,
- &cmt10_device,
-};
-
-static struct platform_device *sh7367_devices[] __initdata = {
- &vpu_device,
- &veu0_device,
- &veu1_device,
- &veu2_device,
- &veu3_device,
- &veu2h_device,
- &jpu_device,
- &spu1_device,
-};
-
-void __init sh7367_add_standard_devices(void)
-{
- platform_add_devices(sh7367_early_devices,
- ARRAY_SIZE(sh7367_early_devices));
-
- platform_add_devices(sh7367_devices,
- ARRAY_SIZE(sh7367_devices));
-}
-
-static void __init sh7367_earlytimer_init(void)
-{
- sh7367_clock_init();
- shmobile_earlytimer_init();
-}
-
-#define SYMSTPCR2 IOMEM(0xe6158048)
-#define SYMSTPCR2_CMT1 (1 << 29)
-
-void __init sh7367_add_early_devices(void)
-{
- /* enable clock to CMT1 */
- __raw_writel(__raw_readl(SYMSTPCR2) & ~SYMSTPCR2_CMT1, SYMSTPCR2);
-
- early_platform_add_devices(sh7367_early_devices,
- ARRAY_SIZE(sh7367_early_devices));
-
- /* setup early console here as well */
- shmobile_setup_console();
-
- /* override timer setup with soc-specific code */
- shmobile_timer.init = sh7367_earlytimer_init;
-}
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index a07954f..a360111 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -408,6 +408,26 @@
.chcr = CHCR_RX(XMIT_SZ_8BIT),
.mid_rid = 0x3e,
}, {
+ .slave_id = SHDMA_SLAVE_FLCTL0_TX,
+ .addr = 0xe6a30050,
+ .chcr = CHCR_TX(XMIT_SZ_32BIT),
+ .mid_rid = 0x83,
+ }, {
+ .slave_id = SHDMA_SLAVE_FLCTL0_RX,
+ .addr = 0xe6a30050,
+ .chcr = CHCR_RX(XMIT_SZ_32BIT),
+ .mid_rid = 0x83,
+ }, {
+ .slave_id = SHDMA_SLAVE_FLCTL1_TX,
+ .addr = 0xe6a30060,
+ .chcr = CHCR_TX(XMIT_SZ_32BIT),
+ .mid_rid = 0x87,
+ }, {
+ .slave_id = SHDMA_SLAVE_FLCTL1_RX,
+ .addr = 0xe6a30060,
+ .chcr = CHCR_RX(XMIT_SZ_32BIT),
+ .mid_rid = 0x87,
+ }, {
.slave_id = SHDMA_SLAVE_SDHI0_TX,
.addr = 0xe6850030,
.chcr = CHCR_TX(XMIT_SZ_16BIT),
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
deleted file mode 100644
index edcf98b..0000000
--- a/arch/arm/mach-shmobile/setup-sh7377.c
+++ /dev/null
@@ -1,549 +0,0 @@
-/*
- * sh7377 processor support
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2008 Yoshihiro Shimoda
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/platform_device.h>
-#include <linux/of_platform.h>
-#include <linux/uio_driver.h>
-#include <linux/delay.h>
-#include <linux/input.h>
-#include <linux/io.h>
-#include <linux/serial_sci.h>
-#include <linux/sh_intc.h>
-#include <linux/sh_timer.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <asm/mach/map.h>
-#include <mach/irqs.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/time.h>
-
-static struct map_desc sh7377_io_desc[] __initdata = {
- /* create a 1:1 entity map for 0xe6xxxxxx
- * used by CPGA, INTC and PFC.
- */
- {
- .virtual = 0xe6000000,
- .pfn = __phys_to_pfn(0xe6000000),
- .length = 256 << 20,
- .type = MT_DEVICE_NONSHARED
- },
-};
-
-void __init sh7377_map_io(void)
-{
- iotable_init(sh7377_io_desc, ARRAY_SIZE(sh7377_io_desc));
-}
-
-/* SCIFA0 */
-static struct plat_sci_port scif0_platform_data = {
- .mapbase = 0xe6c40000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFA,
- .irqs = { evt2irq(0xc00), evt2irq(0xc00),
- evt2irq(0xc00), evt2irq(0xc00) },
-};
-
-static struct platform_device scif0_device = {
- .name = "sh-sci",
- .id = 0,
- .dev = {
- .platform_data = &scif0_platform_data,
- },
-};
-
-/* SCIFA1 */
-static struct plat_sci_port scif1_platform_data = {
- .mapbase = 0xe6c50000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFA,
- .irqs = { evt2irq(0xc20), evt2irq(0xc20),
- evt2irq(0xc20), evt2irq(0xc20) },
-};
-
-static struct platform_device scif1_device = {
- .name = "sh-sci",
- .id = 1,
- .dev = {
- .platform_data = &scif1_platform_data,
- },
-};
-
-/* SCIFA2 */
-static struct plat_sci_port scif2_platform_data = {
- .mapbase = 0xe6c60000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFA,
- .irqs = { evt2irq(0xc40), evt2irq(0xc40),
- evt2irq(0xc40), evt2irq(0xc40) },
-};
-
-static struct platform_device scif2_device = {
- .name = "sh-sci",
- .id = 2,
- .dev = {
- .platform_data = &scif2_platform_data,
- },
-};
-
-/* SCIFA3 */
-static struct plat_sci_port scif3_platform_data = {
- .mapbase = 0xe6c70000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFA,
- .irqs = { evt2irq(0xc60), evt2irq(0xc60),
- evt2irq(0xc60), evt2irq(0xc60) },
-};
-
-static struct platform_device scif3_device = {
- .name = "sh-sci",
- .id = 3,
- .dev = {
- .platform_data = &scif3_platform_data,
- },
-};
-
-/* SCIFA4 */
-static struct plat_sci_port scif4_platform_data = {
- .mapbase = 0xe6c80000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFA,
- .irqs = { evt2irq(0xd20), evt2irq(0xd20),
- evt2irq(0xd20), evt2irq(0xd20) },
-};
-
-static struct platform_device scif4_device = {
- .name = "sh-sci",
- .id = 4,
- .dev = {
- .platform_data = &scif4_platform_data,
- },
-};
-
-/* SCIFA5 */
-static struct plat_sci_port scif5_platform_data = {
- .mapbase = 0xe6cb0000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFA,
- .irqs = { evt2irq(0xd40), evt2irq(0xd40),
- evt2irq(0xd40), evt2irq(0xd40) },
-};
-
-static struct platform_device scif5_device = {
- .name = "sh-sci",
- .id = 5,
- .dev = {
- .platform_data = &scif5_platform_data,
- },
-};
-
-/* SCIFA6 */
-static struct plat_sci_port scif6_platform_data = {
- .mapbase = 0xe6cc0000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFA,
- .irqs = { intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80),
- intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80) },
-};
-
-static struct platform_device scif6_device = {
- .name = "sh-sci",
- .id = 6,
- .dev = {
- .platform_data = &scif6_platform_data,
- },
-};
-
-/* SCIFB */
-static struct plat_sci_port scif7_platform_data = {
- .mapbase = 0xe6c30000,
- .flags = UPF_BOOT_AUTOCONF,
- .scscr = SCSCR_RE | SCSCR_TE,
- .scbrr_algo_id = SCBRR_ALGO_4,
- .type = PORT_SCIFB,
- .irqs = { evt2irq(0xd60), evt2irq(0xd60),
- evt2irq(0xd60), evt2irq(0xd60) },
-};
-
-static struct platform_device scif7_device = {
- .name = "sh-sci",
- .id = 7,
- .dev = {
- .platform_data = &scif7_platform_data,
- },
-};
-
-static struct sh_timer_config cmt10_platform_data = {
- .name = "CMT10",
- .channel_offset = 0x10,
- .timer_bit = 0,
- .clockevent_rating = 125,
- .clocksource_rating = 125,
-};
-
-static struct resource cmt10_resources[] = {
- [0] = {
- .name = "CMT10",
- .start = 0xe6138010,
- .end = 0xe613801b,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = evt2irq(0xb00), /* CMT1_CMT10 */
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device cmt10_device = {
- .name = "sh_cmt",
- .id = 10,
- .dev = {
- .platform_data = &cmt10_platform_data,
- },
- .resource = cmt10_resources,
- .num_resources = ARRAY_SIZE(cmt10_resources),
-};
-
-/* VPU */
-static struct uio_info vpu_platform_data = {
- .name = "VPU5HG",
- .version = "0",
- .irq = intcs_evt2irq(0x980),
-};
-
-static struct resource vpu_resources[] = {
- [0] = {
- .name = "VPU",
- .start = 0xfe900000,
- .end = 0xfe900157,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device vpu_device = {
- .name = "uio_pdrv_genirq",
- .id = 0,
- .dev = {
- .platform_data = &vpu_platform_data,
- },
- .resource = vpu_resources,
- .num_resources = ARRAY_SIZE(vpu_resources),
-};
-
-/* VEU0 */
-static struct uio_info veu0_platform_data = {
- .name = "VEU0",
- .version = "0",
- .irq = intcs_evt2irq(0x700),
-};
-
-static struct resource veu0_resources[] = {
- [0] = {
- .name = "VEU0",
- .start = 0xfe920000,
- .end = 0xfe9200cb,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu0_device = {
- .name = "uio_pdrv_genirq",
- .id = 1,
- .dev = {
- .platform_data = &veu0_platform_data,
- },
- .resource = veu0_resources,
- .num_resources = ARRAY_SIZE(veu0_resources),
-};
-
-/* VEU1 */
-static struct uio_info veu1_platform_data = {
- .name = "VEU1",
- .version = "0",
- .irq = intcs_evt2irq(0x720),
-};
-
-static struct resource veu1_resources[] = {
- [0] = {
- .name = "VEU1",
- .start = 0xfe924000,
- .end = 0xfe9240cb,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu1_device = {
- .name = "uio_pdrv_genirq",
- .id = 2,
- .dev = {
- .platform_data = &veu1_platform_data,
- },
- .resource = veu1_resources,
- .num_resources = ARRAY_SIZE(veu1_resources),
-};
-
-/* VEU2 */
-static struct uio_info veu2_platform_data = {
- .name = "VEU2",
- .version = "0",
- .irq = intcs_evt2irq(0x740),
-};
-
-static struct resource veu2_resources[] = {
- [0] = {
- .name = "VEU2",
- .start = 0xfe928000,
- .end = 0xfe928307,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu2_device = {
- .name = "uio_pdrv_genirq",
- .id = 3,
- .dev = {
- .platform_data = &veu2_platform_data,
- },
- .resource = veu2_resources,
- .num_resources = ARRAY_SIZE(veu2_resources),
-};
-
-/* VEU3 */
-static struct uio_info veu3_platform_data = {
- .name = "VEU3",
- .version = "0",
- .irq = intcs_evt2irq(0x760),
-};
-
-static struct resource veu3_resources[] = {
- [0] = {
- .name = "VEU3",
- .start = 0xfe92c000,
- .end = 0xfe92c307,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu3_device = {
- .name = "uio_pdrv_genirq",
- .id = 4,
- .dev = {
- .platform_data = &veu3_platform_data,
- },
- .resource = veu3_resources,
- .num_resources = ARRAY_SIZE(veu3_resources),
-};
-
-/* JPU */
-static struct uio_info jpu_platform_data = {
- .name = "JPU",
- .version = "0",
- .irq = intcs_evt2irq(0x560),
-};
-
-static struct resource jpu_resources[] = {
- [0] = {
- .name = "JPU",
- .start = 0xfe980000,
- .end = 0xfe9902d3,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device jpu_device = {
- .name = "uio_pdrv_genirq",
- .id = 5,
- .dev = {
- .platform_data = &jpu_platform_data,
- },
- .resource = jpu_resources,
- .num_resources = ARRAY_SIZE(jpu_resources),
-};
-
-/* SPU2DSP0 */
-static struct uio_info spu0_platform_data = {
- .name = "SPU2DSP0",
- .version = "0",
- .irq = evt2irq(0x1800),
-};
-
-static struct resource spu0_resources[] = {
- [0] = {
- .name = "SPU2DSP0",
- .start = 0xfe200000,
- .end = 0xfe2fffff,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device spu0_device = {
- .name = "uio_pdrv_genirq",
- .id = 6,
- .dev = {
- .platform_data = &spu0_platform_data,
- },
- .resource = spu0_resources,
- .num_resources = ARRAY_SIZE(spu0_resources),
-};
-
-/* SPU2DSP1 */
-static struct uio_info spu1_platform_data = {
- .name = "SPU2DSP1",
- .version = "0",
- .irq = evt2irq(0x1820),
-};
-
-static struct resource spu1_resources[] = {
- [0] = {
- .name = "SPU2DSP1",
- .start = 0xfe300000,
- .end = 0xfe3fffff,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device spu1_device = {
- .name = "uio_pdrv_genirq",
- .id = 7,
- .dev = {
- .platform_data = &spu1_platform_data,
- },
- .resource = spu1_resources,
- .num_resources = ARRAY_SIZE(spu1_resources),
-};
-
-static struct platform_device *sh7377_early_devices[] __initdata = {
- &scif0_device,
- &scif1_device,
- &scif2_device,
- &scif3_device,
- &scif4_device,
- &scif5_device,
- &scif6_device,
- &scif7_device,
- &cmt10_device,
-};
-
-static struct platform_device *sh7377_devices[] __initdata = {
- &vpu_device,
- &veu0_device,
- &veu1_device,
- &veu2_device,
- &veu3_device,
- &jpu_device,
- &spu0_device,
- &spu1_device,
-};
-
-void __init sh7377_add_standard_devices(void)
-{
- platform_add_devices(sh7377_early_devices,
- ARRAY_SIZE(sh7377_early_devices));
-
- platform_add_devices(sh7377_devices,
- ARRAY_SIZE(sh7377_devices));
-}
-
-static void __init sh7377_earlytimer_init(void)
-{
- sh7377_clock_init();
- shmobile_earlytimer_init();
-}
-
-#define SMSTPCR3 IOMEM(0xe615013c)
-#define SMSTPCR3_CMT1 (1 << 29)
-
-void __init sh7377_add_early_devices(void)
-{
- /* enable clock to CMT1 */
- __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
-
- early_platform_add_devices(sh7377_early_devices,
- ARRAY_SIZE(sh7377_early_devices));
-
- /* setup early console here as well */
- shmobile_setup_console();
-
- /* override timer setup with soc-specific code */
- shmobile_timer.init = sh7377_earlytimer_init;
-}
-
-#ifdef CONFIG_USE_OF
-
-void __init sh7377_add_early_devices_dt(void)
-{
- shmobile_setup_delay(600, 1, 3); /* Cortex-A8 @ 600MHz */
-
- early_platform_add_devices(sh7377_early_devices,
- ARRAY_SIZE(sh7377_early_devices));
-
- /* setup early console here as well */
- shmobile_setup_console();
-}
-
-static const struct of_dev_auxdata sh7377_auxdata_lookup[] __initconst = {
- { }
-};
-
-void __init sh7377_add_standard_devices_dt(void)
-{
- /* clocks are setup late during boot in the case of DT */
- sh7377_clock_init();
-
- platform_add_devices(sh7377_early_devices,
- ARRAY_SIZE(sh7377_early_devices));
-
- of_platform_populate(NULL, of_default_bus_match_table,
- sh7377_auxdata_lookup, NULL);
-}
-
-static const char *sh7377_boards_compat_dt[] __initdata = {
- "renesas,sh7377",
- NULL,
-};
-
-DT_MACHINE_START(SH7377_DT, "Generic SH7377 (Flattened Device Tree)")
- .map_io = sh7377_map_io,
- .init_early = sh7377_add_early_devices_dt,
- .init_irq = sh7377_init_irq,
- .handle_irq = shmobile_handle_irq_intc,
- .init_machine = sh7377_add_standard_devices_dt,
- .timer = &shmobile_timer,
- .dt_compat = sh7377_boards_compat_dt,
-MACHINE_END
-
-#endif /* CONFIG_USE_OF */
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index f674562..535426c 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -32,24 +32,8 @@
#define EMEV2_SCU_BASE 0x1e000000
-static DEFINE_SPINLOCK(scu_lock);
static void __iomem *scu_base;
-static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
-{
- unsigned long tmp;
-
- /* we assume this code is running on a different cpu
- * than the one that is changing coherency setting */
- spin_lock(&scu_lock);
- tmp = readl(scu_base + 8);
- tmp &= ~clr;
- tmp |= set;
- writel(tmp, scu_base + 8);
- spin_unlock(&scu_lock);
-
-}
-
static unsigned int __init emev2_get_core_count(void)
{
if (!scu_base) {
@@ -95,7 +79,7 @@
cpu = cpu_logical_map(cpu);
/* enable cache coherency */
- modify_scu_cpu_psr(0, 3 << (cpu * 8));
+ scu_power_mode(scu_base, 0);
/* Tell ROM loader about our vector (in headsmp.S) */
emev2_set_boot_vector(__pa(shmobile_secondary_vector));
@@ -106,12 +90,10 @@
static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
{
- int cpu = cpu_logical_map(0);
-
scu_enable(scu_base);
/* enable cache coherency on CPU0 */
- modify_scu_cpu_psr(0, 3 << (cpu * 8));
+ scu_power_mode(scu_base, 0);
}
static void __init emev2_smp_init_cpus(void)
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 2ce6af9..9def0f2 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -61,9 +61,6 @@
return (void __iomem *)0xf0000000;
}
-static DEFINE_SPINLOCK(scu_lock);
-static unsigned long tmp;
-
#ifdef CONFIG_HAVE_ARM_TWD
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
@@ -73,20 +70,6 @@
}
#endif
-static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
-{
- void __iomem *scu_base = scu_base_addr();
-
- spin_lock(&scu_lock);
- tmp = __raw_readl(scu_base + 8);
- tmp &= ~clr;
- tmp |= set;
- spin_unlock(&scu_lock);
-
- /* disable cache coherency after releasing the lock */
- __raw_writel(tmp, scu_base + 8);
-}
-
static unsigned int __init r8a7779_get_core_count(void)
{
void __iomem *scu_base = scu_base_addr();
@@ -102,7 +85,7 @@
cpu = cpu_logical_map(cpu);
/* disable cache coherency */
- modify_scu_cpu_psr(3 << (cpu * 8), 0);
+ scu_power_mode(scu_base_addr(), 3);
if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
ch = r8a7779_ch_cpu[cpu];
@@ -145,7 +128,7 @@
cpu = cpu_logical_map(cpu);
/* enable cache coherency */
- modify_scu_cpu_psr(0, 3 << (cpu * 8));
+ scu_power_mode(scu_base_addr(), 0);
if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
ch = r8a7779_ch_cpu[cpu];
@@ -158,15 +141,13 @@
static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
{
- int cpu = cpu_logical_map(0);
-
scu_enable(scu_base_addr());
/* Map the reset vector (in headsmp.S) */
__raw_writel(__pa(shmobile_secondary_vector), AVECR);
/* enable cache coherency on CPU0 */
- modify_scu_cpu_psr(0, 3 << (cpu * 8));
+ scu_power_mode(scu_base_addr(), 0);
r8a7779_pm_init();
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 624f00f..96ddb97 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -41,9 +41,6 @@
return (void __iomem *)0xf0000000;
}
-static DEFINE_SPINLOCK(scu_lock);
-static unsigned long tmp;
-
#ifdef CONFIG_HAVE_ARM_TWD
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
void __init sh73a0_register_twd(void)
@@ -52,20 +49,6 @@
}
#endif
-static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
-{
- void __iomem *scu_base = scu_base_addr();
-
- spin_lock(&scu_lock);
- tmp = __raw_readl(scu_base + 8);
- tmp &= ~clr;
- tmp |= set;
- spin_unlock(&scu_lock);
-
- /* disable cache coherency after releasing the lock */
- __raw_writel(tmp, scu_base + 8);
-}
-
static unsigned int __init sh73a0_get_core_count(void)
{
void __iomem *scu_base = scu_base_addr();
@@ -83,7 +66,7 @@
cpu = cpu_logical_map(cpu);
/* enable cache coherency */
- modify_scu_cpu_psr(0, 3 << (cpu * 8));
+ scu_power_mode(scu_base_addr(), 0);
if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)
__raw_writel(1 << cpu, WUPCR); /* wake up */
@@ -95,8 +78,6 @@
static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
{
- int cpu = cpu_logical_map(0);
-
scu_enable(scu_base_addr());
/* Map the reset vector (in headsmp.S) */
@@ -104,7 +85,7 @@
__raw_writel(__pa(shmobile_secondary_vector), SBAR);
/* enable cache coherency on CPU0 */
- modify_scu_cpu_psr(0, 3 << (cpu * 8));
+ scu_power_mode(scu_base_addr(), 0);
}
static void __init sh73a0_smp_init_cpus(void)
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
new file mode 100644
index 0000000..3fdd008
--- /dev/null
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -0,0 +1,9 @@
+config ARCH_SUNXI
+ bool "Allwinner A1X SOCs" if ARCH_MULTI_V7
+ select CLKSRC_MMIO
+ select COMMON_CLK
+ select GENERIC_CLOCKEVENTS
+ select GENERIC_IRQ_CHIP
+ select PINCTRL
+ select SPARSE_IRQ
+ select SUNXI_TIMER
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
new file mode 100644
index 0000000..93bebfc
--- /dev/null
+++ b/arch/arm/mach-sunxi/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_ARCH_SUNXI) += sunxi.o
diff --git a/arch/arm/mach-sunxi/Makefile.boot b/arch/arm/mach-sunxi/Makefile.boot
new file mode 100644
index 0000000..46d4cf0
--- /dev/null
+++ b/arch/arm/mach-sunxi/Makefile.boot
@@ -0,0 +1 @@
+zreladdr-$(CONFIG_ARCH_SUNXI) += 0x40008000
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
new file mode 100644
index 0000000..8f42df8
--- /dev/null
+++ b/arch/arm/mach-sunxi/sunxi.c
@@ -0,0 +1,60 @@
+/*
+ * Device Tree support for Allwinner A1X SoCs
+ *
+ * Copyright (C) 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/io.h>
+#include <linux/sunxi_timer.h>
+
+#include <linux/irqchip/sunxi.h>
+
+#include <asm/hardware/vic.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include "sunxi.h"
+
+static struct map_desc sunxi_io_desc[] __initdata = {
+ {
+ .virtual = (unsigned long) SUNXI_REGS_VIRT_BASE,
+ .pfn = __phys_to_pfn(SUNXI_REGS_PHYS_BASE),
+ .length = SUNXI_REGS_SIZE,
+ .type = MT_DEVICE,
+ },
+};
+
+void __init sunxi_map_io(void)
+{
+ iotable_init(sunxi_io_desc, ARRAY_SIZE(sunxi_io_desc));
+}
+
+static void __init sunxi_dt_init(void)
+{
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char * const sunxi_board_dt_compat[] = {
+ "allwinner,sun5i",
+ NULL,
+};
+
+DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
+ .init_machine = sunxi_dt_init,
+ .map_io = sunxi_map_io,
+ .init_irq = sunxi_init_irq,
+ .handle_irq = sunxi_handle_irq,
+ .timer = &sunxi_timer,
+ .dt_compat = sunxi_board_dt_compat,
+MACHINE_END
diff --git a/arch/arm/mach-sunxi/sunxi.h b/arch/arm/mach-sunxi/sunxi.h
new file mode 100644
index 0000000..33b5871
--- /dev/null
+++ b/arch/arm/mach-sunxi/sunxi.h
@@ -0,0 +1,20 @@
+/*
+ * Generic definitions for Allwinner SunXi SoCs
+ *
+ * Copyright (C) 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __MACH_SUNXI_H
+#define __MACH_SUNXI_H
+
+#define SUNXI_REGS_PHYS_BASE 0x01c00000
+#define SUNXI_REGS_VIRT_BASE IOMEM(0xf1c00000)
+#define SUNXI_REGS_SIZE (SZ_2M + SZ_1M)
+
+#endif /* __MACH_SUNXI_H */
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 416d436..e4dad22 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -1,6 +1,5 @@
-
/*
- * Copyright (C) 2008-2009 ST-Ericsson
+ * Copyright (C) 2008-2012 ST-Ericsson
*
* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
*
@@ -701,6 +700,16 @@
.init_late = ux500_init_late,
MACHINE_END
+MACHINE_START(U8520, "ST-Ericsson U8520 Platform HREFP520")
+ .atag_offset = 0x100,
+ .map_io = u8500_map_io,
+ .init_irq = ux500_init_irq,
+ .timer = &ux500_timer,
+ .handle_irq = gic_handle_irq,
+ .init_machine = mop500_init_machine,
+ .init_late = ux500_init_late,
+MACHINE_END
+
MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
.atag_offset = 0x100,
.smp = smp_ops(ux500_smp_ops),
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index bcdfe6b..50202a1 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -17,6 +17,8 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mfd/abx500/ab8500.h>
+#include <linux/platform_data/usb-musb-ux500.h>
+#include <linux/random.h>
#include <asm/pmu.h>
#include <asm/mach/map.h>
@@ -24,7 +26,6 @@
#include <mach/hardware.h>
#include <mach/setup.h>
#include <mach/devices.h>
-#include <linux/platform_data/usb-musb-ux500.h>
#include <mach/db8500-regs.h>
#include "devices-db8500.h"
@@ -187,6 +188,8 @@
{
void __iomem *uid = __io_address(U8500_BB_UID_BASE);
+ /* Throw these device-specific numbers into the entropy pool */
+ add_device_randomness(uid, 0x14);
return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
readl((u32 *)uid+1),
readl((u32 *)uid+1), readl((u32 *)uid+2),
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 5b5c1ee..5d59294 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -32,6 +32,7 @@
#include <linux/amba/mmci.h>
#include <linux/amba/pl022.h>
#include <linux/io.h>
+#include <linux/irqchip/versatile-fpga.h>
#include <linux/gfp.h>
#include <linux/clkdev.h>
#include <linux/mtd/physmap.h>
@@ -51,7 +52,6 @@
#include <asm/hardware/timer-sp.h>
#include <plat/clcd.h>
-#include <plat/fpga-irq.h>
#include <plat/sched_clock.h>
#include "core.h"
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 023f4437..b820eda 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -745,7 +745,7 @@
static int
do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
{
- union offset_union offset;
+ union offset_union uninitialized_var(offset);
unsigned long instr = 0, instrptr;
int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs);
unsigned int type;
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
deleted file mode 100644
index 88e1e2e..0000000
--- a/arch/arm/plat-mxc/Kconfig
+++ /dev/null
@@ -1,89 +0,0 @@
-if ARCH_MXC
-
-source "arch/arm/plat-mxc/devices/Kconfig"
-
-menu "Freescale MXC Implementations"
-
-choice
- prompt "Freescale CPU family:"
- default ARCH_IMX_V6_V7
-
-config ARCH_IMX_V4_V5
- bool "i.MX1, i.MX21, i.MX25, i.MX27"
- select ARM_PATCH_PHYS_VIRT
- select AUTO_ZRELADDR if !ZBOOT_ROM
- help
- This enables support for systems based on the Freescale i.MX ARMv4
- and ARMv5 SoCs
-
-config ARCH_IMX_V6_V7
- bool "i.MX3, i.MX5, i.MX6"
- select ARM_PATCH_PHYS_VIRT
- select AUTO_ZRELADDR if !ZBOOT_ROM
- select MIGHT_HAVE_CACHE_L2X0
- help
- This enables support for systems based on the Freescale i.MX3, i.MX5
- and i.MX6 family.
-
-endchoice
-
-source "arch/arm/mach-imx/Kconfig"
-
-endmenu
-
-config MXC_IRQ_PRIOR
- bool "Use IRQ priority"
- help
- Select this if you want to use prioritized IRQ handling.
- This feature prevents higher priority ISR to be interrupted
- by lower priority IRQ even IRQF_DISABLED flag is not set.
- This may be useful in embedded applications, where are strong
- requirements for timing.
- Say N here, unless you have a specialized requirement.
-
-config MXC_TZIC
- bool
-
-config MXC_AVIC
- bool
-
-config MXC_DEBUG_BOARD
- bool "Enable MXC debug board(for 3-stack)"
- help
- The debug board is an integral part of the MXC 3-stack(PDK)
- platforms, it can be attached or removed from the peripheral
- board. On debug board, several debug devices(ethernet, UART,
- buttons, LEDs and JTAG) are implemented. Between the MCU and
- these devices, a CPLD is added as a bridge which performs
- data/address de-multiplexing and decode, signal level shift,
- interrupt control and various board functions.
-
-config HAVE_EPIT
- bool
-
-config MXC_USE_EPIT
- bool "Use EPIT instead of GPT"
- depends on HAVE_EPIT
- help
- Use EPIT as the system timer on systems that have it. Normally you
- don't have a reason to do so as the EPIT has the same features and
- uses the same clocks as the GPT. Anyway, on some systems the GPT
- may be in use for other purposes.
-
-config MXC_ULPI
- bool
-
-config ARCH_HAS_RNGA
- bool
-
-config IMX_HAVE_IOMUX_V1
- bool
-
-config ARCH_MXC_IOMUX_V3
- bool
-
-config IRAM_ALLOC
- bool
- select GENERIC_ALLOCATOR
-
-endif
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
deleted file mode 100644
index 149237e2..0000000
--- a/arch/arm/plat-mxc/Makefile
+++ /dev/null
@@ -1,24 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-# Common support
-obj-y := time.o devices.o cpu.o system.o irq-common.o
-
-obj-$(CONFIG_MXC_TZIC) += tzic.o
-obj-$(CONFIG_MXC_AVIC) += avic.o
-
-obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
-obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
-obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o
-obj-$(CONFIG_MXC_ULPI) += ulpi.o
-obj-$(CONFIG_MXC_USE_EPIT) += epit.o
-obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
-obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o
-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
-ifdef CONFIG_SND_IMX_SOC
-obj-y += ssi-fiq.o
-obj-y += ssi-fiq-ksym.o
-endif
-
-obj-y += devices/
diff --git a/arch/arm/plat-mxc/devices/platform-mx2-emma.c b/arch/arm/plat-mxc/devices/platform-mx2-emma.c
new file mode 100644
index 0000000..508404d
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-mx2-emma.c
@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2010 Pengutronix
+ * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation.
+ */
+#include <mach/hardware.h>
+#include <mach/devices-common.h>
+
+#define imx_mx2_emmaprp_data_entry_single(soc) \
+ { \
+ .iobase = soc ## _EMMAPRP_BASE_ADDR, \
+ .iosize = SZ_32, \
+ .irq = soc ## _INT_EMMAPRP, \
+ }
+
+#ifdef CONFIG_SOC_IMX27
+const struct imx_mx2_emma_data imx27_mx2_emmaprp_data __initconst =
+ imx_mx2_emmaprp_data_entry_single(MX27);
+#endif /* ifdef CONFIG_SOC_IMX27 */
+
+struct platform_device *__init imx_add_mx2_emmaprp(
+ const struct imx_mx2_emma_data *data)
+{
+ struct resource res[] = {
+ {
+ .start = data->iobase,
+ .end = data->iobase + data->iosize - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = data->irq,
+ .end = data->irq,
+ .flags = IORESOURCE_IRQ,
+ },
+ };
+ return imx_add_platform_device_dmamask("m2m-emmaprp", 0,
+ res, 2, NULL, 0, DMA_BIT_MASK(32));
+}
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
deleted file mode 100644
index 761e45f..0000000
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ /dev/null
@@ -1,51 +0,0 @@
-/* arch/arm/mach-imx/include/mach/debug-macro.S
- *
- * Debugging macro include header
- *
- * Copyright (C) 1994-1999 Russell King
- * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-#include <mach/hardware.h>
-
-#ifdef CONFIG_DEBUG_IMX1_UART
-#define UART_PADDR MX1_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX25_UART)
-#define UART_PADDR MX25_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX21_IMX27_UART)
-#define UART_PADDR MX2x_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX31_IMX35_UART)
-#define UART_PADDR MX3x_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX51_UART)
-#define UART_PADDR MX51_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
-#define UART_PADDR MX53_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX6Q_UART2)
-#define UART_PADDR MX6Q_UART2_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX6Q_UART4)
-#define UART_PADDR MX6Q_UART4_BASE_ADDR
-#endif
-
-#define UART_VADDR IMX_IO_ADDRESS(UART_PADDR)
-
- .macro addruart, rp, rv, tmp
- ldr \rp, =UART_PADDR @ physical
- ldr \rv, =UART_VADDR @ virtual
- .endm
-
- .macro senduart,rd,rx
- str \rd, [\rx, #0x40] @ TXDATA
- .endm
-
- .macro waituart,rd,rx
- .endm
-
- .macro busyuart,rd,rx
-1002: ldr \rd, [\rx, #0x98] @ SR2
- tst \rd, #1 << 3 @ TXDC
- beq 1002b @ wait until transmit done
- .endm
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
deleted file mode 100644
index d73f5e8..0000000
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_MXC_IRQS_H__
-#define __ASM_ARCH_MXC_IRQS_H__
-
-extern int imx_irq_set_priority(unsigned char irq, unsigned char prio);
-
-/* all normal IRQs can be FIQs */
-#define FIQ_START 0
-/* switch between IRQ and FIQ */
-extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type);
-
-#endif /* __ASM_ARCH_MXC_IRQS_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
deleted file mode 100644
index 477971b..0000000
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * arch/arm/plat-mxc/include/mach/uncompress.h
- *
- * Copyright (C) 1999 ARM Limited
- * Copyright (C) Shane Nay (shane@minirl.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__
-#define __ASM_ARCH_MXC_UNCOMPRESS_H__
-
-#define __MXC_BOOT_UNCOMPRESS
-
-#include <asm/mach-types.h>
-
-unsigned long uart_base;
-
-#define UART(x) (*(volatile unsigned long *)(uart_base + (x)))
-
-#define USR2 0x98
-#define USR2_TXFE (1<<14)
-#define TXR 0x40
-#define UCR1 0x80
-#define UCR1_UARTEN 1
-
-/*
- * The following code assumes the serial port has already been
- * initialized by the bootloader. We search for the first enabled
- * port in the most probable order. If you didn't setup a port in
- * your bootloader then nothing will appear (which might be desired).
- *
- * This does not append a newline
- */
-
-static void putc(int ch)
-{
- if (!uart_base)
- return;
- if (!(UART(UCR1) & UCR1_UARTEN))
- return;
-
- while (!(UART(USR2) & USR2_TXFE))
- barrier();
-
- UART(TXR) = ch;
-}
-
-static inline void flush(void)
-{
-}
-
-#define MX1_UART1_BASE_ADDR 0x00206000
-#define MX25_UART1_BASE_ADDR 0x43f90000
-#define MX2X_UART1_BASE_ADDR 0x1000a000
-#define MX3X_UART1_BASE_ADDR 0x43F90000
-#define MX3X_UART2_BASE_ADDR 0x43F94000
-#define MX3X_UART5_BASE_ADDR 0x43FB4000
-#define MX51_UART1_BASE_ADDR 0x73fbc000
-#define MX50_UART1_BASE_ADDR 0x53fbc000
-#define MX53_UART1_BASE_ADDR 0x53fbc000
-
-static __inline__ void __arch_decomp_setup(unsigned long arch_id)
-{
- switch (arch_id) {
- case MACH_TYPE_MX1ADS:
- case MACH_TYPE_SCB9328:
- uart_base = MX1_UART1_BASE_ADDR;
- break;
- case MACH_TYPE_MX25_3DS:
- uart_base = MX25_UART1_BASE_ADDR;
- break;
- case MACH_TYPE_IMX27LITE:
- case MACH_TYPE_MX27_3DS:
- case MACH_TYPE_MX27ADS:
- case MACH_TYPE_PCM038:
- case MACH_TYPE_MX21ADS:
- case MACH_TYPE_PCA100:
- case MACH_TYPE_MXT_TD60:
- case MACH_TYPE_IMX27IPCAM:
- uart_base = MX2X_UART1_BASE_ADDR;
- break;
- case MACH_TYPE_MX31LITE:
- case MACH_TYPE_ARMADILLO5X0:
- case MACH_TYPE_MX31MOBOARD:
- case MACH_TYPE_QONG:
- case MACH_TYPE_MX31_3DS:
- case MACH_TYPE_PCM037:
- case MACH_TYPE_MX31ADS:
- case MACH_TYPE_MX35_3DS:
- case MACH_TYPE_PCM043:
- case MACH_TYPE_LILLY1131:
- case MACH_TYPE_VPR200:
- case MACH_TYPE_EUKREA_CPUIMX35SD:
- uart_base = MX3X_UART1_BASE_ADDR;
- break;
- case MACH_TYPE_MAGX_ZN5:
- uart_base = MX3X_UART2_BASE_ADDR;
- break;
- case MACH_TYPE_BUG:
- uart_base = MX3X_UART5_BASE_ADDR;
- break;
- case MACH_TYPE_MX51_BABBAGE:
- case MACH_TYPE_EUKREA_CPUIMX51SD:
- case MACH_TYPE_MX51_3DS:
- uart_base = MX51_UART1_BASE_ADDR;
- break;
- case MACH_TYPE_MX50_RDP:
- uart_base = MX50_UART1_BASE_ADDR;
- break;
- case MACH_TYPE_MX53_EVK:
- case MACH_TYPE_MX53_LOCO:
- case MACH_TYPE_MX53_SMD:
- case MACH_TYPE_MX53_ARD:
- uart_base = MX53_UART1_BASE_ADDR;
- break;
- default:
- break;
- }
-}
-
-#define arch_decomp_setup() __arch_decomp_setup(arch_id)
-#define arch_decomp_wdog()
-
-#endif /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */
diff --git a/arch/arm/plat-versatile/Kconfig b/arch/arm/plat-versatile/Kconfig
index 2a4ae8a..619f0fa 100644
--- a/arch/arm/plat-versatile/Kconfig
+++ b/arch/arm/plat-versatile/Kconfig
@@ -6,15 +6,6 @@
config PLAT_VERSATILE_CLCD
bool
-config PLAT_VERSATILE_FPGA_IRQ
- bool
- select IRQ_DOMAIN
-
-config PLAT_VERSATILE_FPGA_IRQ_NR
- int
- default 4
- depends on PLAT_VERSATILE_FPGA_IRQ
-
config PLAT_VERSATILE_LEDS
def_bool y if NEW_LEDS
depends on ARCH_REALVIEW || ARCH_VERSATILE
diff --git a/arch/arm/plat-versatile/Makefile b/arch/arm/plat-versatile/Makefile
index 74cfd94..f88d448 100644
--- a/arch/arm/plat-versatile/Makefile
+++ b/arch/arm/plat-versatile/Makefile
@@ -2,7 +2,6 @@
obj-$(CONFIG_PLAT_VERSATILE_CLOCK) += clock.o
obj-$(CONFIG_PLAT_VERSATILE_CLCD) += clcd.o
-obj-$(CONFIG_PLAT_VERSATILE_FPGA_IRQ) += fpga-irq.o
obj-$(CONFIG_PLAT_VERSATILE_LEDS) += leds.o
obj-$(CONFIG_PLAT_VERSATILE_SCHED_CLOCK) += sched-clock.o
obj-$(CONFIG_SMP) += headsmp.o platsmp.o
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index c834b32..3b44e0d 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -701,11 +701,14 @@
elf_hwcap |= HWCAP_VFPv3;
/*
- * Check for VFPv3 D16. CPUs in this configuration
- * only have 16 x 64bit registers.
+ * Check for VFPv3 D16 and VFPv4 D16. CPUs in
+ * this configuration only have 16 x 64bit
+ * registers.
*/
if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1)
- elf_hwcap |= HWCAP_VFPv3D16;
+ elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */
+ else
+ elf_hwcap |= HWCAP_VFPD32;
}
#endif
/*
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index 59bcb96..f576092 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -166,3 +166,14 @@
*pages = NULL;
}
EXPORT_SYMBOL_GPL(free_xenballooned_pages);
+
+/* In the hypervisor.S file. */
+EXPORT_SYMBOL_GPL(HYPERVISOR_event_channel_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_grant_table_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_xen_version);
+EXPORT_SYMBOL_GPL(HYPERVISOR_console_io);
+EXPORT_SYMBOL_GPL(HYPERVISOR_sched_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_hvm_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op);
+EXPORT_SYMBOL_GPL(privcmd_call);
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index ef54a59..15ac18a 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1,6 +1,7 @@
config ARM64
def_bool y
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
+ select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
select GENERIC_CLOCKEVENTS
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IOMAP
diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index cf28464..07fea29 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -25,12 +25,10 @@
#include <asm/user.h>
typedef unsigned long elf_greg_t;
-typedef unsigned long elf_freg_t[3];
#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-typedef struct user_fp elf_fpregset_t;
+typedef struct user_fpsimd_state elf_fpregset_t;
#define EM_AARCH64 183
@@ -87,7 +85,6 @@
#define R_AARCH64_MOVW_PREL_G2_NC 292
#define R_AARCH64_MOVW_PREL_G3 293
-
/*
* These are used to set parameters in the core dumps.
*/
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index b42fab9..c43b4ac 100644
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -25,9 +25,8 @@
* - FPSR and FPCR
* - 32 128-bit data registers
*
- * Note that user_fp forms a prefix of this structure, which is relied
- * upon in the ptrace FP/SIMD accessors. struct user_fpsimd_state must
- * form a prefix of struct fpsimd_state.
+ * Note that user_fpsimd forms a prefix of this structure, which is
+ * relied upon in the ptrace FP/SIMD accessors.
*/
struct fpsimd_state {
union {
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 74a2a7d..54f6116 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -114,7 +114,7 @@
* I/O port access primitives.
*/
#define IO_SPACE_LIMIT 0xffff
-#define PCI_IOBASE ((void __iomem *)0xffffffbbfffe0000UL)
+#define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_2M))
static inline u8 inb(unsigned long addr)
{
@@ -225,9 +225,9 @@
#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_XN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC))
-#define ioremap(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE)
-#define ioremap_nocache(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE)
-#define ioremap_wc(addr, size) __ioremap((addr), (size), PROT_NORMAL_NC)
+#define ioremap(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
+#define ioremap_nocache(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
+#define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC))
#define iounmap __iounmap
#define ARCH_HAS_IOREMAP_WC
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index 5d81004..77f696c 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -43,6 +43,8 @@
#else
#define STACK_TOP STACK_TOP_MAX
#endif /* CONFIG_COMPAT */
+
+#define ARCH_LOW_ADDRESS_LIMIT PHYS_MASK
#endif /* __KERNEL__ */
struct debug_info {
diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h
index 63f853f..68aff28 100644
--- a/arch/arm64/include/asm/unistd.h
+++ b/arch/arm64/include/asm/unistd.h
@@ -14,7 +14,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef CONFIG_COMPAT
-#define __ARCH_WANT_COMPAT_IPC_PARSE_VERSION
#define __ARCH_WANT_COMPAT_STAT64
#define __ARCH_WANT_SYS_GETHOSTNAME
#define __ARCH_WANT_SYS_PAUSE
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index ecbf2d8..c76c724 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -613,17 +613,11 @@
ARMV8_PMUV3_PERFCTR_BUS_ACCESS = 0x19,
ARMV8_PMUV3_PERFCTR_MEM_ERROR = 0x1A,
ARMV8_PMUV3_PERFCTR_BUS_CYCLES = 0x1D,
-
- /*
- * This isn't an architected event.
- * We detect this event number and use the cycle counter instead.
- */
- ARMV8_PMUV3_PERFCTR_CPU_CYCLES = 0xFF,
};
/* PMUv3 HW events mapping. */
static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = {
- [PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CPU_CYCLES,
+ [PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES,
[PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED,
[PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS,
[PERF_COUNT_HW_CACHE_MISSES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_REFILL,
@@ -1106,7 +1100,7 @@
unsigned long evtype = event->config_base & ARMV8_EVTYPE_EVENT;
/* Always place a cycle counter into the cycle counter. */
- if (evtype == ARMV8_PMUV3_PERFCTR_CPU_CYCLES) {
+ if (evtype == ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES) {
if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask))
return -EAGAIN;
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index f22965e..e04cebd 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -310,24 +310,6 @@
}
/*
- * Fill in the task's elfregs structure for a core dump.
- */
-int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
-{
- elf_core_copy_regs(elfregs, task_pt_regs(t));
- return 1;
-}
-
-/*
- * fill in the fpe structure for a core dump...
- */
-int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
-{
- return 0;
-}
-EXPORT_SYMBOL(dump_fpu);
-
-/*
* Shuffle the argument into the correct register before calling the
* thread function. x1 is the thread argument, x2 is the pointer to
* the thread function, and x3 points to the exit function.
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 226b6bf..538300f 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -211,8 +211,7 @@
* before we continue.
*/
set_cpu_online(cpu, true);
- while (!cpu_active(cpu))
- cpu_relax();
+ complete(&cpu_running);
/*
* OK, it's off to the idle thread for us
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index efbf7df..4cd2893 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -80,7 +80,7 @@
#ifdef CONFIG_ZONE_DMA32
/* 4GB maximum for 32-bit only capable devices */
max_dma32 = min(max, MAX_DMA32_PFN);
- zone_size[ZONE_DMA32] = max_dma32 - min;
+ zone_size[ZONE_DMA32] = max(min, max_dma32) - min;
#endif
zone_size[ZONE_NORMAL] = max - max_dma32;
diff --git a/arch/h8300/include/asm/cache.h b/arch/h8300/include/asm/cache.h
index c635028..05887a1 100644
--- a/arch/h8300/include/asm/cache.h
+++ b/arch/h8300/include/asm/cache.h
@@ -2,7 +2,8 @@
#define __ARCH_H8300_CACHE_H
/* bytes per L1 cache line */
-#define L1_CACHE_BYTES 4
+#define L1_CACHE_SHIFT 2
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
/* m68k-elf-gcc 2.95.2 doesn't like these */
diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h
index 55bde60..ad2b924 100644
--- a/arch/s390/include/asm/cio.h
+++ b/arch/s390/include/asm/cio.h
@@ -9,6 +9,8 @@
#define LPM_ANYPATH 0xff
#define __MAX_CSSID 0
+#define __MAX_SUBCHANNEL 65535
+#define __MAX_SSID 3
#include <asm/scsw.h>
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index dd647c9..2d3b7cb 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -506,12 +506,15 @@
static inline int pmd_present(pmd_t pmd)
{
- return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL;
+ unsigned long mask = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY_RO;
+ return (pmd_val(pmd) & mask) == _HPAGE_TYPE_NONE ||
+ !(pmd_val(pmd) & _SEGMENT_ENTRY_INV);
}
static inline int pmd_none(pmd_t pmd)
{
- return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL;
+ return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) &&
+ !(pmd_val(pmd) & _SEGMENT_ENTRY_RO);
}
static inline int pmd_large(pmd_t pmd)
@@ -1223,6 +1226,11 @@
}
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+
+#define SEGMENT_NONE __pgprot(_HPAGE_TYPE_NONE)
+#define SEGMENT_RO __pgprot(_HPAGE_TYPE_RO)
+#define SEGMENT_RW __pgprot(_HPAGE_TYPE_RW)
+
#define __HAVE_ARCH_PGTABLE_DEPOSIT
extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);
@@ -1242,16 +1250,15 @@
static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
{
- unsigned long pgprot_pmd = 0;
-
- if (pgprot_val(pgprot) & _PAGE_INVALID) {
- if (pgprot_val(pgprot) & _PAGE_SWT)
- pgprot_pmd |= _HPAGE_TYPE_NONE;
- pgprot_pmd |= _SEGMENT_ENTRY_INV;
- }
- if (pgprot_val(pgprot) & _PAGE_RO)
- pgprot_pmd |= _SEGMENT_ENTRY_RO;
- return pgprot_pmd;
+ /*
+ * pgprot is PAGE_NONE, PAGE_RO, or PAGE_RW (see __Pxxx / __Sxxx)
+ * Convert to segment table entry format.
+ */
+ if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
+ return pgprot_val(SEGMENT_NONE);
+ if (pgprot_val(pgprot) == pgprot_val(PAGE_RO))
+ return pgprot_val(SEGMENT_RO);
+ return pgprot_val(SEGMENT_RW);
}
static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
@@ -1269,7 +1276,9 @@
static inline pmd_t pmd_mkwrite(pmd_t pmd)
{
- pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO;
+ /* Do not clobber _HPAGE_TYPE_NONE pages! */
+ if (!(pmd_val(pmd) & _SEGMENT_ENTRY_INV))
+ pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO;
return pmd;
}
diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S
index bf05389..b6506ee 100644
--- a/arch/s390/kernel/sclp.S
+++ b/arch/s390/kernel/sclp.S
@@ -44,6 +44,12 @@
#endif
mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8)
mvc 0(16,%r8),0(%r9)
+#ifdef CONFIG_64BIT
+ epsw %r6,%r7 # set current addressing mode
+ nill %r6,0x1 # in new psw (31 or 64 bit mode)
+ nilh %r7,0x8000
+ stm %r6,%r7,0(%r8)
+#endif
lhi %r6,0x0200 # cr mask for ext int (cr0.54)
ltr %r2,%r2
jz .LsetctS1
@@ -87,7 +93,7 @@
.long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int
#ifdef CONFIG_64BIT
.LextpswS1_64:
- .quad 0x0000000180000000, .LwaitS1 # PSW to handle ext int, 64 bit
+ .quad 0, .LwaitS1 # PSW to handle ext int, 64 bit
#endif
.LwaitpswS1:
.long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int
diff --git a/arch/s390/lib/uaccess_pt.c b/arch/s390/lib/uaccess_pt.c
index 2d37bb8..9017a63 100644
--- a/arch/s390/lib/uaccess_pt.c
+++ b/arch/s390/lib/uaccess_pt.c
@@ -39,7 +39,7 @@
pmd = pmd_offset(pud, addr);
if (pmd_none(*pmd))
return -0x10UL;
- if (pmd_huge(*pmd)) {
+ if (pmd_large(*pmd)) {
if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO))
return -0x04UL;
return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK);
diff --git a/arch/s390/mm/gup.c b/arch/s390/mm/gup.c
index 60acb93..8b82853 100644
--- a/arch/s390/mm/gup.c
+++ b/arch/s390/mm/gup.c
@@ -126,7 +126,7 @@
*/
if (pmd_none(pmd) || pmd_trans_splitting(pmd))
return 0;
- if (unlikely(pmd_huge(pmd))) {
+ if (unlikely(pmd_large(pmd))) {
if (!gup_huge_pmd(pmdp, pmd, addr, next,
write, pages, nr))
return 0;
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index b6b442b..9f2edb5 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -20,6 +20,7 @@
select HAVE_ARCH_TRACEHOOK
select SYSCTL_EXCEPTION_TRACE
select ARCH_WANT_OPTIONAL_GPIOLIB
+ select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
select RTC_CLASS
select RTC_DRV_M48T59
select HAVE_IRQ_WORK
diff --git a/arch/sparc/crypto/Makefile b/arch/sparc/crypto/Makefile
index 6ae1ad5..5d469d8 100644
--- a/arch/sparc/crypto/Makefile
+++ b/arch/sparc/crypto/Makefile
@@ -13,13 +13,13 @@
obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o
-sha1-sparc64-y := sha1_asm.o sha1_glue.o crop_devid.o
-sha256-sparc64-y := sha256_asm.o sha256_glue.o crop_devid.o
-sha512-sparc64-y := sha512_asm.o sha512_glue.o crop_devid.o
-md5-sparc64-y := md5_asm.o md5_glue.o crop_devid.o
+sha1-sparc64-y := sha1_asm.o sha1_glue.o
+sha256-sparc64-y := sha256_asm.o sha256_glue.o
+sha512-sparc64-y := sha512_asm.o sha512_glue.o
+md5-sparc64-y := md5_asm.o md5_glue.o
-aes-sparc64-y := aes_asm.o aes_glue.o crop_devid.o
-des-sparc64-y := des_asm.o des_glue.o crop_devid.o
-camellia-sparc64-y := camellia_asm.o camellia_glue.o crop_devid.o
+aes-sparc64-y := aes_asm.o aes_glue.o
+des-sparc64-y := des_asm.o des_glue.o
+camellia-sparc64-y := camellia_asm.o camellia_glue.o
-crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o crop_devid.o
+crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o
diff --git a/arch/sparc/crypto/aes_glue.c b/arch/sparc/crypto/aes_glue.c
index 8f1c998..3965d1d 100644
--- a/arch/sparc/crypto/aes_glue.c
+++ b/arch/sparc/crypto/aes_glue.c
@@ -475,3 +475,5 @@
MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated");
MODULE_ALIAS("aes");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/camellia_glue.c b/arch/sparc/crypto/camellia_glue.c
index 42905c0..62c89af 100644
--- a/arch/sparc/crypto/camellia_glue.c
+++ b/arch/sparc/crypto/camellia_glue.c
@@ -320,3 +320,5 @@
MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated");
MODULE_ALIAS("aes");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/crc32c_glue.c b/arch/sparc/crypto/crc32c_glue.c
index 0bd89ce..5162fad 100644
--- a/arch/sparc/crypto/crc32c_glue.c
+++ b/arch/sparc/crypto/crc32c_glue.c
@@ -177,3 +177,5 @@
MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated");
MODULE_ALIAS("crc32c");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/des_glue.c b/arch/sparc/crypto/des_glue.c
index c4940c2..41524ce 100644
--- a/arch/sparc/crypto/des_glue.c
+++ b/arch/sparc/crypto/des_glue.c
@@ -527,3 +527,5 @@
MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated");
MODULE_ALIAS("des");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/md5_glue.c b/arch/sparc/crypto/md5_glue.c
index 603d723..09a9ea1 100644
--- a/arch/sparc/crypto/md5_glue.c
+++ b/arch/sparc/crypto/md5_glue.c
@@ -186,3 +186,5 @@
MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated");
MODULE_ALIAS("md5");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/sha1_glue.c b/arch/sparc/crypto/sha1_glue.c
index 2bbb20b..6cd5f29 100644
--- a/arch/sparc/crypto/sha1_glue.c
+++ b/arch/sparc/crypto/sha1_glue.c
@@ -181,3 +181,5 @@
MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated");
MODULE_ALIAS("sha1");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/sha256_glue.c b/arch/sparc/crypto/sha256_glue.c
index 591e656..04f555a 100644
--- a/arch/sparc/crypto/sha256_glue.c
+++ b/arch/sparc/crypto/sha256_glue.c
@@ -239,3 +239,5 @@
MODULE_ALIAS("sha224");
MODULE_ALIAS("sha256");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/sha512_glue.c b/arch/sparc/crypto/sha512_glue.c
index 486f0a2..f04d199 100644
--- a/arch/sparc/crypto/sha512_glue.c
+++ b/arch/sparc/crypto/sha512_glue.c
@@ -224,3 +224,5 @@
MODULE_ALIAS("sha384");
MODULE_ALIAS("sha512");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h
index ce35a1c..be56a24 100644
--- a/arch/sparc/include/asm/atomic_64.h
+++ b/arch/sparc/include/asm/atomic_64.h
@@ -1,7 +1,7 @@
/* atomic.h: Thankfully the V9 is at least reasonable for this
* stuff.
*
- * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com)
+ * Copyright (C) 1996, 1997, 2000, 2012 David S. Miller (davem@redhat.com)
*/
#ifndef __ARCH_SPARC64_ATOMIC__
@@ -106,6 +106,8 @@
#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
+extern long atomic64_dec_if_positive(atomic64_t *v);
+
/* Atomic operations are already serializing */
#define smp_mb__before_atomic_dec() barrier()
#define smp_mb__after_atomic_dec() barrier()
diff --git a/arch/sparc/include/asm/backoff.h b/arch/sparc/include/asm/backoff.h
index db3af0d..4e02086 100644
--- a/arch/sparc/include/asm/backoff.h
+++ b/arch/sparc/include/asm/backoff.h
@@ -1,6 +1,46 @@
#ifndef _SPARC64_BACKOFF_H
#define _SPARC64_BACKOFF_H
+/* The macros in this file implement an exponential backoff facility
+ * for atomic operations.
+ *
+ * When multiple threads compete on an atomic operation, it is
+ * possible for one thread to be continually denied a successful
+ * completion of the compare-and-swap instruction. Heavily
+ * threaded cpu implementations like Niagara can compound this
+ * problem even further.
+ *
+ * When an atomic operation fails and needs to be retried, we spin a
+ * certain number of times. At each subsequent failure of the same
+ * operation we double the spin count, realizing an exponential
+ * backoff.
+ *
+ * When we spin, we try to use an operation that will cause the
+ * current cpu strand to block, and therefore make the core fully
+ * available to any other other runnable strands. There are two
+ * options, based upon cpu capabilities.
+ *
+ * On all cpus prior to SPARC-T4 we do three dummy reads of the
+ * condition code register. Each read blocks the strand for something
+ * between 40 and 50 cpu cycles.
+ *
+ * For SPARC-T4 and later we have a special "pause" instruction
+ * available. This is implemented using writes to register %asr27.
+ * The cpu will block the number of cycles written into the register,
+ * unless a disrupting trap happens first. SPARC-T4 specifically
+ * implements pause with a granularity of 8 cycles. Each strand has
+ * an internal pause counter which decrements every 8 cycles. So the
+ * chip shifts the %asr27 value down by 3 bits, and writes the result
+ * into the pause counter. If a value smaller than 8 is written, the
+ * chip blocks for 1 cycle.
+ *
+ * To achieve the same amount of backoff as the three %ccr reads give
+ * on earlier chips, we shift the backoff value up by 7 bits. (Three
+ * %ccr reads block for about 128 cycles, 1 << 7 == 128) We write the
+ * whole amount we want to block into the pause register, rather than
+ * loop writing 128 each time.
+ */
+
#define BACKOFF_LIMIT (4 * 1024)
#ifdef CONFIG_SMP
@@ -11,16 +51,25 @@
#define BACKOFF_LABEL(spin_label, continue_label) \
spin_label
-#define BACKOFF_SPIN(reg, tmp, label) \
- mov reg, tmp; \
-88: brnz,pt tmp, 88b; \
- sub tmp, 1, tmp; \
- set BACKOFF_LIMIT, tmp; \
- cmp reg, tmp; \
- bg,pn %xcc, label; \
- nop; \
- ba,pt %xcc, label; \
- sllx reg, 1, reg;
+#define BACKOFF_SPIN(reg, tmp, label) \
+ mov reg, tmp; \
+88: rd %ccr, %g0; \
+ rd %ccr, %g0; \
+ rd %ccr, %g0; \
+ .section .pause_3insn_patch,"ax";\
+ .word 88b; \
+ sllx tmp, 7, tmp; \
+ wr tmp, 0, %asr27; \
+ clr tmp; \
+ .previous; \
+ brnz,pt tmp, 88b; \
+ sub tmp, 1, tmp; \
+ set BACKOFF_LIMIT, tmp; \
+ cmp reg, tmp; \
+ bg,pn %xcc, label; \
+ nop; \
+ ba,pt %xcc, label; \
+ sllx reg, 1, reg;
#else
diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h
index cef99fb..830502fe 100644
--- a/arch/sparc/include/asm/compat.h
+++ b/arch/sparc/include/asm/compat.h
@@ -232,9 +232,10 @@
struct pt_regs *regs = current_thread_info()->kregs;
unsigned long usp = regs->u_regs[UREG_I6];
- if (!(test_thread_flag(TIF_32BIT)))
+ if (test_thread_64bit_stack(usp))
usp += STACK_BIAS;
- else
+
+ if (test_thread_flag(TIF_32BIT))
usp &= 0xffffffffUL;
usp -= len;
diff --git a/arch/sparc/include/asm/processor_64.h b/arch/sparc/include/asm/processor_64.h
index 4e5a483..721e25f 100644
--- a/arch/sparc/include/asm/processor_64.h
+++ b/arch/sparc/include/asm/processor_64.h
@@ -196,7 +196,22 @@
#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc)
#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP])
-#define cpu_relax() barrier()
+/* Please see the commentary in asm/backoff.h for a description of
+ * what these instructions are doing and how they have been choosen.
+ * To make a long story short, we are trying to yield the current cpu
+ * strand during busy loops.
+ */
+#define cpu_relax() asm volatile("\n99:\n\t" \
+ "rd %%ccr, %%g0\n\t" \
+ "rd %%ccr, %%g0\n\t" \
+ "rd %%ccr, %%g0\n\t" \
+ ".section .pause_3insn_patch,\"ax\"\n\t"\
+ ".word 99b\n\t" \
+ "wr %%g0, 128, %%asr27\n\t" \
+ "nop\n\t" \
+ "nop\n\t" \
+ ".previous" \
+ ::: "memory")
/* Prefetch support. This is tuned for UltraSPARC-III and later.
* UltraSPARC-I will treat these as nops, and UltraSPARC-II has
diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h
index c287651..f930031 100644
--- a/arch/sparc/include/asm/prom.h
+++ b/arch/sparc/include/asm/prom.h
@@ -63,5 +63,10 @@
extern void irq_trans_init(struct device_node *dp);
extern char *build_path_component(struct device_node *dp);
+/* SPARC has a local implementation */
+extern int of_address_to_resource(struct device_node *dev, int index,
+ struct resource *r);
+#define of_address_to_resource of_address_to_resource
+
#endif /* __KERNEL__ */
#endif /* _SPARC_PROM_H */
diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h
index 4e227663..a3fe4dc 100644
--- a/arch/sparc/include/asm/thread_info_64.h
+++ b/arch/sparc/include/asm/thread_info_64.h
@@ -259,6 +259,11 @@
#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
+#define thread32_stack_is_64bit(__SP) (((__SP) & 0x1) != 0)
+#define test_thread_64bit_stack(__SP) \
+ ((test_thread_flag(TIF_32BIT) && !thread32_stack_is_64bit(__SP)) ? \
+ false : true)
+
#endif /* !__ASSEMBLY__ */
#endif /* __KERNEL__ */
diff --git a/arch/sparc/include/asm/ttable.h b/arch/sparc/include/asm/ttable.h
index 48f2807..71b5a67 100644
--- a/arch/sparc/include/asm/ttable.h
+++ b/arch/sparc/include/asm/ttable.h
@@ -372,7 +372,9 @@
/* Normal 32bit spill */
#define SPILL_2_GENERIC(ASI) \
- srl %sp, 0, %sp; \
+ and %sp, 1, %g3; \
+ brnz,pn %g3, (. - (128 + 4)); \
+ srl %sp, 0, %sp; \
stwa %l0, [%sp + %g0] ASI; \
mov 0x04, %g3; \
stwa %l1, [%sp + %g3] ASI; \
@@ -398,14 +400,16 @@
stwa %i6, [%g1 + %g0] ASI; \
stwa %i7, [%g1 + %g3] ASI; \
saved; \
- retry; nop; nop; \
+ retry; \
b,a,pt %xcc, spill_fixup_dax; \
b,a,pt %xcc, spill_fixup_mna; \
b,a,pt %xcc, spill_fixup;
#define SPILL_2_GENERIC_ETRAP \
etrap_user_spill_32bit: \
- srl %sp, 0, %sp; \
+ and %sp, 1, %g3; \
+ brnz,pn %g3, etrap_user_spill_64bit; \
+ srl %sp, 0, %sp; \
stwa %l0, [%sp + 0x00] %asi; \
stwa %l1, [%sp + 0x04] %asi; \
stwa %l2, [%sp + 0x08] %asi; \
@@ -427,7 +431,7 @@
ba,pt %xcc, etrap_save; \
wrpr %g1, %cwp; \
nop; nop; nop; nop; \
- nop; nop; nop; nop; \
+ nop; nop; \
ba,a,pt %xcc, etrap_spill_fixup_32bit; \
ba,a,pt %xcc, etrap_spill_fixup_32bit; \
ba,a,pt %xcc, etrap_spill_fixup_32bit;
@@ -592,7 +596,9 @@
/* Normal 32bit fill */
#define FILL_2_GENERIC(ASI) \
- srl %sp, 0, %sp; \
+ and %sp, 1, %g3; \
+ brnz,pn %g3, (. - (128 + 4)); \
+ srl %sp, 0, %sp; \
lduwa [%sp + %g0] ASI, %l0; \
mov 0x04, %g2; \
mov 0x08, %g3; \
@@ -616,14 +622,16 @@
lduwa [%g1 + %g3] ASI, %i6; \
lduwa [%g1 + %g5] ASI, %i7; \
restored; \
- retry; nop; nop; nop; nop; \
+ retry; nop; nop; \
b,a,pt %xcc, fill_fixup_dax; \
b,a,pt %xcc, fill_fixup_mna; \
b,a,pt %xcc, fill_fixup;
#define FILL_2_GENERIC_RTRAP \
user_rtt_fill_32bit: \
- srl %sp, 0, %sp; \
+ and %sp, 1, %g3; \
+ brnz,pn %g3, user_rtt_fill_64bit; \
+ srl %sp, 0, %sp; \
lduwa [%sp + 0x00] %asi, %l0; \
lduwa [%sp + 0x04] %asi, %l1; \
lduwa [%sp + 0x08] %asi, %l2; \
@@ -643,7 +651,7 @@
ba,pt %xcc, user_rtt_pre_restore; \
restored; \
nop; nop; nop; nop; nop; \
- nop; nop; nop; nop; nop; \
+ nop; nop; nop; \
ba,a,pt %xcc, user_rtt_fill_fixup; \
ba,a,pt %xcc, user_rtt_fill_fixup; \
ba,a,pt %xcc, user_rtt_fill_fixup;
diff --git a/arch/sparc/include/uapi/asm/unistd.h b/arch/sparc/include/uapi/asm/unistd.h
index 8974ef7..cac719d 100644
--- a/arch/sparc/include/uapi/asm/unistd.h
+++ b/arch/sparc/include/uapi/asm/unistd.h
@@ -405,8 +405,13 @@
#define __NR_setns 337
#define __NR_process_vm_readv 338
#define __NR_process_vm_writev 339
+#define __NR_kern_features 340
+#define __NR_kcmp 341
-#define NR_syscalls 340
+#define NR_syscalls 342
+
+/* Bitmask values returned from kern_features system call. */
+#define KERN_FEATURE_MIXED_MODE_STACK 0x00000001
#ifdef __32bit_syscall_numbers__
/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
diff --git a/arch/sparc/kernel/entry.h b/arch/sparc/kernel/entry.h
index 0c218e4..cc3c5cb 100644
--- a/arch/sparc/kernel/entry.h
+++ b/arch/sparc/kernel/entry.h
@@ -59,6 +59,13 @@
extern struct popc_6insn_patch_entry __popc_6insn_patch,
__popc_6insn_patch_end;
+struct pause_patch_entry {
+ unsigned int addr;
+ unsigned int insns[3];
+};
+extern struct pause_patch_entry __pause_3insn_patch,
+ __pause_3insn_patch_end;
+
extern void __init per_cpu_patch(void);
extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,
struct sun4v_1insn_patch_entry *);
diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c
index f8b6eee..87f60ee 100644
--- a/arch/sparc/kernel/leon_kernel.c
+++ b/arch/sparc/kernel/leon_kernel.c
@@ -56,11 +56,13 @@
static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc)
{
unsigned int eirq;
+ struct irq_bucket *p;
int cpu = sparc_leon3_cpuid();
eirq = leon_eirq_get(cpu);
- if ((eirq & 0x10) && irq_map[eirq]->irq) /* bit4 tells if IRQ happened */
- generic_handle_irq(irq_map[eirq]->irq);
+ p = irq_map[eirq];
+ if ((eirq & 0x10) && p && p->irq) /* bit4 tells if IRQ happened */
+ generic_handle_irq(p->irq);
}
/* The extended IRQ controller has been found, this function registers it */
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index 885a8af..b5c38fa 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -1762,15 +1762,25 @@
ufp = regs->u_regs[UREG_I6] & 0xffffffffUL;
do {
- struct sparc_stackf32 *usf, sf;
unsigned long pc;
- usf = (struct sparc_stackf32 *) ufp;
- if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
- break;
+ if (thread32_stack_is_64bit(ufp)) {
+ struct sparc_stackf *usf, sf;
- pc = sf.callers_pc;
- ufp = (unsigned long)sf.fp;
+ ufp += STACK_BIAS;
+ usf = (struct sparc_stackf *) ufp;
+ if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
+ break;
+ pc = sf.callers_pc & 0xffffffff;
+ ufp = ((unsigned long) sf.fp) & 0xffffffff;
+ } else {
+ struct sparc_stackf32 *usf, sf;
+ usf = (struct sparc_stackf32 *) ufp;
+ if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
+ break;
+ pc = sf.callers_pc;
+ ufp = (unsigned long)sf.fp;
+ }
perf_callchain_store(entry, pc);
} while (entry->nr < PERF_MAX_STACK_DEPTH);
}
diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c
index d778248..c6e0c29 100644
--- a/arch/sparc/kernel/process_64.c
+++ b/arch/sparc/kernel/process_64.c
@@ -452,13 +452,16 @@
/* It's a bit more tricky when 64-bit tasks are involved... */
static unsigned long clone_stackframe(unsigned long csp, unsigned long psp)
{
+ bool stack_64bit = test_thread_64bit_stack(psp);
unsigned long fp, distance, rval;
- if (!(test_thread_flag(TIF_32BIT))) {
+ if (stack_64bit) {
csp += STACK_BIAS;
psp += STACK_BIAS;
__get_user(fp, &(((struct reg_window __user *)psp)->ins[6]));
fp += STACK_BIAS;
+ if (test_thread_flag(TIF_32BIT))
+ fp &= 0xffffffff;
} else
__get_user(fp, &(((struct reg_window32 __user *)psp)->ins[6]));
@@ -472,7 +475,7 @@
rval = (csp - distance);
if (copy_in_user((void __user *) rval, (void __user *) psp, distance))
rval = 0;
- else if (test_thread_flag(TIF_32BIT)) {
+ else if (!stack_64bit) {
if (put_user(((u32)csp),
&(((struct reg_window32 __user *)rval)->ins[6])))
rval = 0;
@@ -507,18 +510,18 @@
flush_user_windows();
if ((window = get_thread_wsaved()) != 0) {
- int winsize = sizeof(struct reg_window);
- int bias = 0;
-
- if (test_thread_flag(TIF_32BIT))
- winsize = sizeof(struct reg_window32);
- else
- bias = STACK_BIAS;
-
window -= 1;
do {
- unsigned long sp = (t->rwbuf_stkptrs[window] + bias);
struct reg_window *rwin = &t->reg_window[window];
+ int winsize = sizeof(struct reg_window);
+ unsigned long sp;
+
+ sp = t->rwbuf_stkptrs[window];
+
+ if (test_thread_64bit_stack(sp))
+ sp += STACK_BIAS;
+ else
+ winsize = sizeof(struct reg_window32);
if (!copy_to_user((char __user *)sp, rwin, winsize)) {
shift_window_buffer(window, get_thread_wsaved() - 1, t);
@@ -544,13 +547,6 @@
{
struct thread_info *t = current_thread_info();
unsigned long window;
- int winsize = sizeof(struct reg_window);
- int bias = 0;
-
- if (test_thread_flag(TIF_32BIT))
- winsize = sizeof(struct reg_window32);
- else
- bias = STACK_BIAS;
flush_user_windows();
window = get_thread_wsaved();
@@ -558,8 +554,16 @@
if (likely(window != 0)) {
window -= 1;
do {
- unsigned long sp = (t->rwbuf_stkptrs[window] + bias);
struct reg_window *rwin = &t->reg_window[window];
+ int winsize = sizeof(struct reg_window);
+ unsigned long sp;
+
+ sp = t->rwbuf_stkptrs[window];
+
+ if (test_thread_64bit_stack(sp))
+ sp += STACK_BIAS;
+ else
+ winsize = sizeof(struct reg_window32);
if (unlikely(sp & 0x7UL))
stack_unaligned(sp);
diff --git a/arch/sparc/kernel/ptrace_64.c b/arch/sparc/kernel/ptrace_64.c
index 484daba..7ff45e4 100644
--- a/arch/sparc/kernel/ptrace_64.c
+++ b/arch/sparc/kernel/ptrace_64.c
@@ -151,7 +151,7 @@
{
unsigned long rw_addr = regs->u_regs[UREG_I6];
- if (test_tsk_thread_flag(current, TIF_32BIT)) {
+ if (!test_thread_64bit_stack(rw_addr)) {
struct reg_window32 win32;
int i;
@@ -176,7 +176,7 @@
{
unsigned long rw_addr = regs->u_regs[UREG_I6];
- if (test_tsk_thread_flag(current, TIF_32BIT)) {
+ if (!test_thread_64bit_stack(rw_addr)) {
struct reg_window32 win32;
int i;
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index 0800e71..0eaf005 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -316,6 +316,25 @@
}
}
+static void __init pause_patch(void)
+{
+ struct pause_patch_entry *p;
+
+ p = &__pause_3insn_patch;
+ while (p < &__pause_3insn_patch_end) {
+ unsigned long i, addr = p->addr;
+
+ for (i = 0; i < 3; i++) {
+ *(unsigned int *) (addr + (i * 4)) = p->insns[i];
+ wmb();
+ __asm__ __volatile__("flush %0"
+ : : "r" (addr + (i * 4)));
+ }
+
+ p++;
+ }
+}
+
#ifdef CONFIG_SMP
void __init boot_cpu_id_too_large(int cpu)
{
@@ -528,6 +547,8 @@
if (sparc64_elf_hwcap & AV_SPARC_POPC)
popc_patch();
+ if (sparc64_elf_hwcap & AV_SPARC_PAUSE)
+ pause_patch();
}
void __init setup_arch(char **cmdline_p)
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index 11c6c96..878ef3d 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -751,3 +751,8 @@
: "cc");
return __res;
}
+
+asmlinkage long sys_kern_features(void)
+{
+ return KERN_FEATURE_MIXED_MODE_STACK;
+}
diff --git a/arch/sparc/kernel/systbls_32.S b/arch/sparc/kernel/systbls_32.S
index 63402f9..5147f57 100644
--- a/arch/sparc/kernel/systbls_32.S
+++ b/arch/sparc/kernel/systbls_32.S
@@ -85,3 +85,4 @@
/*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init
/*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
/*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
+/*340*/ .long sys_ni_syscall, sys_kcmp
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index 3a58e0d..1c9af9f 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -86,6 +86,7 @@
.word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open, compat_sys_recvmmsg, sys_fanotify_init
/*330*/ .word sys32_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime
.word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev
+/*340*/ .word sys_kern_features, sys_kcmp
#endif /* CONFIG_COMPAT */
@@ -163,3 +164,4 @@
.word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init
/*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
.word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
+/*340*/ .word sys_kern_features, sys_kcmp
diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c
index f81d038..8201c25e 100644
--- a/arch/sparc/kernel/unaligned_64.c
+++ b/arch/sparc/kernel/unaligned_64.c
@@ -113,21 +113,24 @@
static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
{
- unsigned long value;
+ unsigned long value, fp;
if (reg < 16)
return (!reg ? 0 : regs->u_regs[reg]);
+
+ fp = regs->u_regs[UREG_FP];
+
if (regs->tstate & TSTATE_PRIV) {
struct reg_window *win;
- win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+ win = (struct reg_window *)(fp + STACK_BIAS);
value = win->locals[reg - 16];
- } else if (test_thread_flag(TIF_32BIT)) {
+ } else if (!test_thread_64bit_stack(fp)) {
struct reg_window32 __user *win32;
- win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+ win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
get_user(value, &win32->locals[reg - 16]);
} else {
struct reg_window __user *win;
- win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+ win = (struct reg_window __user *)(fp + STACK_BIAS);
get_user(value, &win->locals[reg - 16]);
}
return value;
@@ -135,19 +138,24 @@
static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
{
+ unsigned long fp;
+
if (reg < 16)
return ®s->u_regs[reg];
+
+ fp = regs->u_regs[UREG_FP];
+
if (regs->tstate & TSTATE_PRIV) {
struct reg_window *win;
- win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+ win = (struct reg_window *)(fp + STACK_BIAS);
return &win->locals[reg - 16];
- } else if (test_thread_flag(TIF_32BIT)) {
+ } else if (!test_thread_64bit_stack(fp)) {
struct reg_window32 *win32;
- win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+ win32 = (struct reg_window32 *)((unsigned long)((u32)fp));
return (unsigned long *)&win32->locals[reg - 16];
} else {
struct reg_window *win;
- win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+ win = (struct reg_window *)(fp + STACK_BIAS);
return &win->locals[reg - 16];
}
}
@@ -392,13 +400,15 @@
if (rd)
regs->u_regs[rd] = ret;
} else {
- if (test_thread_flag(TIF_32BIT)) {
+ unsigned long fp = regs->u_regs[UREG_FP];
+
+ if (!test_thread_64bit_stack(fp)) {
struct reg_window32 __user *win32;
- win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+ win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
put_user(ret, &win32->locals[rd - 16]);
} else {
struct reg_window __user *win;
- win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+ win = (struct reg_window __user *)(fp + STACK_BIAS);
put_user(ret, &win->locals[rd - 16]);
}
}
@@ -554,7 +564,7 @@
reg[0] = 0;
if ((insn & 0x780000) == 0x180000)
reg[1] = 0;
- } else if (test_thread_flag(TIF_32BIT)) {
+ } else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) {
put_user(0, (int __user *) reg);
if ((insn & 0x780000) == 0x180000)
put_user(0, ((int __user *) reg) + 1);
diff --git a/arch/sparc/kernel/visemul.c b/arch/sparc/kernel/visemul.c
index 08e074b7..c096c62 100644
--- a/arch/sparc/kernel/visemul.c
+++ b/arch/sparc/kernel/visemul.c
@@ -149,21 +149,24 @@
static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
{
- unsigned long value;
+ unsigned long value, fp;
if (reg < 16)
return (!reg ? 0 : regs->u_regs[reg]);
+
+ fp = regs->u_regs[UREG_FP];
+
if (regs->tstate & TSTATE_PRIV) {
struct reg_window *win;
- win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+ win = (struct reg_window *)(fp + STACK_BIAS);
value = win->locals[reg - 16];
- } else if (test_thread_flag(TIF_32BIT)) {
+ } else if (!test_thread_64bit_stack(fp)) {
struct reg_window32 __user *win32;
- win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+ win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
get_user(value, &win32->locals[reg - 16]);
} else {
struct reg_window __user *win;
- win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+ win = (struct reg_window __user *)(fp + STACK_BIAS);
get_user(value, &win->locals[reg - 16]);
}
return value;
@@ -172,16 +175,18 @@
static inline unsigned long __user *__fetch_reg_addr_user(unsigned int reg,
struct pt_regs *regs)
{
+ unsigned long fp = regs->u_regs[UREG_FP];
+
BUG_ON(reg < 16);
BUG_ON(regs->tstate & TSTATE_PRIV);
- if (test_thread_flag(TIF_32BIT)) {
+ if (!test_thread_64bit_stack(fp)) {
struct reg_window32 __user *win32;
- win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+ win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
return (unsigned long __user *)&win32->locals[reg - 16];
} else {
struct reg_window __user *win;
- win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+ win = (struct reg_window __user *)(fp + STACK_BIAS);
return &win->locals[reg - 16];
}
}
@@ -204,7 +209,7 @@
} else {
unsigned long __user *rd_user = __fetch_reg_addr_user(rd, regs);
- if (test_thread_flag(TIF_32BIT))
+ if (!test_thread_64bit_stack(regs->u_regs[UREG_FP]))
__put_user((u32)val, (u32 __user *)rd_user);
else
__put_user(val, rd_user);
diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S
index 89c2c29..0bacceb 100644
--- a/arch/sparc/kernel/vmlinux.lds.S
+++ b/arch/sparc/kernel/vmlinux.lds.S
@@ -132,6 +132,11 @@
*(.popc_6insn_patch)
__popc_6insn_patch_end = .;
}
+ .pause_3insn_patch : {
+ __pause_3insn_patch = .;
+ *(.pause_3insn_patch)
+ __pause_3insn_patch_end = .;
+ }
PERCPU_SECTION(SMP_CACHE_BYTES)
. = ALIGN(PAGE_SIZE);
diff --git a/arch/sparc/kernel/winfixup.S b/arch/sparc/kernel/winfixup.S
index a6b0863..1e67ce9 100644
--- a/arch/sparc/kernel/winfixup.S
+++ b/arch/sparc/kernel/winfixup.S
@@ -43,6 +43,8 @@
spill_fixup_dax:
TRAP_LOAD_THREAD_REG(%g6, %g1)
ldx [%g6 + TI_FLAGS], %g1
+ andcc %sp, 0x1, %g0
+ movne %icc, 0, %g1
andcc %g1, _TIF_32BIT, %g0
ldub [%g6 + TI_WSAVED], %g1
sll %g1, 3, %g3
diff --git a/arch/sparc/lib/atomic_64.S b/arch/sparc/lib/atomic_64.S
index 4d502da..85c233d 100644
--- a/arch/sparc/lib/atomic_64.S
+++ b/arch/sparc/lib/atomic_64.S
@@ -1,6 +1,6 @@
/* atomic.S: These things are too big to do inline.
*
- * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net)
+ * Copyright (C) 1999, 2007 2012 David S. Miller (davem@davemloft.net)
*/
#include <linux/linkage.h>
@@ -117,3 +117,17 @@
sub %g1, %o0, %o0
2: BACKOFF_SPIN(%o2, %o3, 1b)
ENDPROC(atomic64_sub_ret)
+
+ENTRY(atomic64_dec_if_positive) /* %o0 = atomic_ptr */
+ BACKOFF_SETUP(%o2)
+1: ldx [%o0], %g1
+ brlez,pn %g1, 3f
+ sub %g1, 1, %g7
+ casx [%o0], %g1, %g7
+ cmp %g1, %g7
+ bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
+ nop
+3: retl
+ sub %g1, 1, %o0
+2: BACKOFF_SPIN(%o2, %o3, 1b)
+ENDPROC(atomic64_dec_if_positive)
diff --git a/arch/sparc/lib/ksyms.c b/arch/sparc/lib/ksyms.c
index ee31b88..0c4e35e 100644
--- a/arch/sparc/lib/ksyms.c
+++ b/arch/sparc/lib/ksyms.c
@@ -116,6 +116,7 @@
EXPORT_SYMBOL(atomic64_add_ret);
EXPORT_SYMBOL(atomic64_sub);
EXPORT_SYMBOL(atomic64_sub_ret);
+EXPORT_SYMBOL(atomic64_dec_if_positive);
/* Atomic bit operations. */
EXPORT_SYMBOL(test_and_set_bit);
diff --git a/arch/sparc/math-emu/math_64.c b/arch/sparc/math-emu/math_64.c
index 1704068..034aadb 100644
--- a/arch/sparc/math-emu/math_64.c
+++ b/arch/sparc/math-emu/math_64.c
@@ -320,7 +320,7 @@
XR = 0;
else if (freg < 16)
XR = regs->u_regs[freg];
- else if (test_thread_flag(TIF_32BIT)) {
+ else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) {
struct reg_window32 __user *win32;
flushw_user ();
win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h
index 59c226d..c20d1ce 100644
--- a/arch/x86/include/asm/xen/hypercall.h
+++ b/arch/x86/include/asm/xen/hypercall.h
@@ -359,18 +359,14 @@
return _hypercall4(int, update_va_mapping, va,
new_val.pte, new_val.pte >> 32, flags);
}
+extern int __must_check xen_event_channel_op_compat(int, void *);
static inline int
HYPERVISOR_event_channel_op(int cmd, void *arg)
{
int rc = _hypercall2(int, event_channel_op, cmd, arg);
- if (unlikely(rc == -ENOSYS)) {
- struct evtchn_op op;
- op.cmd = cmd;
- memcpy(&op.u, arg, sizeof(op.u));
- rc = _hypercall1(int, event_channel_op_compat, &op);
- memcpy(arg, &op.u, sizeof(op.u));
- }
+ if (unlikely(rc == -ENOSYS))
+ rc = xen_event_channel_op_compat(cmd, arg);
return rc;
}
@@ -386,17 +382,14 @@
return _hypercall3(int, console_io, cmd, count, str);
}
+extern int __must_check HYPERVISOR_physdev_op_compat(int, void *);
+
static inline int
HYPERVISOR_physdev_op(int cmd, void *arg)
{
int rc = _hypercall2(int, physdev_op, cmd, arg);
- if (unlikely(rc == -ENOSYS)) {
- struct physdev_op op;
- op.cmd = cmd;
- memcpy(&op.u, arg, sizeof(op.u));
- rc = _hypercall1(int, physdev_op_compat, &op);
- memcpy(arg, &op.u, sizeof(op.u));
- }
+ if (unlikely(rc == -ENOSYS))
+ rc = HYPERVISOR_physdev_op_compat(cmd, arg);
return rc;
}
diff --git a/crypto/cryptd.c b/crypto/cryptd.c
index 671d4d6..7bdd61b 100644
--- a/crypto/cryptd.c
+++ b/crypto/cryptd.c
@@ -137,13 +137,18 @@
struct crypto_async_request *req, *backlog;
cpu_queue = container_of(work, struct cryptd_cpu_queue, work);
- /* Only handle one request at a time to avoid hogging crypto
- * workqueue. preempt_disable/enable is used to prevent
- * being preempted by cryptd_enqueue_request() */
+ /*
+ * Only handle one request at a time to avoid hogging crypto workqueue.
+ * preempt_disable/enable is used to prevent being preempted by
+ * cryptd_enqueue_request(). local_bh_disable/enable is used to prevent
+ * cryptd_enqueue_request() being accessed from software interrupts.
+ */
+ local_bh_disable();
preempt_disable();
backlog = crypto_get_backlog(&cpu_queue->queue);
req = crypto_dequeue_request(&cpu_queue->queue);
preempt_enable();
+ local_bh_enable();
if (!req)
return;
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index 8727e9c..72c776f 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -83,9 +83,16 @@
*/
int platform_get_irq(struct platform_device *dev, unsigned int num)
{
+#ifdef CONFIG_SPARC
+ /* sparc does not have irqs represented as IORESOURCE_IRQ resources */
+ if (!dev || num >= dev->archdata.num_irqs)
+ return -ENXIO;
+ return dev->archdata.irqs[num];
+#else
struct resource *r = platform_get_resource(dev, IORESOURCE_IRQ, num);
return r ? r->start : -ENXIO;
+#endif
}
EXPORT_SYMBOL_GPL(platform_get_irq);
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 71a25b9..9c300a8 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -19,6 +19,7 @@
obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o
obj-$(CONFIG_ARCH_U8500) += ux500/
obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
+obj-$(CONFIG_ARCH_SUNXI) += clk-sunxi.o
# Chip specific
obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
diff --git a/drivers/clk/clk-sunxi.c b/drivers/clk/clk-sunxi.c
new file mode 100644
index 0000000..0e831b5
--- /dev/null
+++ b/drivers/clk/clk-sunxi.c
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/sunxi.h>
+#include <linux/of.h>
+
+static const __initconst struct of_device_id clk_match[] = {
+ { .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
+ {}
+};
+
+void __init sunxi_init_clocks(void)
+{
+ of_clk_init(clk_match);
+}
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 6a78073..a098573 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -22,6 +22,9 @@
config ARMADA_370_XP_TIMER
bool
+config SUNXI_TIMER
+ bool
+
config CLKSRC_DBX500_PRCMU
bool "Clocksource PRCMU Timer"
depends on UX500_SOC_DB8500
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 603be36..36f06de 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -14,5 +14,6 @@
obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o
obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o
obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
+obj-$(CONFIG_SUNXI_TIMER) += sunxi_timer.o
obj-$(CONFIG_CLKSRC_ARM_GENERIC) += arm_generic.o
diff --git a/drivers/clocksource/sunxi_timer.c b/drivers/clocksource/sunxi_timer.c
new file mode 100644
index 0000000..3c46434
--- /dev/null
+++ b/drivers/clocksource/sunxi_timer.c
@@ -0,0 +1,170 @@
+/*
+ * Allwinner A1X SoCs timer handling.
+ *
+ * Copyright (C) 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * Based on code from
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
+ * Benn Huang <benn@allwinnertech.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/clk.h>
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/irqreturn.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/sunxi_timer.h>
+#include <linux/clk/sunxi.h>
+
+#define TIMER_CTL_REG 0x00
+#define TIMER_CTL_ENABLE (1 << 0)
+#define TIMER_IRQ_ST_REG 0x04
+#define TIMER0_CTL_REG 0x10
+#define TIMER0_CTL_ENABLE (1 << 0)
+#define TIMER0_CTL_AUTORELOAD (1 << 1)
+#define TIMER0_CTL_ONESHOT (1 << 7)
+#define TIMER0_INTVAL_REG 0x14
+#define TIMER0_CNTVAL_REG 0x18
+
+#define TIMER_SCAL 16
+
+static void __iomem *timer_base;
+
+static void sunxi_clkevt_mode(enum clock_event_mode mode,
+ struct clock_event_device *clk)
+{
+ u32 u = readl(timer_base + TIMER0_CTL_REG);
+
+ switch (mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+ u &= ~(TIMER0_CTL_ONESHOT);
+ writel(u | TIMER0_CTL_ENABLE, timer_base + TIMER0_CTL_REG);
+ break;
+
+ case CLOCK_EVT_MODE_ONESHOT:
+ writel(u | TIMER0_CTL_ONESHOT, timer_base + TIMER0_CTL_REG);
+ break;
+ case CLOCK_EVT_MODE_UNUSED:
+ case CLOCK_EVT_MODE_SHUTDOWN:
+ default:
+ writel(u & ~(TIMER0_CTL_ENABLE), timer_base + TIMER0_CTL_REG);
+ break;
+ }
+}
+
+static int sunxi_clkevt_next_event(unsigned long evt,
+ struct clock_event_device *unused)
+{
+ u32 u = readl(timer_base + TIMER0_CTL_REG);
+ writel(evt, timer_base + TIMER0_CNTVAL_REG);
+ writel(u | TIMER0_CTL_ENABLE | TIMER0_CTL_AUTORELOAD,
+ timer_base + TIMER0_CTL_REG);
+
+ return 0;
+}
+
+static struct clock_event_device sunxi_clockevent = {
+ .name = "sunxi_tick",
+ .shift = 32,
+ .rating = 300,
+ .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+ .set_mode = sunxi_clkevt_mode,
+ .set_next_event = sunxi_clkevt_next_event,
+};
+
+
+static irqreturn_t sunxi_timer_interrupt(int irq, void *dev_id)
+{
+ struct clock_event_device *evt = (struct clock_event_device *)dev_id;
+
+ writel(0x1, timer_base + TIMER_IRQ_ST_REG);
+ evt->event_handler(evt);
+
+ return IRQ_HANDLED;
+}
+
+static struct irqaction sunxi_timer_irq = {
+ .name = "sunxi_timer0",
+ .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
+ .handler = sunxi_timer_interrupt,
+ .dev_id = &sunxi_clockevent,
+};
+
+static struct of_device_id sunxi_timer_dt_ids[] = {
+ { .compatible = "allwinner,sunxi-timer" },
+};
+
+static void __init sunxi_timer_init(void)
+{
+ struct device_node *node;
+ unsigned long rate = 0;
+ struct clk *clk;
+ int ret, irq;
+ u32 val;
+
+ node = of_find_matching_node(NULL, sunxi_timer_dt_ids);
+ if (!node)
+ panic("No sunxi timer node");
+
+ timer_base = of_iomap(node, 0);
+ if (!timer_base)
+ panic("Can't map registers");
+
+ irq = irq_of_parse_and_map(node, 0);
+ if (irq <= 0)
+ panic("Can't parse IRQ");
+
+ sunxi_init_clocks();
+
+ clk = of_clk_get(node, 0);
+ if (IS_ERR(clk))
+ panic("Can't get timer clock");
+
+ rate = clk_get_rate(clk);
+
+ writel(rate / (TIMER_SCAL * HZ),
+ timer_base + TIMER0_INTVAL_REG);
+
+ /* set clock source to HOSC, 16 pre-division */
+ val = readl(timer_base + TIMER0_CTL_REG);
+ val &= ~(0x07 << 4);
+ val &= ~(0x03 << 2);
+ val |= (4 << 4) | (1 << 2);
+ writel(val, timer_base + TIMER0_CTL_REG);
+
+ /* set mode to auto reload */
+ val = readl(timer_base + TIMER0_CTL_REG);
+ writel(val | TIMER0_CTL_AUTORELOAD, timer_base + TIMER0_CTL_REG);
+
+ ret = setup_irq(irq, &sunxi_timer_irq);
+ if (ret)
+ pr_warn("failed to setup irq %d\n", irq);
+
+ /* Enable timer0 interrupt */
+ val = readl(timer_base + TIMER_CTL_REG);
+ writel(val | TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG);
+
+ sunxi_clockevent.mult = div_sc(rate / TIMER_SCAL,
+ NSEC_PER_SEC,
+ sunxi_clockevent.shift);
+ sunxi_clockevent.max_delta_ns = clockevent_delta2ns(0xff,
+ &sunxi_clockevent);
+ sunxi_clockevent.min_delta_ns = clockevent_delta2ns(0x1,
+ &sunxi_clockevent);
+ sunxi_clockevent.cpumask = cpumask_of(0);
+
+ clockevents_register_device(&sunxi_clockevent);
+}
+
+struct sys_timer sunxi_timer = {
+ .init = sunxi_timer_init,
+};
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index 7d9554c..dbf0e6f 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c
@@ -29,7 +29,6 @@
#include <asm/irq.h>
#include <linux/platform_data/dma-imx.h>
-#include <mach/hardware.h>
#include "dmaengine.h"
#define IMXDMA_MAX_CHAN_DESCRIPTORS 16
@@ -167,6 +166,12 @@
int slot_2d;
};
+enum imx_dma_type {
+ IMX1_DMA,
+ IMX21_DMA,
+ IMX27_DMA,
+};
+
struct imxdma_engine {
struct device *dev;
struct device_dma_parameters dma_parms;
@@ -177,8 +182,40 @@
spinlock_t lock;
struct imx_dma_2d_config slots_2d[IMX_DMA_2D_SLOTS];
struct imxdma_channel channel[IMX_DMA_CHANNELS];
+ enum imx_dma_type devtype;
};
+static struct platform_device_id imx_dma_devtype[] = {
+ {
+ .name = "imx1-dma",
+ .driver_data = IMX1_DMA,
+ }, {
+ .name = "imx21-dma",
+ .driver_data = IMX21_DMA,
+ }, {
+ .name = "imx27-dma",
+ .driver_data = IMX27_DMA,
+ }, {
+ /* sentinel */
+ }
+};
+MODULE_DEVICE_TABLE(platform, imx_dma_devtype);
+
+static inline int is_imx1_dma(struct imxdma_engine *imxdma)
+{
+ return imxdma->devtype == IMX1_DMA;
+}
+
+static inline int is_imx21_dma(struct imxdma_engine *imxdma)
+{
+ return imxdma->devtype == IMX21_DMA;
+}
+
+static inline int is_imx27_dma(struct imxdma_engine *imxdma)
+{
+ return imxdma->devtype == IMX27_DMA;
+}
+
static struct imxdma_channel *to_imxdma_chan(struct dma_chan *chan)
{
return container_of(chan, struct imxdma_channel, chan);
@@ -212,7 +249,9 @@
static int imxdma_hw_chain(struct imxdma_channel *imxdmac)
{
- if (cpu_is_mx27())
+ struct imxdma_engine *imxdma = imxdmac->imxdma;
+
+ if (is_imx27_dma(imxdma))
return imxdmac->hw_chaining;
else
return 0;
@@ -267,7 +306,7 @@
imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_CCR(channel)) |
CCR_CEN | CCR_ACRPT, DMA_CCR(channel));
- if ((cpu_is_mx21() || cpu_is_mx27()) &&
+ if (!is_imx1_dma(imxdma) &&
d->sg && imxdma_hw_chain(imxdmac)) {
d->sg = sg_next(d->sg);
if (d->sg) {
@@ -436,7 +475,7 @@
struct imxdma_engine *imxdma = dev_id;
int i, disr;
- if (cpu_is_mx21() || cpu_is_mx27())
+ if (!is_imx1_dma(imxdma))
imxdma_err_handler(irq, dev_id);
disr = imx_dmav1_readl(imxdma, DMA_DISR);
@@ -961,35 +1000,32 @@
static int __init imxdma_probe(struct platform_device *pdev)
{
struct imxdma_engine *imxdma;
+ struct resource *res;
int ret, i;
+ int irq, irq_err;
-
- imxdma = kzalloc(sizeof(*imxdma), GFP_KERNEL);
+ imxdma = devm_kzalloc(&pdev->dev, sizeof(*imxdma), GFP_KERNEL);
if (!imxdma)
return -ENOMEM;
- if (cpu_is_mx1()) {
- imxdma->base = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR);
- } else if (cpu_is_mx21()) {
- imxdma->base = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR);
- } else if (cpu_is_mx27()) {
- imxdma->base = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR);
- } else {
- kfree(imxdma);
- return 0;
- }
+ imxdma->devtype = pdev->id_entry->driver_data;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ imxdma->base = devm_request_and_ioremap(&pdev->dev, res);
+ if (!imxdma->base)
+ return -EADDRNOTAVAIL;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
imxdma->dma_ipg = devm_clk_get(&pdev->dev, "ipg");
- if (IS_ERR(imxdma->dma_ipg)) {
- ret = PTR_ERR(imxdma->dma_ipg);
- goto err_clk;
- }
+ if (IS_ERR(imxdma->dma_ipg))
+ return PTR_ERR(imxdma->dma_ipg);
imxdma->dma_ahb = devm_clk_get(&pdev->dev, "ahb");
- if (IS_ERR(imxdma->dma_ahb)) {
- ret = PTR_ERR(imxdma->dma_ahb);
- goto err_clk;
- }
+ if (IS_ERR(imxdma->dma_ahb))
+ return PTR_ERR(imxdma->dma_ahb);
clk_prepare_enable(imxdma->dma_ipg);
clk_prepare_enable(imxdma->dma_ahb);
@@ -997,18 +1033,25 @@
/* reset DMA module */
imx_dmav1_writel(imxdma, DCR_DRST, DMA_DCR);
- if (cpu_is_mx1()) {
- ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", imxdma);
+ if (is_imx1_dma(imxdma)) {
+ ret = devm_request_irq(&pdev->dev, irq,
+ dma_irq_handler, 0, "DMA", imxdma);
if (ret) {
dev_warn(imxdma->dev, "Can't register IRQ for DMA\n");
- goto err_enable;
+ goto err;
}
- ret = request_irq(MX1_DMA_ERR, imxdma_err_handler, 0, "DMA", imxdma);
+ irq_err = platform_get_irq(pdev, 1);
+ if (irq_err < 0) {
+ ret = irq_err;
+ goto err;
+ }
+
+ ret = devm_request_irq(&pdev->dev, irq_err,
+ imxdma_err_handler, 0, "DMA", imxdma);
if (ret) {
dev_warn(imxdma->dev, "Can't register ERRIRQ for DMA\n");
- free_irq(MX1_DMA_INT, NULL);
- goto err_enable;
+ goto err;
}
}
@@ -1038,14 +1081,14 @@
for (i = 0; i < IMX_DMA_CHANNELS; i++) {
struct imxdma_channel *imxdmac = &imxdma->channel[i];
- if (cpu_is_mx21() || cpu_is_mx27()) {
- ret = request_irq(MX2x_INT_DMACH0 + i,
+ if (!is_imx1_dma(imxdma)) {
+ ret = devm_request_irq(&pdev->dev, irq + i,
dma_irq_handler, 0, "DMA", imxdma);
if (ret) {
dev_warn(imxdma->dev, "Can't register IRQ %d "
"for DMA channel %d\n",
- MX2x_INT_DMACH0 + i, i);
- goto err_init;
+ irq + i, i);
+ goto err;
}
init_timer(&imxdmac->watchdog);
imxdmac->watchdog.function = &imxdma_watchdog;
@@ -1091,46 +1134,25 @@
ret = dma_async_device_register(&imxdma->dma_device);
if (ret) {
dev_err(&pdev->dev, "unable to register\n");
- goto err_init;
+ goto err;
}
return 0;
-err_init:
-
- if (cpu_is_mx21() || cpu_is_mx27()) {
- while (--i >= 0)
- free_irq(MX2x_INT_DMACH0 + i, NULL);
- } else if cpu_is_mx1() {
- free_irq(MX1_DMA_INT, NULL);
- free_irq(MX1_DMA_ERR, NULL);
- }
-err_enable:
+err:
clk_disable_unprepare(imxdma->dma_ipg);
clk_disable_unprepare(imxdma->dma_ahb);
-err_clk:
- kfree(imxdma);
return ret;
}
static int __exit imxdma_remove(struct platform_device *pdev)
{
struct imxdma_engine *imxdma = platform_get_drvdata(pdev);
- int i;
dma_async_device_unregister(&imxdma->dma_device);
- if (cpu_is_mx21() || cpu_is_mx27()) {
- for (i = 0; i < IMX_DMA_CHANNELS; i++)
- free_irq(MX2x_INT_DMACH0 + i, NULL);
- } else if cpu_is_mx1() {
- free_irq(MX1_DMA_INT, NULL);
- free_irq(MX1_DMA_ERR, NULL);
- }
-
clk_disable_unprepare(imxdma->dma_ipg);
clk_disable_unprepare(imxdma->dma_ahb);
- kfree(imxdma);
return 0;
}
@@ -1139,6 +1161,7 @@
.driver = {
.name = "imx-dma",
},
+ .id_table = imx_dma_devtype,
.remove = __exit_p(imxdma_remove),
};
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index c099ca0..f082aa3 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -40,7 +40,6 @@
#include <asm/irq.h>
#include <linux/platform_data/dma-imx-sdma.h>
#include <linux/platform_data/dma-imx.h>
-#include <mach/hardware.h>
#include "dmaengine.h"
diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c
index c7573e5..6585537 100644
--- a/drivers/dma/ipu/ipu_idmac.c
+++ b/drivers/dma/ipu/ipu_idmac.c
@@ -22,8 +22,7 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
-
-#include <mach/ipu.h>
+#include <linux/dma/ipu-dma.h>
#include "../dmaengine.h"
#include "ipu_intern.h"
diff --git a/drivers/dma/ipu/ipu_irq.c b/drivers/dma/ipu/ipu_irq.c
index fa95bcc..a5ee37d 100644
--- a/drivers/dma/ipu/ipu_irq.c
+++ b/drivers/dma/ipu/ipu_irq.c
@@ -15,8 +15,7 @@
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/module.h>
-
-#include <mach/ipu.h>
+#include <linux/dma/ipu-dma.h>
#include "ipu_intern.h"
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index d055cee..f11d8e3 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -47,7 +47,7 @@
config OF_GPIO
def_bool y
- depends on OF && !SPARC
+ depends on OF
config DEBUG_GPIO
bool "Debug GPIO calls"
diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
index 7ef1b67..133b413 100644
--- a/drivers/gpu/drm/drm_fops.c
+++ b/drivers/gpu/drm/drm_fops.c
@@ -121,6 +121,8 @@
int minor_id = iminor(inode);
struct drm_minor *minor;
int retcode = 0;
+ int need_setup = 0;
+ struct address_space *old_mapping;
minor = idr_find(&drm_minors_idr, minor_id);
if (!minor)
@@ -132,23 +134,37 @@
if (drm_device_is_unplugged(dev))
return -ENODEV;
- retcode = drm_open_helper(inode, filp, dev);
- if (!retcode) {
- atomic_inc(&dev->counts[_DRM_STAT_OPENS]);
- if (!dev->open_count++)
- retcode = drm_setup(dev);
- }
- if (!retcode) {
- mutex_lock(&dev->struct_mutex);
- if (dev->dev_mapping == NULL)
- dev->dev_mapping = &inode->i_data;
- /* ihold ensures nobody can remove inode with our i_data */
- ihold(container_of(dev->dev_mapping, struct inode, i_data));
- inode->i_mapping = dev->dev_mapping;
- filp->f_mapping = dev->dev_mapping;
- mutex_unlock(&dev->struct_mutex);
- }
+ if (!dev->open_count++)
+ need_setup = 1;
+ mutex_lock(&dev->struct_mutex);
+ old_mapping = dev->dev_mapping;
+ if (old_mapping == NULL)
+ dev->dev_mapping = &inode->i_data;
+ /* ihold ensures nobody can remove inode with our i_data */
+ ihold(container_of(dev->dev_mapping, struct inode, i_data));
+ inode->i_mapping = dev->dev_mapping;
+ filp->f_mapping = dev->dev_mapping;
+ mutex_unlock(&dev->struct_mutex);
+ retcode = drm_open_helper(inode, filp, dev);
+ if (retcode)
+ goto err_undo;
+ atomic_inc(&dev->counts[_DRM_STAT_OPENS]);
+ if (need_setup) {
+ retcode = drm_setup(dev);
+ if (retcode)
+ goto err_undo;
+ }
+ return 0;
+
+err_undo:
+ mutex_lock(&dev->struct_mutex);
+ filp->f_mapping = old_mapping;
+ inode->i_mapping = old_mapping;
+ iput(container_of(dev->dev_mapping, struct inode, i_data));
+ dev->dev_mapping = old_mapping;
+ mutex_unlock(&dev->struct_mutex);
+ dev->open_count--;
return retcode;
}
EXPORT_SYMBOL(drm_open);
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
index 16a9afb..05a909a 100644
--- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
@@ -22,6 +22,8 @@
* Authors: Ben Skeggs
*/
+#include <subdev/bar.h>
+
#include <engine/software.h>
#include <engine/disp.h>
@@ -37,6 +39,7 @@
static void
nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc)
{
+ struct nouveau_bar *bar = nouveau_bar(priv);
struct nouveau_disp *disp = &priv->base;
struct nouveau_software_chan *chan, *temp;
unsigned long flags;
@@ -46,18 +49,19 @@
if (chan->vblank.crtc != crtc)
continue;
- nv_wr32(priv, 0x001704, chan->vblank.channel);
- nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma);
-
if (nv_device(priv)->chipset == 0x50) {
+ nv_wr32(priv, 0x001704, chan->vblank.channel);
+ nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma);
+ bar->flush(bar);
nv_wr32(priv, 0x001570, chan->vblank.offset);
nv_wr32(priv, 0x001574, chan->vblank.value);
} else {
- if (nv_device(priv)->chipset >= 0xc0) {
- nv_wr32(priv, 0x06000c,
- upper_32_bits(chan->vblank.offset));
- }
- nv_wr32(priv, 0x060010, chan->vblank.offset);
+ nv_wr32(priv, 0x001718, 0x80000000 | chan->vblank.channel);
+ bar->flush(bar);
+ nv_wr32(priv, 0x06000c,
+ upper_32_bits(chan->vblank.offset));
+ nv_wr32(priv, 0x060010,
+ lower_32_bits(chan->vblank.offset));
nv_wr32(priv, 0x060014, chan->vblank.value);
}
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c
index 8d00210..4250012 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c
@@ -156,8 +156,8 @@
static int
nv40_graph_context_fini(struct nouveau_object *object, bool suspend)
{
- struct nv04_graph_priv *priv = (void *)object->engine;
- struct nv04_graph_chan *chan = (void *)object;
+ struct nv40_graph_priv *priv = (void *)object->engine;
+ struct nv40_graph_chan *chan = (void *)object;
u32 inst = 0x01000000 | nv_gpuobj(chan)->addr >> 4;
int ret = 0;
diff --git a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c
index 1241857..f7c581a 100644
--- a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c
+++ b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c
@@ -38,7 +38,7 @@
};
struct nv40_mpeg_chan {
- struct nouveau_mpeg base;
+ struct nouveau_mpeg_chan base;
};
/*******************************************************************************
diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c
index 49050d9..9474cfc 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c
@@ -67,7 +67,7 @@
static void
nv41_vm_flush(struct nouveau_vm *vm)
{
- struct nv04_vm_priv *priv = (void *)vm->vmm;
+ struct nv04_vmmgr_priv *priv = (void *)vm->vmm;
mutex_lock(&nv_subdev(priv)->mutex);
nv_wr32(priv, 0x100810, 0x00000022);
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 9a6e2cb..d3595b2 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -355,7 +355,7 @@
* valid - it's not (rh#613284)
*/
if (nv_encoder->dcb->lvdsconf.use_acpi_for_edid) {
- if (!(nv_connector->edid = nouveau_acpi_edid(dev, connector))) {
+ if ((nv_connector->edid = nouveau_acpi_edid(dev, connector))) {
status = connector_status_connected;
goto out;
}
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 2e566e12..3bce029 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1696,35 +1696,43 @@
return ATOM_PPLL2;
DRM_ERROR("unable to allocate a PPLL\n");
return ATOM_PPLL_INVALID;
- } else {
- if (ASIC_IS_AVIVO(rdev)) {
- /* in DP mode, the DP ref clock can come from either PPLL
- * depending on the asic:
- * DCE3: PPLL1 or PPLL2
- */
- if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) {
- /* use the same PPLL for all DP monitors */
- pll = radeon_get_shared_dp_ppll(crtc);
- if (pll != ATOM_PPLL_INVALID)
- return pll;
- } else {
- /* use the same PPLL for all monitors with the same clock */
- pll = radeon_get_shared_nondp_ppll(crtc);
- if (pll != ATOM_PPLL_INVALID)
- return pll;
- }
- /* all other cases */
- pll_in_use = radeon_get_pll_use_mask(crtc);
+ } else if (ASIC_IS_AVIVO(rdev)) {
+ /* in DP mode, the DP ref clock can come from either PPLL
+ * depending on the asic:
+ * DCE3: PPLL1 or PPLL2
+ */
+ if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) {
+ /* use the same PPLL for all DP monitors */
+ pll = radeon_get_shared_dp_ppll(crtc);
+ if (pll != ATOM_PPLL_INVALID)
+ return pll;
+ } else {
+ /* use the same PPLL for all monitors with the same clock */
+ pll = radeon_get_shared_nondp_ppll(crtc);
+ if (pll != ATOM_PPLL_INVALID)
+ return pll;
+ }
+ /* all other cases */
+ pll_in_use = radeon_get_pll_use_mask(crtc);
+ /* the order shouldn't matter here, but we probably
+ * need this until we have atomic modeset
+ */
+ if (rdev->flags & RADEON_IS_IGP) {
if (!(pll_in_use & (1 << ATOM_PPLL1)))
return ATOM_PPLL1;
if (!(pll_in_use & (1 << ATOM_PPLL2)))
return ATOM_PPLL2;
- DRM_ERROR("unable to allocate a PPLL\n");
- return ATOM_PPLL_INVALID;
} else {
- /* on pre-R5xx asics, the crtc to pll mapping is hardcoded */
- return radeon_crtc->crtc_id;
+ if (!(pll_in_use & (1 << ATOM_PPLL2)))
+ return ATOM_PPLL2;
+ if (!(pll_in_use & (1 << ATOM_PPLL1)))
+ return ATOM_PPLL1;
}
+ DRM_ERROR("unable to allocate a PPLL\n");
+ return ATOM_PPLL_INVALID;
+ } else {
+ /* on pre-R5xx asics, the crtc to pll mapping is hardcoded */
+ return radeon_crtc->crtc_id;
}
}
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 14313ad..af31f82 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1372,7 +1372,7 @@
WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN);
for (i = 0; i < rdev->num_crtc; i++) {
- if (save->crtc_enabled) {
+ if (save->crtc_enabled[i]) {
if (ASIC_IS_DCE6(rdev)) {
tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]);
tmp |= EVERGREEN_CRTC_BLANK_DATA_EN;
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c
index 95e6318..c042e49 100644
--- a/drivers/gpu/drm/radeon/evergreen_cs.c
+++ b/drivers/gpu/drm/radeon/evergreen_cs.c
@@ -2725,6 +2725,9 @@
/* check config regs */
switch (reg) {
case GRBM_GFX_INDEX:
+ case CP_STRMOUT_CNTL:
+ case CP_COHER_CNTL:
+ case CP_COHER_SIZE:
case VGT_VTX_VECT_EJECT_REG:
case VGT_CACHE_INVALIDATION:
case VGT_GS_VERTEX_REUSE:
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index df542f1..2bc0f6a 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -91,6 +91,10 @@
#define FB_READ_EN (1 << 0)
#define FB_WRITE_EN (1 << 1)
+#define CP_STRMOUT_CNTL 0x84FC
+
+#define CP_COHER_CNTL 0x85F0
+#define CP_COHER_SIZE 0x85F4
#define CP_COHER_BASE 0x85F8
#define CP_STALLED_STAT1 0x8674
#define CP_STALLED_STAT2 0x8678
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index b0db712..4422d63 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -2474,6 +2474,7 @@
/* check config regs */
switch (reg) {
case GRBM_GFX_INDEX:
+ case CP_STRMOUT_CNTL:
case VGT_VTX_VECT_EJECT_REG:
case VGT_CACHE_INVALIDATION:
case VGT_ESGS_RING_SIZE:
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
index 7d2a20e..a8871af 100644
--- a/drivers/gpu/drm/radeon/sid.h
+++ b/drivers/gpu/drm/radeon/sid.h
@@ -424,6 +424,7 @@
# define RDERR_INT_ENABLE (1 << 0)
# define GUI_IDLE_INT_ENABLE (1 << 19)
+#define CP_STRMOUT_CNTL 0x84FC
#define SCRATCH_REG0 0x8500
#define SCRATCH_REG1 0x8504
#define SCRATCH_REG2 0x8508
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c
index 3ce68a2..d1498bf 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c
@@ -306,7 +306,7 @@
BUG_ON(!atomic_read(&bo->reserved));
BUG_ON(old_mem_type != TTM_PL_VRAM &&
- old_mem_type != VMW_PL_FLAG_GMR);
+ old_mem_type != VMW_PL_GMR);
pl_flags = TTM_PL_FLAG_VRAM | VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED;
if (pin)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index ed3c1e7..2dd185e 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -1098,6 +1098,11 @@
struct drm_device *dev = pci_get_drvdata(pdev);
struct vmw_private *dev_priv = vmw_priv(dev);
+ mutex_lock(&dev_priv->hw_mutex);
+ vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
+ (void) vmw_read(dev_priv, SVGA_REG_ID);
+ mutex_unlock(&dev_priv->hw_mutex);
+
/**
* Reclaim 3d reference held by fbdev and potentially
* start fifo.
diff --git a/drivers/hid/hidraw.c b/drivers/hid/hidraw.c
index 17d15bb..7c47fc3 100644
--- a/drivers/hid/hidraw.c
+++ b/drivers/hid/hidraw.c
@@ -42,7 +42,6 @@
static struct class *hidraw_class;
static struct hidraw *hidraw_table[HIDRAW_MAX_DEVICES];
static DEFINE_MUTEX(minors_lock);
-static void drop_ref(struct hidraw *hid, int exists_bit);
static ssize_t hidraw_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
{
@@ -114,7 +113,7 @@
__u8 *buf;
int ret = 0;
- if (!hidraw_table[minor] || !hidraw_table[minor]->exist) {
+ if (!hidraw_table[minor]) {
ret = -ENODEV;
goto out;
}
@@ -262,7 +261,7 @@
}
mutex_lock(&minors_lock);
- if (!hidraw_table[minor] || !hidraw_table[minor]->exist) {
+ if (!hidraw_table[minor]) {
err = -ENODEV;
goto out_unlock;
}
@@ -299,12 +298,36 @@
static int hidraw_release(struct inode * inode, struct file * file)
{
unsigned int minor = iminor(inode);
+ struct hidraw *dev;
struct hidraw_list *list = file->private_data;
+ int ret;
+ int i;
- drop_ref(hidraw_table[minor], 0);
+ mutex_lock(&minors_lock);
+ if (!hidraw_table[minor]) {
+ ret = -ENODEV;
+ goto unlock;
+ }
+
list_del(&list->node);
+ dev = hidraw_table[minor];
+ if (!--dev->open) {
+ if (list->hidraw->exist) {
+ hid_hw_power(dev->hid, PM_HINT_NORMAL);
+ hid_hw_close(dev->hid);
+ } else {
+ kfree(list->hidraw);
+ }
+ }
+
+ for (i = 0; i < HIDRAW_BUFFER_SIZE; ++i)
+ kfree(list->buffer[i].value);
kfree(list);
- return 0;
+ ret = 0;
+unlock:
+ mutex_unlock(&minors_lock);
+
+ return ret;
}
static long hidraw_ioctl(struct file *file, unsigned int cmd,
@@ -506,7 +529,21 @@
void hidraw_disconnect(struct hid_device *hid)
{
struct hidraw *hidraw = hid->hidraw;
- drop_ref(hidraw, 1);
+
+ mutex_lock(&minors_lock);
+ hidraw->exist = 0;
+
+ device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor));
+
+ hidraw_table[hidraw->minor] = NULL;
+
+ if (hidraw->open) {
+ hid_hw_close(hid);
+ wake_up_interruptible(&hidraw->wait);
+ } else {
+ kfree(hidraw);
+ }
+ mutex_unlock(&minors_lock);
}
EXPORT_SYMBOL_GPL(hidraw_disconnect);
@@ -555,23 +592,3 @@
unregister_chrdev_region(dev_id, HIDRAW_MAX_DEVICES);
}
-
-static void drop_ref(struct hidraw *hidraw, int exists_bit)
-{
- mutex_lock(&minors_lock);
- if (exists_bit) {
- hid_hw_close(hidraw->hid);
- hidraw->exist = 0;
- if (hidraw->open)
- wake_up_interruptible(&hidraw->wait);
- } else {
- --hidraw->open;
- }
-
- if (!hidraw->open && !hidraw->exist) {
- device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor));
- hidraw_table[hidraw->minor] = NULL;
- kfree(hidraw);
- }
- mutex_unlock(&minors_lock);
-}
diff --git a/drivers/hwmon/asb100.c b/drivers/hwmon/asb100.c
index a227be4..520e5bf 100644
--- a/drivers/hwmon/asb100.c
+++ b/drivers/hwmon/asb100.c
@@ -32,7 +32,7 @@
* ASB100-A supports pwm1, while plain ASB100 does not. There is no known
* way for the driver to tell which one is there.
*
- * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
+ * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
* asb100 7 3 1 4 0x31 0x0694 yes no
*/
diff --git a/drivers/hwmon/w83627ehf.c b/drivers/hwmon/w83627ehf.c
index 1821b74..de3c7e0 100644
--- a/drivers/hwmon/w83627ehf.c
+++ b/drivers/hwmon/w83627ehf.c
@@ -2083,6 +2083,7 @@
mutex_init(&data->lock);
mutex_init(&data->update_lock);
data->name = w83627ehf_device_names[sio_data->kind];
+ data->bank = 0xff; /* Force initial bank selection */
platform_set_drvdata(pdev, data);
/* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
diff --git a/drivers/hwmon/w83627hf.c b/drivers/hwmon/w83627hf.c
index 5b1a6a6..af15899 100644
--- a/drivers/hwmon/w83627hf.c
+++ b/drivers/hwmon/w83627hf.c
@@ -25,7 +25,7 @@
/*
* Supports following chips:
*
- * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
+ * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
* w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
* w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
* w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
diff --git a/drivers/hwmon/w83781d.c b/drivers/hwmon/w83781d.c
index 5a5046d..20f11d3 100644
--- a/drivers/hwmon/w83781d.c
+++ b/drivers/hwmon/w83781d.c
@@ -24,7 +24,7 @@
/*
* Supports following chips:
*
- * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
+ * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
* as99127f 7 3 0 3 0x31 0x12c3 yes no
* as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
* w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
diff --git a/drivers/hwmon/w83791d.c b/drivers/hwmon/w83791d.c
index 39ab7bc..ed397c6 100644
--- a/drivers/hwmon/w83791d.c
+++ b/drivers/hwmon/w83791d.c
@@ -22,7 +22,7 @@
/*
* Supports following chips:
*
- * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
+ * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
* w83791d 10 5 5 3 0x71 0x5ca3 yes no
*
* The w83791d chip appears to be part way between the 83781d and the
diff --git a/drivers/hwmon/w83792d.c b/drivers/hwmon/w83792d.c
index 0536452..301942d 100644
--- a/drivers/hwmon/w83792d.c
+++ b/drivers/hwmon/w83792d.c
@@ -31,7 +31,7 @@
/*
* Supports following chips:
*
- * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
+ * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
* w83792d 9 7 7 3 0x7a 0x5ca3 yes no
*/
diff --git a/drivers/hwmon/w83l786ng.c b/drivers/hwmon/w83l786ng.c
index f0e8286..79710bc 100644
--- a/drivers/hwmon/w83l786ng.c
+++ b/drivers/hwmon/w83l786ng.c
@@ -20,7 +20,7 @@
/*
* Supports following chips:
*
- * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
+ * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
* w83l786ng 3 2 2 2 0x7b 0x5ca3 yes no
*/
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 2ef162d..b973474 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -52,8 +52,6 @@
#include <linux/of_device.h>
#include <linux/of_i2c.h>
#include <linux/pinctrl/consumer.h>
-
-#include <mach/hardware.h>
#include <linux/platform_data/i2c-imx.h>
/** Defines ********************************************************************
@@ -115,6 +113,11 @@
{ 3072, 0x1E }, { 3840, 0x1F }
};
+enum imx_i2c_type {
+ IMX1_I2C,
+ IMX21_I2C,
+};
+
struct imx_i2c_struct {
struct i2c_adapter adapter;
struct clk *clk;
@@ -124,13 +127,33 @@
unsigned int disable_delay;
int stopped;
unsigned int ifdr; /* IMX_I2C_IFDR */
+ enum imx_i2c_type devtype;
};
+static struct platform_device_id imx_i2c_devtype[] = {
+ {
+ .name = "imx1-i2c",
+ .driver_data = IMX1_I2C,
+ }, {
+ .name = "imx21-i2c",
+ .driver_data = IMX21_I2C,
+ }, {
+ /* sentinel */
+ }
+};
+MODULE_DEVICE_TABLE(platform, imx_i2c_devtype);
+
static const struct of_device_id i2c_imx_dt_ids[] = {
- { .compatible = "fsl,imx1-i2c", },
+ { .compatible = "fsl,imx1-i2c", .data = &imx_i2c_devtype[IMX1_I2C], },
+ { .compatible = "fsl,imx21-i2c", .data = &imx_i2c_devtype[IMX21_I2C], },
{ /* sentinel */ }
};
+static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx)
+{
+ return i2c_imx->devtype == IMX1_I2C;
+}
+
/** Functions for IMX I2C adapter driver ***************************************
*******************************************************************************/
@@ -223,7 +246,7 @@
temp &= ~(I2CR_MSTA | I2CR_MTX);
writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
}
- if (cpu_is_mx1()) {
+ if (is_imx1_i2c(i2c_imx)) {
/*
* This delay caused by an i.MXL hardware bug.
* If no (or too short) delay, no "STOP" bit will be generated.
@@ -465,6 +488,8 @@
static int __init i2c_imx_probe(struct platform_device *pdev)
{
+ const struct of_device_id *of_id = of_match_device(i2c_imx_dt_ids,
+ &pdev->dev);
struct imx_i2c_struct *i2c_imx;
struct resource *res;
struct imxi2c_platform_data *pdata = pdev->dev.platform_data;
@@ -497,6 +522,10 @@
return -ENOMEM;
}
+ if (of_id)
+ pdev->id_entry = of_id->data;
+ i2c_imx->devtype = pdev->id_entry->driver_data;
+
/* Setup i2c_imx driver structure */
strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name));
i2c_imx->adapter.owner = THIS_MODULE;
@@ -593,7 +622,8 @@
.name = DRIVER_NAME,
.owner = THIS_MODULE,
.of_match_table = i2c_imx_dt_ids,
- }
+ },
+ .id_table = imx_i2c_devtype,
};
static int __init i2c_adap_imx_init(void)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 1bb8bf6..62ca575 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -1 +1,8 @@
-# empty
+config VERSATILE_FPGA_IRQ
+ bool
+ select IRQ_DOMAIN
+
+config VERSATILE_FPGA_IRQ_NR
+ int
+ default 4
+ depends on VERSATILE_FPGA_IRQ
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 054321d..02bd37a 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -1 +1,3 @@
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
+obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi.o
+obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
diff --git a/drivers/irqchip/irq-sunxi.c b/drivers/irqchip/irq-sunxi.c
new file mode 100644
index 0000000..eef41a49
--- /dev/null
+++ b/drivers/irqchip/irq-sunxi.c
@@ -0,0 +1,150 @@
+/*
+ * Allwinner A1X SoCs IRQ chip driver.
+ *
+ * Copyright (C) 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * Based on code from
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
+ * Benn Huang <benn@allwinnertech.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
+#include <linux/irqchip/sunxi.h>
+
+#define SUNXI_IRQ_VECTOR_REG 0x00
+#define SUNXI_IRQ_PROTECTION_REG 0x08
+#define SUNXI_IRQ_NMI_CTRL_REG 0x0c
+#define SUNXI_IRQ_PENDING_REG(x) (0x10 + 0x4 * x)
+#define SUNXI_IRQ_FIQ_PENDING_REG(x) (0x20 + 0x4 * x)
+#define SUNXI_IRQ_ENABLE_REG(x) (0x40 + 0x4 * x)
+#define SUNXI_IRQ_MASK_REG(x) (0x50 + 0x4 * x)
+
+static void __iomem *sunxi_irq_base;
+static struct irq_domain *sunxi_irq_domain;
+
+void sunxi_irq_ack(struct irq_data *irqd)
+{
+ unsigned int irq = irqd_to_hwirq(irqd);
+ unsigned int irq_off = irq % 32;
+ int reg = irq / 32;
+ u32 val;
+
+ val = readl(sunxi_irq_base + SUNXI_IRQ_PENDING_REG(reg));
+ writel(val | (1 << irq_off),
+ sunxi_irq_base + SUNXI_IRQ_PENDING_REG(reg));
+}
+
+static void sunxi_irq_mask(struct irq_data *irqd)
+{
+ unsigned int irq = irqd_to_hwirq(irqd);
+ unsigned int irq_off = irq % 32;
+ int reg = irq / 32;
+ u32 val;
+
+ val = readl(sunxi_irq_base + SUNXI_IRQ_ENABLE_REG(reg));
+ writel(val & ~(1 << irq_off),
+ sunxi_irq_base + SUNXI_IRQ_ENABLE_REG(reg));
+}
+
+static void sunxi_irq_unmask(struct irq_data *irqd)
+{
+ unsigned int irq = irqd_to_hwirq(irqd);
+ unsigned int irq_off = irq % 32;
+ int reg = irq / 32;
+ u32 val;
+
+ val = readl(sunxi_irq_base + SUNXI_IRQ_ENABLE_REG(reg));
+ writel(val | (1 << irq_off),
+ sunxi_irq_base + SUNXI_IRQ_ENABLE_REG(reg));
+}
+
+static struct irq_chip sunxi_irq_chip = {
+ .name = "sunxi_irq",
+ .irq_ack = sunxi_irq_ack,
+ .irq_mask = sunxi_irq_mask,
+ .irq_unmask = sunxi_irq_unmask,
+};
+
+static int sunxi_irq_map(struct irq_domain *d, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ irq_set_chip_and_handler(virq, &sunxi_irq_chip,
+ handle_level_irq);
+ set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
+
+ return 0;
+}
+
+static struct irq_domain_ops sunxi_irq_ops = {
+ .map = sunxi_irq_map,
+ .xlate = irq_domain_xlate_onecell,
+};
+
+static int __init sunxi_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ sunxi_irq_base = of_iomap(node, 0);
+ if (!sunxi_irq_base)
+ panic("%s: unable to map IC registers\n",
+ node->full_name);
+
+ /* Disable all interrupts */
+ writel(0, sunxi_irq_base + SUNXI_IRQ_ENABLE_REG(0));
+ writel(0, sunxi_irq_base + SUNXI_IRQ_ENABLE_REG(1));
+ writel(0, sunxi_irq_base + SUNXI_IRQ_ENABLE_REG(2));
+
+ /* Mask all the interrupts */
+ writel(0, sunxi_irq_base + SUNXI_IRQ_MASK_REG(0));
+ writel(0, sunxi_irq_base + SUNXI_IRQ_MASK_REG(1));
+ writel(0, sunxi_irq_base + SUNXI_IRQ_MASK_REG(2));
+
+ /* Clear all the pending interrupts */
+ writel(0xffffffff, sunxi_irq_base + SUNXI_IRQ_PENDING_REG(0));
+ writel(0xffffffff, sunxi_irq_base + SUNXI_IRQ_PENDING_REG(1));
+ writel(0xffffffff, sunxi_irq_base + SUNXI_IRQ_PENDING_REG(2));
+
+ /* Enable protection mode */
+ writel(0x01, sunxi_irq_base + SUNXI_IRQ_PROTECTION_REG);
+
+ /* Configure the external interrupt source type */
+ writel(0x00, sunxi_irq_base + SUNXI_IRQ_NMI_CTRL_REG);
+
+ sunxi_irq_domain = irq_domain_add_linear(node, 3 * 32,
+ &sunxi_irq_ops, NULL);
+ if (!sunxi_irq_domain)
+ panic("%s: unable to create IRQ domain\n", node->full_name);
+
+ return 0;
+}
+
+static struct of_device_id sunxi_irq_dt_ids[] __initconst = {
+ { .compatible = "allwinner,sunxi-ic", .data = sunxi_of_init }
+};
+
+void __init sunxi_init_irq(void)
+{
+ of_irq_init(sunxi_irq_dt_ids);
+}
+
+asmlinkage void __exception_irq_entry sunxi_handle_irq(struct pt_regs *regs)
+{
+ u32 irq, hwirq;
+
+ hwirq = readl(sunxi_irq_base + SUNXI_IRQ_VECTOR_REG) >> 2;
+ while (hwirq != 0) {
+ irq = irq_find_mapping(sunxi_irq_domain, hwirq);
+ handle_IRQ(irq, regs);
+ hwirq = readl(sunxi_irq_base + SUNXI_IRQ_VECTOR_REG) >> 2;
+ }
+}
diff --git a/arch/arm/plat-versatile/fpga-irq.c b/drivers/irqchip/irq-versatile-fpga.c
similarity index 83%
rename from arch/arm/plat-versatile/fpga-irq.c
rename to drivers/irqchip/irq-versatile-fpga.c
index 091ae10..789b3e5 100644
--- a/arch/arm/plat-versatile/fpga-irq.c
+++ b/drivers/irqchip/irq-versatile-fpga.c
@@ -1,8 +1,10 @@
/*
* Support for Versatile FPGA-based IRQ controllers
*/
+#include <linux/bitops.h>
#include <linux/irq.h>
#include <linux/io.h>
+#include <linux/irqchip/versatile-fpga.h>
#include <linux/irqdomain.h>
#include <linux/module.h>
#include <linux/of.h>
@@ -10,7 +12,6 @@
#include <asm/exception.h>
#include <asm/mach/irq.h>
-#include <plat/fpga-irq.h>
#define IRQ_STATUS 0x00
#define IRQ_RAW_STATUS 0x04
@@ -41,7 +42,7 @@
};
/* we cannot allocate memory when the controllers are initially registered */
-static struct fpga_irq_data fpga_irq_devices[CONFIG_PLAT_VERSATILE_FPGA_IRQ_NR];
+static struct fpga_irq_data fpga_irq_devices[CONFIG_VERSATILE_FPGA_IRQ_NR];
static int fpga_irq_id;
static void fpga_irq_mask(struct irq_data *d)
@@ -117,13 +118,12 @@
struct fpga_irq_data *f = d->host_data;
/* Skip invalid IRQs, only register handlers for the real ones */
- if (!(f->valid & (1 << hwirq)))
+ if (!(f->valid & BIT(hwirq)))
return -ENOTSUPP;
irq_set_chip_data(irq, f);
irq_set_chip_and_handler(irq, &f->chip,
handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
- f->used_irqs++;
return 0;
}
@@ -132,13 +132,15 @@
.xlate = irq_domain_xlate_onetwocell,
};
-static __init struct fpga_irq_data *
-fpga_irq_prep_struct(void __iomem *base, const char *name, u32 valid) {
+void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,
+ int parent_irq, u32 valid, struct device_node *node)
+{
struct fpga_irq_data *f;
+ int i;
if (fpga_irq_id >= ARRAY_SIZE(fpga_irq_devices)) {
- printk(KERN_ERR "%s: too few FPGA IRQ controllers, increase CONFIG_PLAT_VERSATILE_FPGA_IRQ_NR\n", __func__);
- return NULL;
+ pr_err("%s: too few FPGA IRQ controllers, increase CONFIG_PLAT_VERSATILE_FPGA_IRQ_NR\n", __func__);
+ return;
}
f = &fpga_irq_devices[fpga_irq_id];
f->base = base;
@@ -147,29 +149,28 @@
f->chip.irq_mask = fpga_irq_mask;
f->chip.irq_unmask = fpga_irq_unmask;
f->valid = valid;
- fpga_irq_id++;
-
- return f;
-}
-
-void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,
- int parent_irq, u32 valid, struct device_node *node)
-{
- struct fpga_irq_data *f;
-
- f = fpga_irq_prep_struct(base, name, valid);
- if (!f)
- return;
if (parent_irq != -1) {
irq_set_handler_data(parent_irq, f);
irq_set_chained_handler(parent_irq, fpga_irq_handle);
}
- f->domain = irq_domain_add_legacy(node, fls(valid), irq_start, 0,
+ /* This will also allocate irq descriptors */
+ f->domain = irq_domain_add_simple(node, fls(valid), irq_start,
&fpga_irqdomain_ops, f);
+
+ /* This will allocate all valid descriptors in the linear case */
+ for (i = 0; i < fls(valid); i++)
+ if (valid & BIT(i)) {
+ if (!irq_start)
+ irq_create_mapping(f->domain, i);
+ f->used_irqs++;
+ }
+
pr_info("FPGA IRQ chip %d \"%s\" @ %p, %u irqs\n",
fpga_irq_id, name, base, f->used_irqs);
+
+ fpga_irq_id++;
}
#ifdef CONFIG_OF
@@ -193,18 +194,11 @@
if (of_property_read_u32(node, "valid-mask", &valid_mask))
valid_mask = 0;
- f = fpga_irq_prep_struct(base, node->name, valid_mask);
- if (!f)
- return -ENOMEM;
+ fpga_irq_init(base, node->name, 0, -1, valid_mask, node);
writel(clear_mask, base + IRQ_ENABLE_CLEAR);
writel(clear_mask, base + FIQ_ENABLE_CLEAR);
- f->domain = irq_domain_add_linear(node, fls(valid_mask), &fpga_irqdomain_ops, f);
- f->used_irqs = hweight32(valid_mask);
-
- pr_info("FPGA IRQ chip %d \"%s\" @ %p, %u irqs\n",
- fpga_irq_id, node->name, base, f->used_irqs);
return 0;
}
#endif
diff --git a/drivers/isdn/Kconfig b/drivers/isdn/Kconfig
index a233ed5..86cd75a 100644
--- a/drivers/isdn/Kconfig
+++ b/drivers/isdn/Kconfig
@@ -4,7 +4,7 @@
menuconfig ISDN
bool "ISDN support"
- depends on NET
+ depends on NET && NETDEVICES
depends on !S390 && !UML
---help---
ISDN ("Integrated Services Digital Network", called RNIS in France)
diff --git a/drivers/isdn/i4l/Kconfig b/drivers/isdn/i4l/Kconfig
index 2302fbe..9c6650e 100644
--- a/drivers/isdn/i4l/Kconfig
+++ b/drivers/isdn/i4l/Kconfig
@@ -6,7 +6,7 @@
config ISDN_PPP
bool "Support synchronous PPP"
- depends on INET && NETDEVICES
+ depends on INET
select SLHC
help
Over digital connections such as ISDN, there is no need to
diff --git a/drivers/isdn/i4l/isdn_common.c b/drivers/isdn/i4l/isdn_common.c
index 8c610fa..e2a945e 100644
--- a/drivers/isdn/i4l/isdn_common.c
+++ b/drivers/isdn/i4l/isdn_common.c
@@ -1312,7 +1312,6 @@
} else
return -EINVAL;
break;
-#ifdef CONFIG_NETDEVICES
case IIOCNETGPN:
/* Get peer phone number of a connected
* isdn network interface */
@@ -1322,7 +1321,6 @@
return isdn_net_getpeer(&phone, argp);
} else
return -EINVAL;
-#endif
default:
return -EINVAL;
}
@@ -1352,7 +1350,6 @@
case IIOCNETLCR:
printk(KERN_INFO "INFO: ISDN_ABC_LCR_SUPPORT not enabled\n");
return -ENODEV;
-#ifdef CONFIG_NETDEVICES
case IIOCNETAIF:
/* Add a network-interface */
if (arg) {
@@ -1491,7 +1488,6 @@
return -EFAULT;
return isdn_net_force_hangup(name);
break;
-#endif /* CONFIG_NETDEVICES */
case IIOCSETVER:
dev->net_verbose = arg;
printk(KERN_INFO "isdn: Verbose-Level is %d\n", dev->net_verbose);
diff --git a/drivers/media/platform/soc_camera/mx2_camera.c b/drivers/media/platform/soc_camera/mx2_camera.c
index 9fd9d1c..558f6a3 100644
--- a/drivers/media/platform/soc_camera/mx2_camera.c
+++ b/drivers/media/platform/soc_camera/mx2_camera.c
@@ -41,7 +41,6 @@
#include <linux/videodev2.h>
#include <linux/platform_data/camera-mx2.h>
-#include <mach/hardware.h>
#include <asm/dma.h>
@@ -121,11 +120,13 @@
#define CSICR1 0x00
#define CSICR2 0x04
-#define CSISR (cpu_is_mx27() ? 0x08 : 0x18)
+#define CSISR_IMX25 0x18
+#define CSISR_IMX27 0x08
#define CSISTATFIFO 0x0c
#define CSIRFIFO 0x10
#define CSIRXCNT 0x14
-#define CSICR3 (cpu_is_mx27() ? 0x1C : 0x08)
+#define CSICR3_IMX25 0x08
+#define CSICR3_IMX27 0x1c
#define CSIDMASA_STATFIFO 0x20
#define CSIDMATA_STATFIFO 0x24
#define CSIDMASA_FB1 0x28
@@ -268,11 +269,17 @@
struct mx2_buf_internal internal;
};
+enum mx2_camera_type {
+ IMX25_CAMERA,
+ IMX27_CAMERA,
+};
+
struct mx2_camera_dev {
struct device *dev;
struct soc_camera_host soc_host;
struct soc_camera_device *icd;
- struct clk *clk_csi, *clk_emma_ahb, *clk_emma_ipg;
+ struct clk *clk_emma_ahb, *clk_emma_ipg;
+ struct clk *clk_csi_ahb, *clk_csi_per;
void __iomem *base_csi, *base_emma;
@@ -291,6 +298,9 @@
struct mx2_buffer *fb2_active;
u32 csicr1;
+ u32 reg_csisr;
+ u32 reg_csicr3;
+ enum mx2_camera_type devtype;
struct mx2_buf_internal buf_discard[2];
void *discard_buffer;
@@ -303,6 +313,29 @@
struct vb2_alloc_ctx *alloc_ctx;
};
+static struct platform_device_id mx2_camera_devtype[] = {
+ {
+ .name = "imx25-camera",
+ .driver_data = IMX25_CAMERA,
+ }, {
+ .name = "imx27-camera",
+ .driver_data = IMX27_CAMERA,
+ }, {
+ /* sentinel */
+ }
+};
+MODULE_DEVICE_TABLE(platform, mx2_camera_devtype);
+
+static inline int is_imx25_camera(struct mx2_camera_dev *pcdev)
+{
+ return pcdev->devtype == IMX25_CAMERA;
+}
+
+static inline int is_imx27_camera(struct mx2_camera_dev *pcdev)
+{
+ return pcdev->devtype == IMX27_CAMERA;
+}
+
static struct mx2_buffer *mx2_ibuf_to_buf(struct mx2_buf_internal *int_buf)
{
return container_of(int_buf, struct mx2_buffer, internal);
@@ -432,11 +465,12 @@
{
unsigned long flags;
- clk_disable_unprepare(pcdev->clk_csi);
+ clk_disable_unprepare(pcdev->clk_csi_ahb);
+ clk_disable_unprepare(pcdev->clk_csi_per);
writel(0, pcdev->base_csi + CSICR1);
- if (cpu_is_mx27()) {
+ if (is_imx27_camera(pcdev)) {
writel(0, pcdev->base_emma + PRP_CNTL);
- } else if (cpu_is_mx25()) {
+ } else if (is_imx25_camera(pcdev)) {
spin_lock_irqsave(&pcdev->lock, flags);
pcdev->fb1_active = NULL;
pcdev->fb2_active = NULL;
@@ -460,13 +494,17 @@
if (pcdev->icd)
return -EBUSY;
- ret = clk_prepare_enable(pcdev->clk_csi);
+ ret = clk_prepare_enable(pcdev->clk_csi_ahb);
if (ret < 0)
return ret;
+ ret = clk_prepare_enable(pcdev->clk_csi_per);
+ if (ret < 0)
+ goto exit_csi_ahb;
+
csicr1 = CSICR1_MCLKEN;
- if (cpu_is_mx27())
+ if (is_imx27_camera(pcdev))
csicr1 |= CSICR1_PRP_IF_EN | CSICR1_FCC |
CSICR1_RXFF_LEVEL(0);
@@ -480,6 +518,11 @@
icd->devnum);
return 0;
+
+exit_csi_ahb:
+ clk_disable_unprepare(pcdev->clk_csi_ahb);
+
+ return ret;
}
static void mx2_camera_remove_device(struct soc_camera_device *icd)
@@ -542,7 +585,7 @@
static irqreturn_t mx25_camera_irq(int irq_csi, void *data)
{
struct mx2_camera_dev *pcdev = data;
- u32 status = readl(pcdev->base_csi + CSISR);
+ u32 status = readl(pcdev->base_csi + pcdev->reg_csisr);
if (status & CSISR_DMA_TSF_FB1_INT)
mx25_camera_frame_done(pcdev, 1, MX2_STATE_DONE);
@@ -551,7 +594,7 @@
/* FIXME: handle CSISR_RFF_OR_INT */
- writel(status, pcdev->base_csi + CSISR);
+ writel(status, pcdev->base_csi + pcdev->reg_csisr);
return IRQ_HANDLED;
}
@@ -636,7 +679,7 @@
buf->state = MX2_STATE_QUEUED;
list_add_tail(&buf->internal.queue, &pcdev->capture);
- if (cpu_is_mx25()) {
+ if (is_imx25_camera(pcdev)) {
u32 csicr3, dma_inten = 0;
if (pcdev->fb1_active == NULL) {
@@ -655,20 +698,20 @@
list_del(&buf->internal.queue);
buf->state = MX2_STATE_ACTIVE;
- csicr3 = readl(pcdev->base_csi + CSICR3);
+ csicr3 = readl(pcdev->base_csi + pcdev->reg_csicr3);
/* Reflash DMA */
writel(csicr3 | CSICR3_DMA_REFLASH_RFF,
- pcdev->base_csi + CSICR3);
+ pcdev->base_csi + pcdev->reg_csicr3);
/* clear & enable interrupts */
- writel(dma_inten, pcdev->base_csi + CSISR);
+ writel(dma_inten, pcdev->base_csi + pcdev->reg_csisr);
pcdev->csicr1 |= dma_inten;
writel(pcdev->csicr1, pcdev->base_csi + CSICR1);
/* enable DMA */
csicr3 |= CSICR3_DMA_REQ_EN_RFF | CSICR3_RXFF_LEVEL(1);
- writel(csicr3, pcdev->base_csi + CSICR3);
+ writel(csicr3, pcdev->base_csi + pcdev->reg_csicr3);
}
}
@@ -712,7 +755,7 @@
*/
spin_lock_irqsave(&pcdev->lock, flags);
- if (cpu_is_mx25() && buf->state == MX2_STATE_ACTIVE) {
+ if (is_imx25_camera(pcdev) && buf->state == MX2_STATE_ACTIVE) {
if (pcdev->fb1_active == buf) {
pcdev->csicr1 &= ~CSICR1_FB1_DMA_INTEN;
writel(0, pcdev->base_csi + CSIDMASA_FB1);
@@ -835,7 +878,7 @@
unsigned long phys;
int bytesperline;
- if (cpu_is_mx27()) {
+ if (is_imx27_camera(pcdev)) {
unsigned long flags;
if (count < 2)
return -EINVAL;
@@ -930,7 +973,7 @@
void *b;
u32 cntl;
- if (cpu_is_mx27()) {
+ if (is_imx27_camera(pcdev)) {
spin_lock_irqsave(&pcdev->lock, flags);
cntl = readl(pcdev->base_emma + PRP_CNTL);
@@ -1082,11 +1125,11 @@
if (bytesperline < 0)
return bytesperline;
- if (cpu_is_mx27()) {
+ if (is_imx27_camera(pcdev)) {
ret = mx27_camera_emma_prp_reset(pcdev);
if (ret)
return ret;
- } else if (cpu_is_mx25()) {
+ } else if (is_imx25_camera(pcdev)) {
writel((bytesperline * icd->user_height) >> 2,
pcdev->base_csi + CSIRXCNT);
writel((bytesperline << 16) | icd->user_height,
@@ -1392,7 +1435,7 @@
/* FIXME: implement MX27 limits */
/* limit to MX25 hardware capabilities */
- if (cpu_is_mx25()) {
+ if (is_imx25_camera(pcdev)) {
if (xlate->host_fmt->bits_per_sample <= 8)
width_limit = 0xffff * 4;
else
@@ -1726,10 +1769,31 @@
goto exit;
}
- pcdev->clk_csi = devm_clk_get(&pdev->dev, "ahb");
- if (IS_ERR(pcdev->clk_csi)) {
- dev_err(&pdev->dev, "Could not get csi clock\n");
- err = PTR_ERR(pcdev->clk_csi);
+ pcdev->devtype = pdev->id_entry->driver_data;
+ switch (pcdev->devtype) {
+ case IMX25_CAMERA:
+ pcdev->reg_csisr = CSISR_IMX25;
+ pcdev->reg_csicr3 = CSICR3_IMX25;
+ break;
+ case IMX27_CAMERA:
+ pcdev->reg_csisr = CSISR_IMX27;
+ pcdev->reg_csicr3 = CSICR3_IMX27;
+ break;
+ default:
+ break;
+ }
+
+ pcdev->clk_csi_ahb = devm_clk_get(&pdev->dev, "ahb");
+ if (IS_ERR(pcdev->clk_csi_ahb)) {
+ dev_err(&pdev->dev, "Could not get csi ahb clock\n");
+ err = PTR_ERR(pcdev->clk_csi_ahb);
+ goto exit;
+ }
+
+ pcdev->clk_csi_per = devm_clk_get(&pdev->dev, "per");
+ if (IS_ERR(pcdev->clk_csi_per)) {
+ dev_err(&pdev->dev, "Could not get csi per clock\n");
+ err = PTR_ERR(pcdev->clk_csi_per);
goto exit;
}
@@ -1739,12 +1803,13 @@
pcdev->platform_flags = pcdev->pdata->flags;
- rate = clk_round_rate(pcdev->clk_csi, pcdev->pdata->clk * 2);
+ rate = clk_round_rate(pcdev->clk_csi_per,
+ pcdev->pdata->clk * 2);
if (rate <= 0) {
err = -ENODEV;
goto exit;
}
- err = clk_set_rate(pcdev->clk_csi, rate);
+ err = clk_set_rate(pcdev->clk_csi_per, rate);
if (err < 0)
goto exit;
}
@@ -1763,7 +1828,7 @@
pcdev->dev = &pdev->dev;
platform_set_drvdata(pdev, pcdev);
- if (cpu_is_mx25()) {
+ if (is_imx25_camera(pcdev)) {
err = devm_request_irq(&pdev->dev, irq_csi, mx25_camera_irq, 0,
MX2_CAM_DRV_NAME, pcdev);
if (err) {
@@ -1772,7 +1837,7 @@
}
}
- if (cpu_is_mx27()) {
+ if (is_imx27_camera(pcdev)) {
err = mx27_camera_emma_init(pdev);
if (err)
goto exit;
@@ -1789,7 +1854,7 @@
pcdev->soc_host.priv = pcdev;
pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
pcdev->soc_host.nr = pdev->id;
- if (cpu_is_mx25())
+ if (is_imx25_camera(pcdev))
pcdev->soc_host.capabilities = SOCAM_HOST_CAP_STRIDE;
pcdev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
@@ -1802,14 +1867,14 @@
goto exit_free_emma;
dev_info(&pdev->dev, "MX2 Camera (CSI) driver probed, clock frequency: %ld\n",
- clk_get_rate(pcdev->clk_csi));
+ clk_get_rate(pcdev->clk_csi_per));
return 0;
exit_free_emma:
vb2_dma_contig_cleanup_ctx(pcdev->alloc_ctx);
eallocctx:
- if (cpu_is_mx27()) {
+ if (is_imx27_camera(pcdev)) {
clk_disable_unprepare(pcdev->clk_emma_ipg);
clk_disable_unprepare(pcdev->clk_emma_ahb);
}
@@ -1827,7 +1892,7 @@
vb2_dma_contig_cleanup_ctx(pcdev->alloc_ctx);
- if (cpu_is_mx27()) {
+ if (is_imx27_camera(pcdev)) {
clk_disable_unprepare(pcdev->clk_emma_ipg);
clk_disable_unprepare(pcdev->clk_emma_ahb);
}
@@ -1841,6 +1906,7 @@
.driver = {
.name = MX2_CAM_DRV_NAME,
},
+ .id_table = mx2_camera_devtype,
.remove = __devexit_p(mx2_camera_remove),
};
diff --git a/drivers/media/platform/soc_camera/mx3_camera.c b/drivers/media/platform/soc_camera/mx3_camera.c
index 3557ac9..64d39b1 100644
--- a/drivers/media/platform/soc_camera/mx3_camera.c
+++ b/drivers/media/platform/soc_camera/mx3_camera.c
@@ -17,6 +17,7 @@
#include <linux/vmalloc.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
+#include <linux/dma/ipu-dma.h>
#include <media/v4l2-common.h>
#include <media/v4l2-dev.h>
@@ -24,7 +25,6 @@
#include <media/soc_camera.h>
#include <media/soc_mediabus.h>
-#include <mach/ipu.h>
#include <linux/platform_data/camera-mx3.h>
#include <linux/platform_data/dma-imx.h>
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
index 660bbc5..4d50da6 100644
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -208,7 +208,7 @@
MMC_CAP_CMD23,
};
-static struct dw_mci_drv_data exynos5250_drv_data = {
+static const struct dw_mci_drv_data exynos5250_drv_data = {
.caps = exynos5250_dwmmc_caps,
.init = dw_mci_exynos_priv_init,
.setup_clock = dw_mci_exynos_setup_clock,
@@ -220,14 +220,14 @@
static const struct of_device_id dw_mci_exynos_match[] = {
{ .compatible = "samsung,exynos5250-dw-mshc",
- .data = (void *)&exynos5250_drv_data, },
+ .data = &exynos5250_drv_data, },
{},
};
-MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match);
+MODULE_DEVICE_TABLE(of, dw_mci_exynos_match);
int dw_mci_exynos_probe(struct platform_device *pdev)
{
- struct dw_mci_drv_data *drv_data;
+ const struct dw_mci_drv_data *drv_data;
const struct of_device_id *match;
match = of_match_node(dw_mci_exynos_match, pdev->dev.of_node);
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c
index c960ca7..917936b 100644
--- a/drivers/mmc/host/dw_mmc-pltfm.c
+++ b/drivers/mmc/host/dw_mmc-pltfm.c
@@ -24,7 +24,7 @@
#include "dw_mmc.h"
int dw_mci_pltfm_register(struct platform_device *pdev,
- struct dw_mci_drv_data *drv_data)
+ const struct dw_mci_drv_data *drv_data)
{
struct dw_mci *host;
struct resource *regs;
@@ -50,8 +50,8 @@
if (!host->regs)
return -ENOMEM;
- if (host->drv_data->init) {
- ret = host->drv_data->init(host);
+ if (drv_data && drv_data->init) {
+ ret = drv_data->init(host);
if (ret)
return ret;
}
diff --git a/drivers/mmc/host/dw_mmc-pltfm.h b/drivers/mmc/host/dw_mmc-pltfm.h
index 301f245..2ac37b8 100644
--- a/drivers/mmc/host/dw_mmc-pltfm.h
+++ b/drivers/mmc/host/dw_mmc-pltfm.h
@@ -13,7 +13,7 @@
#define _DW_MMC_PLTFM_H_
extern int dw_mci_pltfm_register(struct platform_device *pdev,
- struct dw_mci_drv_data *drv_data);
+ const struct dw_mci_drv_data *drv_data);
extern int __devexit dw_mci_pltfm_remove(struct platform_device *pdev);
extern const struct dev_pm_ops dw_mci_pltfm_pmops;
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index c2828f3..c0667c8 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -232,6 +232,7 @@
{
struct mmc_data *data;
struct dw_mci_slot *slot = mmc_priv(mmc);
+ struct dw_mci_drv_data *drv_data = slot->host->drv_data;
u32 cmdr;
cmd->error = -EINPROGRESS;
@@ -261,8 +262,8 @@
cmdr |= SDMMC_CMD_DAT_WR;
}
- if (slot->host->drv_data->prepare_command)
- slot->host->drv_data->prepare_command(slot->host, &cmdr);
+ if (drv_data && drv_data->prepare_command)
+ drv_data->prepare_command(slot->host, &cmdr);
return cmdr;
}
@@ -434,7 +435,7 @@
return 0;
}
-static struct dw_mci_dma_ops dw_mci_idmac_ops = {
+static const struct dw_mci_dma_ops dw_mci_idmac_ops = {
.init = dw_mci_idmac_init,
.start = dw_mci_idmac_start_dma,
.stop = dw_mci_idmac_stop_dma,
@@ -772,6 +773,7 @@
static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
struct dw_mci_slot *slot = mmc_priv(mmc);
+ struct dw_mci_drv_data *drv_data = slot->host->drv_data;
u32 regs;
/* set default 1 bit mode */
@@ -807,8 +809,8 @@
slot->clock = ios->clock;
}
- if (slot->host->drv_data->set_ios)
- slot->host->drv_data->set_ios(slot->host, ios);
+ if (drv_data && drv_data->set_ios)
+ drv_data->set_ios(slot->host, ios);
switch (ios->power_mode) {
case MMC_POWER_UP:
@@ -1815,6 +1817,7 @@
{
struct mmc_host *mmc;
struct dw_mci_slot *slot;
+ struct dw_mci_drv_data *drv_data = host->drv_data;
int ctrl_id, ret;
u8 bus_width;
@@ -1854,8 +1857,8 @@
} else {
ctrl_id = to_platform_device(host->dev)->id;
}
- if (host->drv_data && host->drv_data->caps)
- mmc->caps |= host->drv_data->caps[ctrl_id];
+ if (drv_data && drv_data->caps)
+ mmc->caps |= drv_data->caps[ctrl_id];
if (host->pdata->caps2)
mmc->caps2 = host->pdata->caps2;
@@ -1867,10 +1870,10 @@
else
bus_width = 1;
- if (host->drv_data->setup_bus) {
+ if (drv_data && drv_data->setup_bus) {
struct device_node *slot_np;
slot_np = dw_mci_of_find_slot_node(host->dev, slot->id);
- ret = host->drv_data->setup_bus(host, slot_np, bus_width);
+ ret = drv_data->setup_bus(host, slot_np, bus_width);
if (ret)
goto err_setup_bus;
}
@@ -1968,7 +1971,7 @@
/* Determine which DMA interface to use */
#ifdef CONFIG_MMC_DW_IDMAC
host->dma_ops = &dw_mci_idmac_ops;
- dev_info(&host->dev, "Using internal DMA controller.\n");
+ dev_info(host->dev, "Using internal DMA controller.\n");
#endif
if (!host->dma_ops)
@@ -2035,6 +2038,7 @@
struct dw_mci_board *pdata;
struct device *dev = host->dev;
struct device_node *np = dev->of_node;
+ struct dw_mci_drv_data *drv_data = host->drv_data;
int idx, ret;
pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
@@ -2062,8 +2066,8 @@
of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms);
- if (host->drv_data->parse_dt) {
- ret = host->drv_data->parse_dt(host);
+ if (drv_data && drv_data->parse_dt) {
+ ret = drv_data->parse_dt(host);
if (ret)
return ERR_PTR(ret);
}
@@ -2080,6 +2084,7 @@
int dw_mci_probe(struct dw_mci *host)
{
+ struct dw_mci_drv_data *drv_data = host->drv_data;
int width, i, ret = 0;
u32 fifo_size;
int init_slots = 0;
@@ -2127,8 +2132,8 @@
else
host->bus_hz = clk_get_rate(host->ciu_clk);
- if (host->drv_data->setup_clock) {
- ret = host->drv_data->setup_clock(host);
+ if (drv_data && drv_data->setup_clock) {
+ ret = drv_data->setup_clock(host);
if (ret) {
dev_err(host->dev,
"implementation specific clock setup failed\n");
@@ -2228,6 +2233,21 @@
else
host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1;
+ /*
+ * Enable interrupts for command done, data over, data empty, card det,
+ * receive ready and error such as transmit, receive timeout, crc error
+ */
+ mci_writel(host, RINTSTS, 0xFFFFFFFF);
+ mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |
+ SDMMC_INT_TXDR | SDMMC_INT_RXDR |
+ DW_MCI_ERROR_FLAGS | SDMMC_INT_CD);
+ mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */
+
+ dev_info(host->dev, "DW MMC controller at irq %d, "
+ "%d bit host data width, "
+ "%u deep fifo\n",
+ host->irq, width, fifo_size);
+
/* We need at least one slot to succeed */
for (i = 0; i < host->num_slots; i++) {
ret = dw_mci_init_slot(host, i);
@@ -2257,20 +2277,6 @@
else
host->data_offset = DATA_240A_OFFSET;
- /*
- * Enable interrupts for command done, data over, data empty, card det,
- * receive ready and error such as transmit, receive timeout, crc error
- */
- mci_writel(host, RINTSTS, 0xFFFFFFFF);
- mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |
- SDMMC_INT_TXDR | SDMMC_INT_RXDR |
- DW_MCI_ERROR_FLAGS | SDMMC_INT_CD);
- mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */
-
- dev_info(host->dev, "DW MMC controller at irq %d, "
- "%d bit host data width, "
- "%u deep fifo\n",
- host->irq, width, fifo_size);
if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO)
dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n");
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c
index 565c2e4..477f63b 100644
--- a/drivers/mmc/host/mxcmmc.c
+++ b/drivers/mmc/host/mxcmmc.c
@@ -41,7 +41,6 @@
#include <linux/platform_data/mmc-mxcmmc.h>
#include <linux/platform_data/dma-imx.h>
-#include <mach/hardware.h>
#define DRIVER_NAME "mxc-mmc"
#define MXCMCI_TIMEOUT_MS 10000
@@ -113,6 +112,11 @@
#define INT_WRITE_OP_DONE_EN (1 << 1)
#define INT_READ_OP_EN (1 << 0)
+enum mxcmci_type {
+ IMX21_MMC,
+ IMX31_MMC,
+};
+
struct mxcmci_host {
struct mmc_host *mmc;
struct resource *res;
@@ -153,8 +157,27 @@
struct imx_dma_data dma_data;
struct timer_list watchdog;
+ enum mxcmci_type devtype;
};
+static struct platform_device_id mxcmci_devtype[] = {
+ {
+ .name = "imx21-mmc",
+ .driver_data = IMX21_MMC,
+ }, {
+ .name = "imx31-mmc",
+ .driver_data = IMX31_MMC,
+ }, {
+ /* sentinel */
+ }
+};
+MODULE_DEVICE_TABLE(platform, mxcmci_devtype);
+
+static inline int is_imx31_mmc(struct mxcmci_host *host)
+{
+ return host->devtype == IMX31_MMC;
+}
+
static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios);
static inline void mxcmci_init_ocr(struct mxcmci_host *host)
@@ -843,6 +866,8 @@
static void mxcmci_init_card(struct mmc_host *host, struct mmc_card *card)
{
+ struct mxcmci_host *mxcmci = mmc_priv(host);
+
/*
* MX3 SoCs have a silicon bug which corrupts CRC calculation of
* multi-block transfers when connected SDIO peripheral doesn't
@@ -850,7 +875,7 @@
* One way to prevent this is to only allow 1-bit transfers.
*/
- if (cpu_is_mx3() && card->type == MMC_TYPE_SDIO)
+ if (is_imx31_mmc(mxcmci) && card->type == MMC_TYPE_SDIO)
host->caps &= ~MMC_CAP_4_BIT_DATA;
else
host->caps |= MMC_CAP_4_BIT_DATA;
@@ -948,6 +973,7 @@
host->mmc = mmc;
host->pdata = pdev->dev.platform_data;
+ host->devtype = pdev->id_entry->driver_data;
spin_lock_init(&host->lock);
mxcmci_init_ocr(host);
@@ -1120,6 +1146,7 @@
static struct platform_driver mxcmci_driver = {
.probe = mxcmci_probe,
.remove = mxcmci_remove,
+ .id_table = mxcmci_devtype,
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
@@ -1134,4 +1161,4 @@
MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver");
MODULE_AUTHOR("Sascha Hauer, Pengutronix");
MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:imx-mmc");
+MODULE_ALIAS("platform:mxc-mmc");
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 54bfd0c..fedd258 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -178,7 +178,8 @@
static int omap_hsmmc_card_detect(struct device *dev, int slot)
{
- struct omap_mmc_platform_data *mmc = dev->platform_data;
+ struct omap_hsmmc_host *host = dev_get_drvdata(dev);
+ struct omap_mmc_platform_data *mmc = host->pdata;
/* NOTE: assumes card detect signal is active-low */
return !gpio_get_value_cansleep(mmc->slots[0].switch_pin);
@@ -186,7 +187,8 @@
static int omap_hsmmc_get_wp(struct device *dev, int slot)
{
- struct omap_mmc_platform_data *mmc = dev->platform_data;
+ struct omap_hsmmc_host *host = dev_get_drvdata(dev);
+ struct omap_mmc_platform_data *mmc = host->pdata;
/* NOTE: assumes write protect signal is active-high */
return gpio_get_value_cansleep(mmc->slots[0].gpio_wp);
@@ -194,7 +196,8 @@
static int omap_hsmmc_get_cover_state(struct device *dev, int slot)
{
- struct omap_mmc_platform_data *mmc = dev->platform_data;
+ struct omap_hsmmc_host *host = dev_get_drvdata(dev);
+ struct omap_mmc_platform_data *mmc = host->pdata;
/* NOTE: assumes card detect signal is active-low */
return !gpio_get_value_cansleep(mmc->slots[0].switch_pin);
@@ -204,7 +207,8 @@
static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot)
{
- struct omap_mmc_platform_data *mmc = dev->platform_data;
+ struct omap_hsmmc_host *host = dev_get_drvdata(dev);
+ struct omap_mmc_platform_data *mmc = host->pdata;
disable_irq(mmc->slots[0].card_detect_irq);
return 0;
@@ -212,7 +216,8 @@
static int omap_hsmmc_resume_cdirq(struct device *dev, int slot)
{
- struct omap_mmc_platform_data *mmc = dev->platform_data;
+ struct omap_hsmmc_host *host = dev_get_drvdata(dev);
+ struct omap_mmc_platform_data *mmc = host->pdata;
enable_irq(mmc->slots[0].card_detect_irq);
return 0;
@@ -2009,9 +2014,9 @@
clk_put(host->dbclk);
}
- mmc_free_host(host->mmc);
+ omap_hsmmc_gpio_free(host->pdata);
iounmap(host->base);
- omap_hsmmc_gpio_free(pdev->dev.platform_data);
+ mmc_free_host(host->mmc);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res)
diff --git a/drivers/mmc/host/sdhci-dove.c b/drivers/mmc/host/sdhci-dove.c
index 90140eb..8fd50a2 100644
--- a/drivers/mmc/host/sdhci-dove.c
+++ b/drivers/mmc/host/sdhci-dove.c
@@ -19,6 +19,7 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
+#include <linux/err.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/err.h>
@@ -84,30 +85,32 @@
struct sdhci_dove_priv *priv;
int ret;
- ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata);
- if (ret)
- goto sdhci_dove_register_fail;
-
priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv),
GFP_KERNEL);
if (!priv) {
dev_err(&pdev->dev, "unable to allocate private data");
- ret = -ENOMEM;
- goto sdhci_dove_allocate_fail;
+ return -ENOMEM;
}
+ priv->clk = clk_get(&pdev->dev, NULL);
+ if (!IS_ERR(priv->clk))
+ clk_prepare_enable(priv->clk);
+
+ ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata);
+ if (ret)
+ goto sdhci_dove_register_fail;
+
host = platform_get_drvdata(pdev);
pltfm_host = sdhci_priv(host);
pltfm_host->priv = priv;
- priv->clk = clk_get(&pdev->dev, NULL);
- if (!IS_ERR(priv->clk))
- clk_prepare_enable(priv->clk);
return 0;
-sdhci_dove_allocate_fail:
- sdhci_pltfm_unregister(pdev);
sdhci_dove_register_fail:
+ if (!IS_ERR(priv->clk)) {
+ clk_disable_unprepare(priv->clk);
+ clk_put(priv->clk);
+ }
return ret;
}
@@ -117,14 +120,13 @@
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_dove_priv *priv = pltfm_host->priv;
- if (priv->clk) {
- if (!IS_ERR(priv->clk)) {
- clk_disable_unprepare(priv->clk);
- clk_put(priv->clk);
- }
- devm_kfree(&pdev->dev, priv->clk);
+ sdhci_pltfm_unregister(pdev);
+
+ if (!IS_ERR(priv->clk)) {
+ clk_disable_unprepare(priv->clk);
+ clk_put(priv->clk);
}
- return sdhci_pltfm_unregister(pdev);
+ return 0;
}
static const struct of_device_id sdhci_dove_of_match_table[] __devinitdata = {
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index ae5fcbf..63d219f 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -169,6 +169,16 @@
}
#endif
+static void esdhc_of_platform_init(struct sdhci_host *host)
+{
+ u32 vvn;
+
+ vvn = in_be32(host->ioaddr + SDHCI_SLOT_INT_STATUS);
+ vvn = (vvn & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT;
+ if (vvn == VENDOR_V_22)
+ host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
+}
+
static struct sdhci_ops sdhci_esdhc_ops = {
.read_l = esdhc_readl,
.read_w = esdhc_readw,
@@ -180,6 +190,7 @@
.enable_dma = esdhc_of_enable_dma,
.get_max_clock = esdhc_of_get_max_clock,
.get_min_clock = esdhc_of_get_min_clock,
+ .platform_init = esdhc_of_platform_init,
#ifdef CONFIG_PM
.platform_suspend = esdhc_of_suspend,
.platform_resume = esdhc_of_resume,
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index 4bb74b0..04936f3 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -1196,7 +1196,7 @@
return ERR_PTR(-ENODEV);
}
- if (pci_resource_len(pdev, bar) != 0x100) {
+ if (pci_resource_len(pdev, bar) < 0x100) {
dev_err(&pdev->dev, "Invalid iomem size. You may "
"experience problems.\n");
}
diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c
index 65551a9..2716445 100644
--- a/drivers/mmc/host/sdhci-pltfm.c
+++ b/drivers/mmc/host/sdhci-pltfm.c
@@ -150,6 +150,13 @@
goto err_remap;
}
+ /*
+ * Some platforms need to probe the controller to be able to
+ * determine which caps should be used.
+ */
+ if (host->ops && host->ops->platform_init)
+ host->ops->platform_init(host);
+
platform_set_drvdata(pdev, host);
return host;
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 2903949..a54dd5d 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -211,8 +211,8 @@
if (ourhost->cur_clk != best_src) {
struct clk *clk = ourhost->clk_bus[best_src];
- clk_enable(clk);
- clk_disable(ourhost->clk_bus[ourhost->cur_clk]);
+ clk_prepare_enable(clk);
+ clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]);
/* turn clock off to card before changing clock source */
writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
@@ -607,7 +607,7 @@
}
/* enable the local io clock and keep it running for the moment. */
- clk_enable(sc->clk_io);
+ clk_prepare_enable(sc->clk_io);
for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
struct clk *clk;
@@ -638,7 +638,7 @@
}
#ifndef CONFIG_PM_RUNTIME
- clk_enable(sc->clk_bus[sc->cur_clk]);
+ clk_prepare_enable(sc->clk_bus[sc->cur_clk]);
#endif
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -747,13 +747,14 @@
sdhci_s3c_setup_card_detect_gpio(sc);
#ifdef CONFIG_PM_RUNTIME
- clk_disable(sc->clk_io);
+ if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
+ clk_disable_unprepare(sc->clk_io);
#endif
return 0;
err_req_regs:
#ifndef CONFIG_PM_RUNTIME
- clk_disable(sc->clk_bus[sc->cur_clk]);
+ clk_disable_unprepare(sc->clk_bus[sc->cur_clk]);
#endif
for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
if (sc->clk_bus[ptr]) {
@@ -762,7 +763,7 @@
}
err_no_busclks:
- clk_disable(sc->clk_io);
+ clk_disable_unprepare(sc->clk_io);
clk_put(sc->clk_io);
err_io_clk:
@@ -794,7 +795,8 @@
gpio_free(sc->ext_cd_gpio);
#ifdef CONFIG_PM_RUNTIME
- clk_enable(sc->clk_io);
+ if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
+ clk_prepare_enable(sc->clk_io);
#endif
sdhci_remove_host(host, 1);
@@ -802,14 +804,14 @@
pm_runtime_disable(&pdev->dev);
#ifndef CONFIG_PM_RUNTIME
- clk_disable(sc->clk_bus[sc->cur_clk]);
+ clk_disable_unprepare(sc->clk_bus[sc->cur_clk]);
#endif
for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
if (sc->clk_bus[ptr]) {
clk_put(sc->clk_bus[ptr]);
}
}
- clk_disable(sc->clk_io);
+ clk_disable_unprepare(sc->clk_io);
clk_put(sc->clk_io);
if (pdev->dev.of_node) {
@@ -849,8 +851,8 @@
ret = sdhci_runtime_suspend_host(host);
- clk_disable(ourhost->clk_bus[ourhost->cur_clk]);
- clk_disable(busclk);
+ clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]);
+ clk_disable_unprepare(busclk);
return ret;
}
@@ -861,8 +863,8 @@
struct clk *busclk = ourhost->clk_io;
int ret;
- clk_enable(busclk);
- clk_enable(ourhost->clk_bus[ourhost->cur_clk]);
+ clk_prepare_enable(busclk);
+ clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]);
ret = sdhci_runtime_resume_host(host);
return ret;
}
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 7922adb..c7851c0 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1315,16 +1315,19 @@
*/
if ((host->flags & SDHCI_NEEDS_RETUNING) &&
!(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) {
- /* eMMC uses cmd21 while sd and sdio use cmd19 */
- tuning_opcode = mmc->card->type == MMC_TYPE_MMC ?
- MMC_SEND_TUNING_BLOCK_HS200 :
- MMC_SEND_TUNING_BLOCK;
- spin_unlock_irqrestore(&host->lock, flags);
- sdhci_execute_tuning(mmc, tuning_opcode);
- spin_lock_irqsave(&host->lock, flags);
+ if (mmc->card) {
+ /* eMMC uses cmd21 but sd and sdio use cmd19 */
+ tuning_opcode =
+ mmc->card->type == MMC_TYPE_MMC ?
+ MMC_SEND_TUNING_BLOCK_HS200 :
+ MMC_SEND_TUNING_BLOCK;
+ spin_unlock_irqrestore(&host->lock, flags);
+ sdhci_execute_tuning(mmc, tuning_opcode);
+ spin_lock_irqsave(&host->lock, flags);
- /* Restore original mmc_request structure */
- host->mrq = mrq;
+ /* Restore original mmc_request structure */
+ host->mrq = mrq;
+ }
}
if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23))
@@ -2837,6 +2840,9 @@
if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA))
mmc->caps |= MMC_CAP_4_BIT_DATA;
+ if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23)
+ mmc->caps &= ~MMC_CAP_CMD23;
+
if (caps[0] & SDHCI_CAN_DO_HISPD)
mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED;
@@ -2846,9 +2852,12 @@
/* If vqmmc regulator and no 1.8V signalling, then there's no UHS */
host->vqmmc = regulator_get(mmc_dev(mmc), "vqmmc");
- if (IS_ERR(host->vqmmc)) {
- pr_info("%s: no vqmmc regulator found\n", mmc_hostname(mmc));
- host->vqmmc = NULL;
+ if (IS_ERR_OR_NULL(host->vqmmc)) {
+ if (PTR_ERR(host->vqmmc) < 0) {
+ pr_info("%s: no vqmmc regulator found\n",
+ mmc_hostname(mmc));
+ host->vqmmc = NULL;
+ }
}
else if (regulator_is_supported_voltage(host->vqmmc, 1800000, 1800000))
regulator_enable(host->vqmmc);
@@ -2904,9 +2913,12 @@
ocr_avail = 0;
host->vmmc = regulator_get(mmc_dev(mmc), "vmmc");
- if (IS_ERR(host->vmmc)) {
- pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc));
- host->vmmc = NULL;
+ if (IS_ERR_OR_NULL(host->vmmc)) {
+ if (PTR_ERR(host->vmmc) < 0) {
+ pr_info("%s: no vmmc regulator found\n",
+ mmc_hostname(mmc));
+ host->vmmc = NULL;
+ }
} else
regulator_enable(host->vmmc);
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 97653ea..71a4a7ed 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -278,6 +278,7 @@
void (*hw_reset)(struct sdhci_host *host);
void (*platform_suspend)(struct sdhci_host *host);
void (*platform_resume)(struct sdhci_host *host);
+ void (*platform_init)(struct sdhci_host *host);
};
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
index 11d2bc3..d25bc97 100644
--- a/drivers/mmc/host/sh_mmcif.c
+++ b/drivers/mmc/host/sh_mmcif.c
@@ -1466,9 +1466,9 @@
platform_set_drvdata(pdev, NULL);
+ clk_disable(host->hclk);
mmc_free_host(host->mmc);
pm_runtime_put_sync(&pdev->dev);
- clk_disable(host->hclk);
pm_runtime_disable(&pdev->dev);
return 0;
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 72e31d8..022dcdc 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -37,15 +37,9 @@
#include <asm/mach/flash.h>
#include <linux/platform_data/mtd-mxc_nand.h>
-#include <mach/hardware.h>
#define DRIVER_NAME "mxc_nand"
-#define nfc_is_v21() (cpu_is_mx25() || cpu_is_mx35())
-#define nfc_is_v1() (cpu_is_mx31() || cpu_is_mx27() || cpu_is_mx21())
-#define nfc_is_v3_2a() cpu_is_mx51()
-#define nfc_is_v3_2b() cpu_is_mx53()
-
/* Addresses for NFC registers */
#define NFC_V1_V2_BUF_SIZE (host->regs + 0x00)
#define NFC_V1_V2_BUF_ADDR (host->regs + 0x04)
@@ -1283,6 +1277,53 @@
.ppb_shift = 8,
};
+static inline int is_imx21_nfc(struct mxc_nand_host *host)
+{
+ return host->devtype_data == &imx21_nand_devtype_data;
+}
+
+static inline int is_imx27_nfc(struct mxc_nand_host *host)
+{
+ return host->devtype_data == &imx27_nand_devtype_data;
+}
+
+static inline int is_imx25_nfc(struct mxc_nand_host *host)
+{
+ return host->devtype_data == &imx25_nand_devtype_data;
+}
+
+static inline int is_imx51_nfc(struct mxc_nand_host *host)
+{
+ return host->devtype_data == &imx51_nand_devtype_data;
+}
+
+static inline int is_imx53_nfc(struct mxc_nand_host *host)
+{
+ return host->devtype_data == &imx53_nand_devtype_data;
+}
+
+static struct platform_device_id mxcnd_devtype[] = {
+ {
+ .name = "imx21-nand",
+ .driver_data = (kernel_ulong_t) &imx21_nand_devtype_data,
+ }, {
+ .name = "imx27-nand",
+ .driver_data = (kernel_ulong_t) &imx27_nand_devtype_data,
+ }, {
+ .name = "imx25-nand",
+ .driver_data = (kernel_ulong_t) &imx25_nand_devtype_data,
+ }, {
+ .name = "imx51-nand",
+ .driver_data = (kernel_ulong_t) &imx51_nand_devtype_data,
+ }, {
+ .name = "imx53-nand",
+ .driver_data = (kernel_ulong_t) &imx53_nand_devtype_data,
+ }, {
+ /* sentinel */
+ }
+};
+MODULE_DEVICE_TABLE(platform, mxcnd_devtype);
+
#ifdef CONFIG_OF_MTD
static const struct of_device_id mxcnd_dt_ids[] = {
{
@@ -1337,32 +1378,6 @@
}
#endif
-static int __init mxcnd_probe_pdata(struct mxc_nand_host *host)
-{
- struct mxc_nand_platform_data *pdata = host->dev->platform_data;
-
- if (!pdata)
- return -ENODEV;
-
- host->pdata = *pdata;
-
- if (nfc_is_v1()) {
- if (cpu_is_mx21())
- host->devtype_data = &imx21_nand_devtype_data;
- else
- host->devtype_data = &imx27_nand_devtype_data;
- } else if (nfc_is_v21()) {
- host->devtype_data = &imx25_nand_devtype_data;
- } else if (nfc_is_v3_2a()) {
- host->devtype_data = &imx51_nand_devtype_data;
- } else if (nfc_is_v3_2b()) {
- host->devtype_data = &imx53_nand_devtype_data;
- } else
- BUG();
-
- return 0;
-}
-
static int __devinit mxcnd_probe(struct platform_device *pdev)
{
struct nand_chip *this;
@@ -1404,8 +1419,16 @@
return PTR_ERR(host->clk);
err = mxcnd_probe_dt(host);
- if (err > 0)
- err = mxcnd_probe_pdata(host);
+ if (err > 0) {
+ struct mxc_nand_platform_data *pdata = pdev->dev.platform_data;
+ if (pdata) {
+ host->pdata = *pdata;
+ host->devtype_data = (struct mxc_nand_devtype_data *)
+ pdev->id_entry->driver_data;
+ } else {
+ err = -ENODEV;
+ }
+ }
if (err < 0)
return err;
@@ -1494,7 +1517,7 @@
}
/* first scan to find the device and get the page size */
- if (nand_scan_ident(mtd, nfc_is_v21() ? 4 : 1, NULL)) {
+ if (nand_scan_ident(mtd, is_imx25_nfc(host) ? 4 : 1, NULL)) {
err = -ENXIO;
goto escan;
}
@@ -1508,7 +1531,7 @@
this->ecc.layout = host->devtype_data->ecclayout_4k;
if (this->ecc.mode == NAND_ECC_HW) {
- if (nfc_is_v1())
+ if (is_imx21_nfc(host) || is_imx27_nfc(host))
this->ecc.strength = 1;
else
this->ecc.strength = (host->eccsize == 4) ? 4 : 8;
@@ -1555,6 +1578,7 @@
.owner = THIS_MODULE,
.of_match_table = of_match_ptr(mxcnd_dt_ids),
},
+ .id_table = mxcnd_devtype,
.probe = mxcnd_probe,
.remove = __devexit_p(mxcnd_remove),
};
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
index c65295d..6e5bdd1 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
@@ -1702,7 +1702,7 @@
SHMEM_EEE_ADV_STATUS_SHIFT);
if ((advertised != (eee_cfg & SHMEM_EEE_ADV_STATUS_MASK))) {
DP(BNX2X_MSG_ETHTOOL,
- "Direct manipulation of EEE advertisment is not supported\n");
+ "Direct manipulation of EEE advertisement is not supported\n");
return -EINVAL;
}
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
index 6dd0dd0..f6cfdc6 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
@@ -9941,7 +9941,7 @@
else
rc = bnx2x_8483x_disable_eee(phy, params, vars);
if (rc) {
- DP(NETIF_MSG_LINK, "Failed to set EEE advertisment\n");
+ DP(NETIF_MSG_LINK, "Failed to set EEE advertisement\n");
return rc;
}
} else {
@@ -12987,7 +12987,7 @@
DP(NETIF_MSG_LINK, "Analyze TX Fault\n");
break;
default:
- DP(NETIF_MSG_LINK, "Analyze UNKOWN\n");
+ DP(NETIF_MSG_LINK, "Analyze UNKNOWN\n");
}
DP(NETIF_MSG_LINK, "Link changed:[%x %x]->%x\n", vars->link_up,
old_status, status);
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
index 32eec15..730ae2c 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
@@ -2519,6 +2519,7 @@
{
struct fw_bye_cmd c;
+ memset(&c, 0, sizeof(c));
INIT_CMD(c, BYE, WRITE);
return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL);
}
@@ -2535,6 +2536,7 @@
{
struct fw_initialize_cmd c;
+ memset(&c, 0, sizeof(c));
INIT_CMD(c, INITIALIZE, WRITE);
return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL);
}
@@ -2551,6 +2553,7 @@
{
struct fw_reset_cmd c;
+ memset(&c, 0, sizeof(c));
INIT_CMD(c, RESET, WRITE);
c.val = htonl(reset);
return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL);
@@ -2828,7 +2831,7 @@
HOSTPAGESIZEPF7(sge_hps));
t4_set_reg_field(adap, SGE_CONTROL,
- INGPADBOUNDARY(INGPADBOUNDARY_MASK) |
+ INGPADBOUNDARY_MASK |
EGRSTATUSPAGESIZE_MASK,
INGPADBOUNDARY(fl_align_log - 5) |
EGRSTATUSPAGESIZE(stat_len != 64));
@@ -3278,6 +3281,7 @@
{
struct fw_vi_enable_cmd c;
+ memset(&c, 0, sizeof(c));
c.op_to_viid = htonl(FW_CMD_OP(FW_VI_ENABLE_CMD) | FW_CMD_REQUEST |
FW_CMD_EXEC | FW_VI_ENABLE_CMD_VIID(viid));
c.ien_to_len16 = htonl(FW_VI_ENABLE_CMD_LED | FW_LEN16(c));
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c
index 1d03dcd..19ac096 100644
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
@@ -1353,8 +1353,11 @@
struct gfar_private *priv = dev_get_drvdata(dev);
struct net_device *ndev = priv->ndev;
- if (!netif_running(ndev))
+ if (!netif_running(ndev)) {
+ netif_device_attach(ndev);
+
return 0;
+ }
gfar_init_bds(ndev);
init_registers(ndev);
diff --git a/drivers/net/ethernet/jme.c b/drivers/net/ethernet/jme.c
index f8064df..92317e9 100644
--- a/drivers/net/ethernet/jme.c
+++ b/drivers/net/ethernet/jme.c
@@ -1948,10 +1948,10 @@
JME_NAPI_DISABLE(jme);
- tasklet_disable(&jme->linkch_task);
- tasklet_disable(&jme->txclean_task);
- tasklet_disable(&jme->rxclean_task);
- tasklet_disable(&jme->rxempty_task);
+ tasklet_kill(&jme->linkch_task);
+ tasklet_kill(&jme->txclean_task);
+ tasklet_kill(&jme->rxclean_task);
+ tasklet_kill(&jme->rxempty_task);
jme_disable_rx_engine(jme);
jme_disable_tx_engine(jme);
diff --git a/drivers/net/ethernet/marvell/skge.c b/drivers/net/ethernet/marvell/skge.c
index 9b9c2ac..d19a143 100644
--- a/drivers/net/ethernet/marvell/skge.c
+++ b/drivers/net/ethernet/marvell/skge.c
@@ -4026,7 +4026,7 @@
dev0 = hw->dev[0];
unregister_netdev(dev0);
- tasklet_disable(&hw->phy_task);
+ tasklet_kill(&hw->phy_task);
spin_lock_irq(&hw->hw_lock);
hw->intr_mask = 0;
diff --git a/drivers/net/ethernet/micrel/ksz884x.c b/drivers/net/ethernet/micrel/ksz884x.c
index 318fee9..e558edd 100644
--- a/drivers/net/ethernet/micrel/ksz884x.c
+++ b/drivers/net/ethernet/micrel/ksz884x.c
@@ -5407,8 +5407,8 @@
/* Delay for receive task to stop scheduling itself. */
msleep(2000 / HZ);
- tasklet_disable(&hw_priv->rx_tasklet);
- tasklet_disable(&hw_priv->tx_tasklet);
+ tasklet_kill(&hw_priv->rx_tasklet);
+ tasklet_kill(&hw_priv->tx_tasklet);
free_irq(dev->irq, hw_priv->dev);
transmit_cleanup(hw_priv, 0);
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index e7ff886..927aa33 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -3827,6 +3827,8 @@
void __iomem *ioaddr = tp->mmio_addr;
switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_25:
+ case RTL_GIGA_MAC_VER_26:
case RTL_GIGA_MAC_VER_29:
case RTL_GIGA_MAC_VER_30:
case RTL_GIGA_MAC_VER_32:
@@ -4519,6 +4521,9 @@
mc_filter[1] = swab32(data);
}
+ if (tp->mac_version == RTL_GIGA_MAC_VER_35)
+ mc_filter[1] = mc_filter[0] = 0xffffffff;
+
RTL_W32(MAR0 + 4, mc_filter[1]);
RTL_W32(MAR0 + 0, mc_filter[0]);
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 0793299..1d04754 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -990,7 +990,7 @@
axienet_setoptions(ndev, lp->options &
~(XAE_OPTION_TXEN | XAE_OPTION_RXEN));
- tasklet_disable(&lp->dma_err_tasklet);
+ tasklet_kill(&lp->dma_err_tasklet);
free_irq(lp->tx_irq, ndev);
free_irq(lp->rx_irq, ndev);
diff --git a/drivers/net/usb/cdc_eem.c b/drivers/net/usb/cdc_eem.c
index c81e278..08d55b6 100644
--- a/drivers/net/usb/cdc_eem.c
+++ b/drivers/net/usb/cdc_eem.c
@@ -31,6 +31,7 @@
#include <linux/usb/cdc.h>
#include <linux/usb/usbnet.h>
#include <linux/gfp.h>
+#include <linux/if_vlan.h>
/*
@@ -92,7 +93,7 @@
/* no jumbogram (16K) support for now */
- dev->net->hard_header_len += EEM_HEAD + ETH_FCS_LEN;
+ dev->net->hard_header_len += EEM_HEAD + ETH_FCS_LEN + VLAN_HLEN;
dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
return 0;
diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c
index 7479a57..3286166 100644
--- a/drivers/net/usb/smsc95xx.c
+++ b/drivers/net/usb/smsc95xx.c
@@ -1344,6 +1344,7 @@
} else {
u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
skb_push(skb, 4);
+ cpu_to_le32s(&csum_preamble);
memcpy(skb->data, &csum_preamble, 4);
}
}
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c
index cb04f90..edb81ed 100644
--- a/drivers/net/usb/usbnet.c
+++ b/drivers/net/usb/usbnet.c
@@ -359,10 +359,12 @@
void usbnet_defer_kevent (struct usbnet *dev, int work)
{
set_bit (work, &dev->flags);
- if (!schedule_work (&dev->kevent))
- netdev_err(dev->net, "kevent %d may have been dropped\n", work);
- else
+ if (!schedule_work (&dev->kevent)) {
+ if (net_ratelimit())
+ netdev_err(dev->net, "kevent %d may have been dropped\n", work);
+ } else {
netdev_dbg(dev->net, "kevent %d scheduled\n", work);
+ }
}
EXPORT_SYMBOL_GPL(usbnet_defer_kevent);
diff --git a/drivers/net/wireless/b43legacy/pio.c b/drivers/net/wireless/b43legacy/pio.c
index 192251a..282eede 100644
--- a/drivers/net/wireless/b43legacy/pio.c
+++ b/drivers/net/wireless/b43legacy/pio.c
@@ -382,7 +382,7 @@
{
struct b43legacy_pio_txpacket *packet, *tmp_packet;
- tasklet_disable(&queue->txtask);
+ tasklet_kill(&queue->txtask);
list_for_each_entry_safe(packet, tmp_packet, &queue->txrunning, list)
free_txpacket(packet, 0);
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 6241fd0..a543746 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -320,10 +320,7 @@
} else
next = dev->bus_list.next;
- /* Run device routines with the device locked */
- device_lock(&dev->dev);
retval = cb(dev, userdata);
- device_unlock(&dev->dev);
if (retval)
break;
}
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 94c6e2a..6c94fc9 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -398,6 +398,8 @@
struct pci_dev *pci_dev = to_pci_dev(dev);
struct pci_driver *drv = pci_dev->driver;
+ pm_runtime_resume(dev);
+
if (drv && drv->shutdown)
drv->shutdown(pci_dev);
pci_msi_shutdown(pci_dev);
@@ -408,16 +410,6 @@
* continue to do DMA
*/
pci_disable_device(pci_dev);
-
- /*
- * Devices may be enabled to wake up by runtime PM, but they need not
- * be supposed to wake up the system from its "power off" state (e.g.
- * ACPI S5). Therefore disable wakeup for all devices that aren't
- * supposed to wake up the system at this point. The state argument
- * will be ignored by pci_enable_wake().
- */
- if (!device_may_wakeup(dev))
- pci_enable_wake(pci_dev, PCI_UNKNOWN, false);
}
#ifdef CONFIG_PM
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index 02d107b..f39378d 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -458,40 +458,6 @@
}
struct device_attribute vga_attr = __ATTR_RO(boot_vga);
-static void
-pci_config_pm_runtime_get(struct pci_dev *pdev)
-{
- struct device *dev = &pdev->dev;
- struct device *parent = dev->parent;
-
- if (parent)
- pm_runtime_get_sync(parent);
- pm_runtime_get_noresume(dev);
- /*
- * pdev->current_state is set to PCI_D3cold during suspending,
- * so wait until suspending completes
- */
- pm_runtime_barrier(dev);
- /*
- * Only need to resume devices in D3cold, because config
- * registers are still accessible for devices suspended but
- * not in D3cold.
- */
- if (pdev->current_state == PCI_D3cold)
- pm_runtime_resume(dev);
-}
-
-static void
-pci_config_pm_runtime_put(struct pci_dev *pdev)
-{
- struct device *dev = &pdev->dev;
- struct device *parent = dev->parent;
-
- pm_runtime_put(dev);
- if (parent)
- pm_runtime_put_sync(parent);
-}
-
static ssize_t
pci_read_config(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 5485883..aabf647 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1858,6 +1858,38 @@
}
EXPORT_SYMBOL_GPL(pci_dev_run_wake);
+void pci_config_pm_runtime_get(struct pci_dev *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device *parent = dev->parent;
+
+ if (parent)
+ pm_runtime_get_sync(parent);
+ pm_runtime_get_noresume(dev);
+ /*
+ * pdev->current_state is set to PCI_D3cold during suspending,
+ * so wait until suspending completes
+ */
+ pm_runtime_barrier(dev);
+ /*
+ * Only need to resume devices in D3cold, because config
+ * registers are still accessible for devices suspended but
+ * not in D3cold.
+ */
+ if (pdev->current_state == PCI_D3cold)
+ pm_runtime_resume(dev);
+}
+
+void pci_config_pm_runtime_put(struct pci_dev *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device *parent = dev->parent;
+
+ pm_runtime_put(dev);
+ if (parent)
+ pm_runtime_put_sync(parent);
+}
+
/**
* pci_pm_init - Initialize PM functions of given PCI device
* @dev: PCI device to handle.
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index bacbcba..fd92aab 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -72,6 +72,8 @@
extern int pci_finish_runtime_suspend(struct pci_dev *dev);
extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
extern void pci_wakeup_bus(struct pci_bus *bus);
+extern void pci_config_pm_runtime_get(struct pci_dev *dev);
+extern void pci_config_pm_runtime_put(struct pci_dev *dev);
extern void pci_pm_init(struct pci_dev *dev);
extern void platform_pci_wakeup_init(struct pci_dev *dev);
extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index 06bad96..af4e31c 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -213,6 +213,7 @@
struct aer_broadcast_data *result_data;
result_data = (struct aer_broadcast_data *) data;
+ device_lock(&dev->dev);
dev->error_state = result_data->state;
if (!dev->driver ||
@@ -231,12 +232,14 @@
dev->driver ?
"no AER-aware driver" : "no driver");
}
- return 0;
+ goto out;
}
err_handler = dev->driver->err_handler;
vote = err_handler->error_detected(dev, result_data->state);
result_data->result = merge_result(result_data->result, vote);
+out:
+ device_unlock(&dev->dev);
return 0;
}
@@ -247,14 +250,17 @@
struct aer_broadcast_data *result_data;
result_data = (struct aer_broadcast_data *) data;
+ device_lock(&dev->dev);
if (!dev->driver ||
!dev->driver->err_handler ||
!dev->driver->err_handler->mmio_enabled)
- return 0;
+ goto out;
err_handler = dev->driver->err_handler;
vote = err_handler->mmio_enabled(dev);
result_data->result = merge_result(result_data->result, vote);
+out:
+ device_unlock(&dev->dev);
return 0;
}
@@ -265,14 +271,17 @@
struct aer_broadcast_data *result_data;
result_data = (struct aer_broadcast_data *) data;
+ device_lock(&dev->dev);
if (!dev->driver ||
!dev->driver->err_handler ||
!dev->driver->err_handler->slot_reset)
- return 0;
+ goto out;
err_handler = dev->driver->err_handler;
vote = err_handler->slot_reset(dev);
result_data->result = merge_result(result_data->result, vote);
+out:
+ device_unlock(&dev->dev);
return 0;
}
@@ -280,15 +289,18 @@
{
const struct pci_error_handlers *err_handler;
+ device_lock(&dev->dev);
dev->error_state = pci_channel_io_normal;
if (!dev->driver ||
!dev->driver->err_handler ||
!dev->driver->err_handler->resume)
- return 0;
+ goto out;
err_handler = dev->driver->err_handler;
err_handler->resume(dev);
+out:
+ device_unlock(&dev->dev);
return 0;
}
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index d03a7a3..ed129b4 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -272,7 +272,8 @@
}
/* Hot-Plug Capable */
- if (cap_mask & PCIE_PORT_SERVICE_HP) {
+ if ((cap_mask & PCIE_PORT_SERVICE_HP) &&
+ dev->pcie_flags_reg & PCI_EXP_FLAGS_SLOT) {
pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32);
if (reg32 & PCI_EXP_SLTCAP_HPC) {
services |= PCIE_PORT_SERVICE_HP;
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
index eb907a8f..9b8505c 100644
--- a/drivers/pci/proc.c
+++ b/drivers/pci/proc.c
@@ -76,6 +76,8 @@
if (!access_ok(VERIFY_WRITE, buf, cnt))
return -EINVAL;
+ pci_config_pm_runtime_get(dev);
+
if ((pos & 1) && cnt) {
unsigned char val;
pci_user_read_config_byte(dev, pos, &val);
@@ -121,6 +123,8 @@
cnt--;
}
+ pci_config_pm_runtime_put(dev);
+
*ppos = pos;
return nbytes;
}
@@ -146,6 +150,8 @@
if (!access_ok(VERIFY_READ, buf, cnt))
return -EINVAL;
+ pci_config_pm_runtime_get(dev);
+
if ((pos & 1) && cnt) {
unsigned char val;
__get_user(val, buf);
@@ -191,6 +197,8 @@
cnt--;
}
+ pci_config_pm_runtime_put(dev);
+
*ppos = pos;
i_size_write(ino, dp->size);
return nbytes;
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 7bf914d..d96caefd 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -179,11 +179,13 @@
config PINCTRL_SAMSUNG
bool "Samsung pinctrl driver"
+ depends on OF && GPIOLIB
select PINMUX
select PINCONF
config PINCTRL_EXYNOS4
bool "Pinctrl driver data for Exynos4 SoC"
+ depends on OF && GPIOLIB
select PINCTRL_SAMSUNG
config PINCTRL_MVEBU
diff --git a/drivers/pinctrl/spear/pinctrl-spear.c b/drivers/pinctrl/spear/pinctrl-spear.c
index 5d4f44f..b1fd6ee 100644
--- a/drivers/pinctrl/spear/pinctrl-spear.c
+++ b/drivers/pinctrl/spear/pinctrl-spear.c
@@ -244,7 +244,7 @@
else
temp = ~muxreg->val;
- val |= temp;
+ val |= muxreg->mask & temp;
pmx_writel(pmx, val, muxreg->reg);
}
}
diff --git a/drivers/pinctrl/spear/pinctrl-spear1310.c b/drivers/pinctrl/spear/pinctrl-spear1310.c
index d6cca8c..0436fc7 100644
--- a/drivers/pinctrl/spear/pinctrl-spear1310.c
+++ b/drivers/pinctrl/spear/pinctrl-spear1310.c
@@ -25,8 +25,8 @@
};
/* registers */
-#define PERIP_CFG 0x32C
- #define MCIF_SEL_SHIFT 3
+#define PERIP_CFG 0x3B0
+ #define MCIF_SEL_SHIFT 5
#define MCIF_SEL_SD (0x1 << MCIF_SEL_SHIFT)
#define MCIF_SEL_CF (0x2 << MCIF_SEL_SHIFT)
#define MCIF_SEL_XD (0x3 << MCIF_SEL_SHIFT)
@@ -164,6 +164,10 @@
#define PMX_SSP0_CS0_MASK (1 << 29)
#define PMX_SSP0_CS1_2_MASK (1 << 30)
+#define PAD_DIRECTION_SEL_0 0x65C
+#define PAD_DIRECTION_SEL_1 0x660
+#define PAD_DIRECTION_SEL_2 0x664
+
/* combined macros */
#define PMX_GMII_MASK (PMX_GMIICLK_MASK | \
PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK | \
@@ -237,6 +241,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_I2C0_MASK,
.val = PMX_I2C0_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_I2C0_MASK,
+ .val = PMX_I2C0_MASK,
},
};
@@ -269,6 +277,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_SSP0_MASK,
.val = PMX_SSP0_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_SSP0_MASK,
+ .val = PMX_SSP0_MASK,
},
};
@@ -294,6 +306,10 @@
.reg = PAD_FUNCTION_EN_2,
.mask = PMX_SSP0_CS0_MASK,
.val = PMX_SSP0_CS0_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_2,
+ .mask = PMX_SSP0_CS0_MASK,
+ .val = PMX_SSP0_CS0_MASK,
},
};
@@ -319,6 +335,10 @@
.reg = PAD_FUNCTION_EN_2,
.mask = PMX_SSP0_CS1_2_MASK,
.val = PMX_SSP0_CS1_2_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_2,
+ .mask = PMX_SSP0_CS1_2_MASK,
+ .val = PMX_SSP0_CS1_2_MASK,
},
};
@@ -352,6 +372,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_I2S0_MASK,
.val = PMX_I2S0_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_I2S0_MASK,
+ .val = PMX_I2S0_MASK,
},
};
@@ -384,6 +408,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_I2S1_MASK,
.val = PMX_I2S1_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_I2S1_MASK,
+ .val = PMX_I2S1_MASK,
},
};
@@ -418,6 +446,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_CLCD1_MASK,
.val = PMX_CLCD1_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_CLCD1_MASK,
+ .val = PMX_CLCD1_MASK,
},
};
@@ -443,6 +475,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_CLCD2_MASK,
.val = PMX_CLCD2_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_CLCD2_MASK,
+ .val = PMX_CLCD2_MASK,
},
};
@@ -461,7 +497,7 @@
.nmodemuxs = ARRAY_SIZE(clcd_high_res_modemux),
};
-static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res" };
+static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res_grp" };
static struct spear_function clcd_function = {
.name = "clcd",
.groups = clcd_grps,
@@ -479,6 +515,14 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_EGPIO_1_GRP_MASK,
.val = PMX_EGPIO_1_GRP_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_EGPIO_0_GRP_MASK,
+ .val = PMX_EGPIO_0_GRP_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_EGPIO_1_GRP_MASK,
+ .val = PMX_EGPIO_1_GRP_MASK,
},
};
@@ -511,6 +555,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_SMI_MASK,
.val = PMX_SMI_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_SMI_MASK,
+ .val = PMX_SMI_MASK,
},
};
@@ -539,6 +587,14 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK,
.val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_SMI_MASK,
+ .val = PMX_SMI_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK,
+ .val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK,
},
};
@@ -573,6 +629,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_GMII_MASK,
.val = PMX_GMII_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_GMII_MASK,
+ .val = PMX_GMII_MASK,
},
};
@@ -615,6 +675,18 @@
.reg = PAD_FUNCTION_EN_2,
.mask = PMX_RGMII_REG2_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_RGMII_REG0_MASK,
+ .val = PMX_RGMII_REG0_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_RGMII_REG1_MASK,
+ .val = PMX_RGMII_REG1_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_2,
+ .mask = PMX_RGMII_REG2_MASK,
+ .val = PMX_RGMII_REG2_MASK,
},
};
@@ -649,6 +721,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_SMII_0_1_2_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_SMII_0_1_2_MASK,
+ .val = PMX_SMII_0_1_2_MASK,
},
};
@@ -681,6 +757,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_NFCE2_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_NFCE2_MASK,
+ .val = PMX_NFCE2_MASK,
},
};
@@ -721,6 +801,14 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_NAND8BIT_1_MASK,
.val = PMX_NAND8BIT_1_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_NAND8BIT_0_MASK,
+ .val = PMX_NAND8BIT_0_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_NAND8BIT_1_MASK,
+ .val = PMX_NAND8BIT_1_MASK,
},
};
@@ -747,6 +835,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_NAND16BIT_1_MASK,
.val = PMX_NAND16BIT_1_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_NAND16BIT_1_MASK,
+ .val = PMX_NAND16BIT_1_MASK,
},
};
@@ -772,6 +864,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_NAND_4CHIPS_MASK,
.val = PMX_NAND_4CHIPS_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_NAND_4CHIPS_MASK,
+ .val = PMX_NAND_4CHIPS_MASK,
},
};
@@ -833,6 +929,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_KBD_ROWCOL68_MASK,
.val = PMX_KBD_ROWCOL68_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_KBD_ROWCOL68_MASK,
+ .val = PMX_KBD_ROWCOL68_MASK,
},
};
@@ -866,6 +966,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_UART0_MASK,
.val = PMX_UART0_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_UART0_MASK,
+ .val = PMX_UART0_MASK,
},
};
@@ -891,6 +995,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_UART0_MODEM_MASK,
.val = PMX_UART0_MODEM_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_UART0_MODEM_MASK,
+ .val = PMX_UART0_MODEM_MASK,
},
};
@@ -923,6 +1031,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_GPT0_TMR0_MASK,
.val = PMX_GPT0_TMR0_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_GPT0_TMR0_MASK,
+ .val = PMX_GPT0_TMR0_MASK,
},
};
@@ -948,6 +1060,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_GPT0_TMR1_MASK,
.val = PMX_GPT0_TMR1_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_GPT0_TMR1_MASK,
+ .val = PMX_GPT0_TMR1_MASK,
},
};
@@ -980,6 +1096,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_GPT1_TMR0_MASK,
.val = PMX_GPT1_TMR0_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_GPT1_TMR0_MASK,
+ .val = PMX_GPT1_TMR0_MASK,
},
};
@@ -1005,6 +1125,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_GPT1_TMR1_MASK,
.val = PMX_GPT1_TMR1_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_GPT1_TMR1_MASK,
+ .val = PMX_GPT1_TMR1_MASK,
},
};
@@ -1049,6 +1173,20 @@
.reg = PAD_FUNCTION_EN_2, \
.mask = PMX_MCIFALL_2_MASK, \
.val = PMX_MCIFALL_2_MASK, \
+ }, { \
+ .reg = PAD_DIRECTION_SEL_0, \
+ .mask = PMX_MCI_DATA8_15_MASK, \
+ .val = PMX_MCI_DATA8_15_MASK, \
+ }, { \
+ .reg = PAD_DIRECTION_SEL_1, \
+ .mask = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK | \
+ PMX_NFWPRT2_MASK, \
+ .val = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK | \
+ PMX_NFWPRT2_MASK, \
+ }, { \
+ .reg = PAD_DIRECTION_SEL_2, \
+ .mask = PMX_MCIFALL_2_MASK, \
+ .val = PMX_MCIFALL_2_MASK, \
}
/* sdhci device */
@@ -1154,6 +1292,10 @@
.reg = PAD_FUNCTION_EN_2,
.mask = PMX_TOUCH_XY_MASK,
.val = PMX_TOUCH_XY_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_2,
+ .mask = PMX_TOUCH_XY_MASK,
+ .val = PMX_TOUCH_XY_MASK,
},
};
@@ -1187,6 +1329,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_I2C0_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_I2C0_MASK,
+ .val = PMX_I2C0_MASK,
},
};
@@ -1213,6 +1359,12 @@
.mask = PMX_MCIDATA1_MASK |
PMX_MCIDATA2_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_MCIDATA1_MASK |
+ PMX_MCIDATA2_MASK,
+ .val = PMX_MCIDATA1_MASK |
+ PMX_MCIDATA2_MASK,
},
};
@@ -1246,6 +1398,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_I2S0_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_I2S0_MASK,
+ .val = PMX_I2S0_MASK,
},
};
@@ -1278,6 +1434,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_I2S0_MASK | PMX_CLCD1_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_I2S0_MASK | PMX_CLCD1_MASK,
+ .val = PMX_I2S0_MASK | PMX_CLCD1_MASK,
},
};
@@ -1310,6 +1470,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_CLCD1_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_CLCD1_MASK,
+ .val = PMX_CLCD1_MASK,
},
};
@@ -1344,6 +1508,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_CLCD1_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_CLCD1_MASK,
+ .val = PMX_CLCD1_MASK,
},
};
@@ -1376,6 +1544,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_CLCD1_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_CLCD1_MASK,
+ .val = PMX_CLCD1_MASK,
},
};
@@ -1409,6 +1581,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_CLCD1_MASK | PMX_SMI_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_CLCD1_MASK | PMX_SMI_MASK,
+ .val = PMX_CLCD1_MASK | PMX_SMI_MASK,
},
};
@@ -1435,6 +1611,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK,
+ .val = PMX_I2S1_MASK | PMX_MCIDATA3_MASK,
},
};
@@ -1469,6 +1649,10 @@
.reg = PAD_FUNCTION_EN_0,
.mask = PMX_SMI_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_SMI_MASK,
+ .val = PMX_SMI_MASK,
},
};
@@ -1499,6 +1683,14 @@
.reg = PAD_FUNCTION_EN_2,
.mask = PMX_MCIDATA5_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_MCIDATA4_MASK,
+ .val = PMX_MCIDATA4_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_2,
+ .mask = PMX_MCIDATA5_MASK,
+ .val = PMX_MCIDATA5_MASK,
},
};
@@ -1526,6 +1718,12 @@
.mask = PMX_MCIDATA6_MASK |
PMX_MCIDATA7_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_2,
+ .mask = PMX_MCIDATA6_MASK |
+ PMX_MCIDATA7_MASK,
+ .val = PMX_MCIDATA6_MASK |
+ PMX_MCIDATA7_MASK,
},
};
@@ -1560,6 +1758,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_KBD_ROWCOL25_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_KBD_ROWCOL25_MASK,
+ .val = PMX_KBD_ROWCOL25_MASK,
},
};
@@ -1587,6 +1789,12 @@
.mask = PMX_MCIIORDRE_MASK |
PMX_MCIIOWRWE_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_2,
+ .mask = PMX_MCIIORDRE_MASK |
+ PMX_MCIIOWRWE_MASK,
+ .val = PMX_MCIIORDRE_MASK |
+ PMX_MCIIOWRWE_MASK,
},
};
@@ -1613,6 +1821,12 @@
.mask = PMX_MCIRESETCF_MASK |
PMX_MCICS0CE_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_2,
+ .mask = PMX_MCIRESETCF_MASK |
+ PMX_MCICS0CE_MASK,
+ .val = PMX_MCIRESETCF_MASK |
+ PMX_MCICS0CE_MASK,
},
};
@@ -1651,6 +1865,14 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_NFRSTPWDWN3_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_NFRSTPWDWN2_MASK,
+ .val = PMX_NFRSTPWDWN2_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_NFRSTPWDWN3_MASK,
+ .val = PMX_NFRSTPWDWN3_MASK,
},
};
@@ -1677,6 +1899,10 @@
.reg = PAD_FUNCTION_EN_2,
.mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_2,
+ .mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK,
+ .val = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK,
},
};
@@ -1711,6 +1937,10 @@
.reg = PAD_FUNCTION_EN_2,
.mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_2,
+ .mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK,
+ .val = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK,
},
};
@@ -1737,6 +1967,10 @@
.reg = PAD_FUNCTION_EN_1,
.mask = PMX_KBD_ROWCOL25_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_KBD_ROWCOL25_MASK,
+ .val = PMX_KBD_ROWCOL25_MASK,
},
};
@@ -1763,29 +1997,64 @@
.ngroups = ARRAY_SIZE(can1_grps),
};
-/* Pad multiplexing for pci device */
-static const unsigned pci_sata_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18,
+/* Pad multiplexing for (ras-ip) pci device */
+static const unsigned pci_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18,
19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36,
37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54,
55, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99 };
-#define PCI_SATA_MUXREG \
- { \
- .reg = PAD_FUNCTION_EN_0, \
- .mask = PMX_MCI_DATA8_15_MASK, \
- .val = 0, \
- }, { \
- .reg = PAD_FUNCTION_EN_1, \
- .mask = PMX_PCI_REG1_MASK, \
- .val = 0, \
- }, { \
- .reg = PAD_FUNCTION_EN_2, \
- .mask = PMX_PCI_REG2_MASK, \
- .val = 0, \
- }
-/* pad multiplexing for pcie0 device */
+static struct spear_muxreg pci_muxreg[] = {
+ {
+ .reg = PAD_FUNCTION_EN_0,
+ .mask = PMX_MCI_DATA8_15_MASK,
+ .val = 0,
+ }, {
+ .reg = PAD_FUNCTION_EN_1,
+ .mask = PMX_PCI_REG1_MASK,
+ .val = 0,
+ }, {
+ .reg = PAD_FUNCTION_EN_2,
+ .mask = PMX_PCI_REG2_MASK,
+ .val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_0,
+ .mask = PMX_MCI_DATA8_15_MASK,
+ .val = PMX_MCI_DATA8_15_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_PCI_REG1_MASK,
+ .val = PMX_PCI_REG1_MASK,
+ }, {
+ .reg = PAD_DIRECTION_SEL_2,
+ .mask = PMX_PCI_REG2_MASK,
+ .val = PMX_PCI_REG2_MASK,
+ },
+};
+
+static struct spear_modemux pci_modemux[] = {
+ {
+ .muxregs = pci_muxreg,
+ .nmuxregs = ARRAY_SIZE(pci_muxreg),
+ },
+};
+
+static struct spear_pingroup pci_pingroup = {
+ .name = "pci_grp",
+ .pins = pci_pins,
+ .npins = ARRAY_SIZE(pci_pins),
+ .modemuxs = pci_modemux,
+ .nmodemuxs = ARRAY_SIZE(pci_modemux),
+};
+
+static const char *const pci_grps[] = { "pci_grp" };
+static struct spear_function pci_function = {
+ .name = "pci",
+ .groups = pci_grps,
+ .ngroups = ARRAY_SIZE(pci_grps),
+};
+
+/* pad multiplexing for (fix-part) pcie0 device */
static struct spear_muxreg pcie0_muxreg[] = {
- PCI_SATA_MUXREG,
{
.reg = PCIE_SATA_CFG,
.mask = PCIE_CFG_VAL(0),
@@ -1802,15 +2071,12 @@
static struct spear_pingroup pcie0_pingroup = {
.name = "pcie0_grp",
- .pins = pci_sata_pins,
- .npins = ARRAY_SIZE(pci_sata_pins),
.modemuxs = pcie0_modemux,
.nmodemuxs = ARRAY_SIZE(pcie0_modemux),
};
-/* pad multiplexing for pcie1 device */
+/* pad multiplexing for (fix-part) pcie1 device */
static struct spear_muxreg pcie1_muxreg[] = {
- PCI_SATA_MUXREG,
{
.reg = PCIE_SATA_CFG,
.mask = PCIE_CFG_VAL(1),
@@ -1827,15 +2093,12 @@
static struct spear_pingroup pcie1_pingroup = {
.name = "pcie1_grp",
- .pins = pci_sata_pins,
- .npins = ARRAY_SIZE(pci_sata_pins),
.modemuxs = pcie1_modemux,
.nmodemuxs = ARRAY_SIZE(pcie1_modemux),
};
-/* pad multiplexing for pcie2 device */
+/* pad multiplexing for (fix-part) pcie2 device */
static struct spear_muxreg pcie2_muxreg[] = {
- PCI_SATA_MUXREG,
{
.reg = PCIE_SATA_CFG,
.mask = PCIE_CFG_VAL(2),
@@ -1852,22 +2115,20 @@
static struct spear_pingroup pcie2_pingroup = {
.name = "pcie2_grp",
- .pins = pci_sata_pins,
- .npins = ARRAY_SIZE(pci_sata_pins),
.modemuxs = pcie2_modemux,
.nmodemuxs = ARRAY_SIZE(pcie2_modemux),
};
-static const char *const pci_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp" };
-static struct spear_function pci_function = {
- .name = "pci",
- .groups = pci_grps,
- .ngroups = ARRAY_SIZE(pci_grps),
+static const char *const pcie_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp"
+};
+static struct spear_function pcie_function = {
+ .name = "pci_express",
+ .groups = pcie_grps,
+ .ngroups = ARRAY_SIZE(pcie_grps),
};
/* pad multiplexing for sata0 device */
static struct spear_muxreg sata0_muxreg[] = {
- PCI_SATA_MUXREG,
{
.reg = PCIE_SATA_CFG,
.mask = SATA_CFG_VAL(0),
@@ -1884,15 +2145,12 @@
static struct spear_pingroup sata0_pingroup = {
.name = "sata0_grp",
- .pins = pci_sata_pins,
- .npins = ARRAY_SIZE(pci_sata_pins),
.modemuxs = sata0_modemux,
.nmodemuxs = ARRAY_SIZE(sata0_modemux),
};
/* pad multiplexing for sata1 device */
static struct spear_muxreg sata1_muxreg[] = {
- PCI_SATA_MUXREG,
{
.reg = PCIE_SATA_CFG,
.mask = SATA_CFG_VAL(1),
@@ -1909,15 +2167,12 @@
static struct spear_pingroup sata1_pingroup = {
.name = "sata1_grp",
- .pins = pci_sata_pins,
- .npins = ARRAY_SIZE(pci_sata_pins),
.modemuxs = sata1_modemux,
.nmodemuxs = ARRAY_SIZE(sata1_modemux),
};
/* pad multiplexing for sata2 device */
static struct spear_muxreg sata2_muxreg[] = {
- PCI_SATA_MUXREG,
{
.reg = PCIE_SATA_CFG,
.mask = SATA_CFG_VAL(2),
@@ -1934,8 +2189,6 @@
static struct spear_pingroup sata2_pingroup = {
.name = "sata2_grp",
- .pins = pci_sata_pins,
- .npins = ARRAY_SIZE(pci_sata_pins),
.modemuxs = sata2_modemux,
.nmodemuxs = ARRAY_SIZE(sata2_modemux),
};
@@ -1957,6 +2210,14 @@
PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK |
PMX_NFCE2_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_1,
+ .mask = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK |
+ PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK |
+ PMX_NFCE2_MASK,
+ .val = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK |
+ PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK |
+ PMX_NFCE2_MASK,
},
};
@@ -1983,6 +2244,12 @@
.mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK |
PMX_MCICECF_MASK | PMX_MCICEXD_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_2,
+ .mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK |
+ PMX_MCICECF_MASK | PMX_MCICEXD_MASK,
+ .val = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK |
+ PMX_MCICECF_MASK | PMX_MCICEXD_MASK,
},
};
@@ -2017,6 +2284,12 @@
.mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK
| PMX_MCILEDS_MASK,
.val = 0,
+ }, {
+ .reg = PAD_DIRECTION_SEL_2,
+ .mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK
+ | PMX_MCILEDS_MASK,
+ .val = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK
+ | PMX_MCILEDS_MASK,
},
};
@@ -2093,6 +2366,7 @@
&can0_dis_sd_pingroup,
&can1_dis_sd_pingroup,
&can1_dis_kbd_pingroup,
+ &pci_pingroup,
&pcie0_pingroup,
&pcie1_pingroup,
&pcie2_pingroup,
@@ -2138,6 +2412,7 @@
&can0_function,
&can1_function,
&pci_function,
+ &pcie_function,
&sata_function,
&ssp1_function,
&gpt64_function,
diff --git a/drivers/pinctrl/spear/pinctrl-spear1340.c b/drivers/pinctrl/spear/pinctrl-spear1340.c
index a0eb057..0606b8c 100644
--- a/drivers/pinctrl/spear/pinctrl-spear1340.c
+++ b/drivers/pinctrl/spear/pinctrl-spear1340.c
@@ -213,7 +213,7 @@
* Pad multiplexing for making all pads as gpio's. This is done to override the
* values passed from bootloader and start from scratch.
*/
-static const unsigned pads_as_gpio_pins[] = { 251 };
+static const unsigned pads_as_gpio_pins[] = { 12, 88, 89, 251 };
static struct spear_muxreg pads_as_gpio_muxreg[] = {
{
.reg = PAD_FUNCTION_EN_1,
@@ -1692,7 +1692,43 @@
.nmodemuxs = ARRAY_SIZE(clcd_modemux),
};
-static const char *const clcd_grps[] = { "clcd_grp" };
+/* Disable cld runtime to save panel damage */
+static struct spear_muxreg clcd_sleep_muxreg[] = {
+ {
+ .reg = PAD_SHARED_IP_EN_1,
+ .mask = ARM_TRACE_MASK | MIPHY_DBG_MASK,
+ .val = 0,
+ }, {
+ .reg = PAD_FUNCTION_EN_5,
+ .mask = CLCD_REG4_MASK | CLCD_AND_ARM_TRACE_REG4_MASK,
+ .val = 0x0,
+ }, {
+ .reg = PAD_FUNCTION_EN_6,
+ .mask = CLCD_AND_ARM_TRACE_REG5_MASK,
+ .val = 0x0,
+ }, {
+ .reg = PAD_FUNCTION_EN_7,
+ .mask = CLCD_AND_ARM_TRACE_REG6_MASK,
+ .val = 0x0,
+ },
+};
+
+static struct spear_modemux clcd_sleep_modemux[] = {
+ {
+ .muxregs = clcd_sleep_muxreg,
+ .nmuxregs = ARRAY_SIZE(clcd_sleep_muxreg),
+ },
+};
+
+static struct spear_pingroup clcd_sleep_pingroup = {
+ .name = "clcd_sleep_grp",
+ .pins = clcd_pins,
+ .npins = ARRAY_SIZE(clcd_pins),
+ .modemuxs = clcd_sleep_modemux,
+ .nmodemuxs = ARRAY_SIZE(clcd_sleep_modemux),
+};
+
+static const char *const clcd_grps[] = { "clcd_grp", "clcd_sleep_grp" };
static struct spear_function clcd_function = {
.name = "clcd",
.groups = clcd_grps,
@@ -1893,6 +1929,7 @@
&sdhci_pingroup,
&cf_pingroup,
&xd_pingroup,
+ &clcd_sleep_pingroup,
&clcd_pingroup,
&arm_trace_pingroup,
&miphy_dbg_pingroup,
diff --git a/drivers/pinctrl/spear/pinctrl-spear320.c b/drivers/pinctrl/spear/pinctrl-spear320.c
index 020b1e0..ca47b0e 100644
--- a/drivers/pinctrl/spear/pinctrl-spear320.c
+++ b/drivers/pinctrl/spear/pinctrl-spear320.c
@@ -2240,6 +2240,10 @@
.mask = PMX_SSP_CS_MASK,
.val = 0,
}, {
+ .reg = MODE_CONFIG_REG,
+ .mask = PMX_PWM_MASK,
+ .val = PMX_PWM_MASK,
+ }, {
.reg = IP_SEL_PAD_30_39_REG,
.mask = PMX_PL_34_MASK,
.val = PMX_PWM2_PL_34_VAL,
@@ -2956,9 +2960,9 @@
};
/* Pad multiplexing for cadence mii 1_2 as smii or rmii device */
-static const unsigned smii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20,
+static const unsigned rmii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20,
21, 22, 23, 24, 25, 26, 27 };
-static const unsigned rmii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 };
+static const unsigned smii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 };
static struct spear_muxreg mii0_1_muxreg[] = {
{
.reg = PMX_CONFIG_REG,
diff --git a/drivers/pinctrl/spear/pinctrl-spear3xx.h b/drivers/pinctrl/spear/pinctrl-spear3xx.h
index 31f4434..7860b36 100644
--- a/drivers/pinctrl/spear/pinctrl-spear3xx.h
+++ b/drivers/pinctrl/spear/pinctrl-spear3xx.h
@@ -15,6 +15,7 @@
#include "pinctrl-spear.h"
/* pad mux declarations */
+#define PMX_PWM_MASK (1 << 16)
#define PMX_FIRDA_MASK (1 << 14)
#define PMX_I2C_MASK (1 << 13)
#define PMX_SSP_CS_MASK (1 << 12)
diff --git a/drivers/rtc/rtc-mxc.c b/drivers/rtc/rtc-mxc.c
index cd01062..7304139 100644
--- a/drivers/rtc/rtc-mxc.c
+++ b/drivers/rtc/rtc-mxc.c
@@ -17,8 +17,6 @@
#include <linux/platform_device.h>
#include <linux/clk.h>
-#include <mach/hardware.h>
-
#define RTC_INPUT_CLK_32768HZ (0x00 << 5)
#define RTC_INPUT_CLK_32000HZ (0x01 << 5)
#define RTC_INPUT_CLK_38400HZ (0x02 << 5)
@@ -72,14 +70,38 @@
#define RTC_TEST2 0x2C /* 32bit rtc test reg 2 */
#define RTC_TEST3 0x30 /* 32bit rtc test reg 3 */
+enum imx_rtc_type {
+ IMX1_RTC,
+ IMX21_RTC,
+};
+
struct rtc_plat_data {
struct rtc_device *rtc;
void __iomem *ioaddr;
int irq;
struct clk *clk;
struct rtc_time g_rtc_alarm;
+ enum imx_rtc_type devtype;
};
+static struct platform_device_id imx_rtc_devtype[] = {
+ {
+ .name = "imx1-rtc",
+ .driver_data = IMX1_RTC,
+ }, {
+ .name = "imx21-rtc",
+ .driver_data = IMX21_RTC,
+ }, {
+ /* sentinel */
+ }
+};
+MODULE_DEVICE_TABLE(platform, imx_rtc_devtype);
+
+static inline int is_imx1_rtc(struct rtc_plat_data *data)
+{
+ return data->devtype == IMX1_RTC;
+}
+
/*
* This function is used to obtain the RTC time or the alarm value in
* second.
@@ -278,10 +300,13 @@
*/
static int mxc_rtc_set_mmss(struct device *dev, unsigned long time)
{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
+
/*
* TTC_DAYR register is 9-bit in MX1 SoC, save time and day of year only
*/
- if (cpu_is_mx1()) {
+ if (is_imx1_rtc(pdata)) {
struct rtc_time tm;
rtc_time_to_tm(time, &tm);
@@ -360,6 +385,8 @@
if (!pdata)
return -ENOMEM;
+ pdata->devtype = pdev->id_entry->driver_data;
+
if (!devm_request_mem_region(&pdev->dev, res->start,
resource_size(res), pdev->name))
return -EBUSY;
@@ -480,6 +507,7 @@
#endif
.owner = THIS_MODULE,
},
+ .id_table = imx_rtc_devtype,
.probe = mxc_rtc_probe,
.remove = __devexit_p(mxc_rtc_remove),
};
diff --git a/drivers/s390/cio/css.h b/drivers/s390/cio/css.h
index 33bb4d8..4af3dfe 100644
--- a/drivers/s390/cio/css.h
+++ b/drivers/s390/cio/css.h
@@ -112,9 +112,6 @@
extern void css_reiterate_subchannels(void);
void css_update_ssd_info(struct subchannel *sch);
-#define __MAX_SUBCHANNEL 65535
-#define __MAX_SSID 3
-
struct channel_subsystem {
u8 cssid;
int valid;
diff --git a/drivers/s390/cio/device.c b/drivers/s390/cio/device.c
index fc916f5..fd3143c 100644
--- a/drivers/s390/cio/device.c
+++ b/drivers/s390/cio/device.c
@@ -1424,7 +1424,7 @@
}
if (device_is_disconnected(cdev))
return IO_SCH_REPROBE;
- if (cdev->online)
+ if (cdev->online && !cdev->private->flags.resuming)
return IO_SCH_VERIFY;
if (cdev->private->state == DEV_STATE_NOT_OPER)
return IO_SCH_UNREG_ATTACH;
@@ -1469,12 +1469,6 @@
rc = 0;
goto out_unlock;
case IO_SCH_VERIFY:
- if (cdev->private->flags.resuming == 1) {
- if (cio_enable_subchannel(sch, (u32)(addr_t)sch)) {
- ccw_device_set_notoper(cdev);
- break;
- }
- }
/* Trigger path verification. */
io_subchannel_verify(sch);
rc = 0;
diff --git a/drivers/s390/cio/idset.c b/drivers/s390/cio/idset.c
index 199bc67..65d13e3 100644
--- a/drivers/s390/cio/idset.c
+++ b/drivers/s390/cio/idset.c
@@ -125,8 +125,7 @@
void idset_add_set(struct idset *to, struct idset *from)
{
- int len = min(__BITOPS_WORDS(to->num_ssid * to->num_id),
- __BITOPS_WORDS(from->num_ssid * from->num_id));
+ int len = min(to->num_ssid * to->num_id, from->num_ssid * from->num_id);
bitmap_or(to->bitmap, to->bitmap, from->bitmap, len);
}
diff --git a/drivers/scsi/qlogicpti.c b/drivers/scsi/qlogicpti.c
index b191dd5..71fddbc 100644
--- a/drivers/scsi/qlogicpti.c
+++ b/drivers/scsi/qlogicpti.c
@@ -1294,26 +1294,19 @@
static const struct of_device_id qpti_match[];
static int __devinit qpti_sbus_probe(struct platform_device *op)
{
- const struct of_device_id *match;
- struct scsi_host_template *tpnt;
struct device_node *dp = op->dev.of_node;
struct Scsi_Host *host;
struct qlogicpti *qpti;
static int nqptis;
const char *fcode;
- match = of_match_device(qpti_match, &op->dev);
- if (!match)
- return -EINVAL;
- tpnt = match->data;
-
/* Sometimes Antares cards come up not completely
* setup, and we get a report of a zero IRQ.
*/
if (op->archdata.irqs[0] == 0)
return -ENODEV;
- host = scsi_host_alloc(tpnt, sizeof(struct qlogicpti));
+ host = scsi_host_alloc(&qpti_template, sizeof(struct qlogicpti));
if (!host)
return -ENOMEM;
@@ -1445,19 +1438,15 @@
static const struct of_device_id qpti_match[] = {
{
.name = "ptisp",
- .data = &qpti_template,
},
{
.name = "PTI,ptisp",
- .data = &qpti_template,
},
{
.name = "QLGC,isp",
- .data = &qpti_template,
},
{
.name = "SUNW,isp",
- .data = &qpti_template,
},
{},
};
diff --git a/drivers/sh/clk/cpg.c b/drivers/sh/clk/cpg.c
index 07e9fb4..b3dc441 100644
--- a/drivers/sh/clk/cpg.c
+++ b/drivers/sh/clk/cpg.c
@@ -361,3 +361,89 @@
return sh_clk_div_register_ops(clks, nr, table,
&sh_clk_div4_reparent_clk_ops);
}
+
+/* FSI-DIV */
+static unsigned long fsidiv_recalc(struct clk *clk)
+{
+ u32 value;
+
+ value = __raw_readl(clk->mapping->base);
+
+ value >>= 16;
+ if (value < 2)
+ return clk->parent->rate;
+
+ return clk->parent->rate / value;
+}
+
+static long fsidiv_round_rate(struct clk *clk, unsigned long rate)
+{
+ return clk_rate_div_range_round(clk, 1, 0xffff, rate);
+}
+
+static void fsidiv_disable(struct clk *clk)
+{
+ __raw_writel(0, clk->mapping->base);
+}
+
+static int fsidiv_enable(struct clk *clk)
+{
+ u32 value;
+
+ value = __raw_readl(clk->mapping->base) >> 16;
+ if (value < 2)
+ return 0;
+
+ __raw_writel((value << 16) | 0x3, clk->mapping->base);
+
+ return 0;
+}
+
+static int fsidiv_set_rate(struct clk *clk, unsigned long rate)
+{
+ u32 val;
+ int idx;
+
+ idx = (clk->parent->rate / rate) & 0xffff;
+ if (idx < 2)
+ __raw_writel(0, clk->mapping->base);
+ else
+ __raw_writel(idx << 16, clk->mapping->base);
+
+ return 0;
+}
+
+static struct sh_clk_ops fsidiv_clk_ops = {
+ .recalc = fsidiv_recalc,
+ .round_rate = fsidiv_round_rate,
+ .set_rate = fsidiv_set_rate,
+ .enable = fsidiv_enable,
+ .disable = fsidiv_disable,
+};
+
+int __init sh_clk_fsidiv_register(struct clk *clks, int nr)
+{
+ struct clk_mapping *map;
+ int i;
+
+ for (i = 0; i < nr; i++) {
+
+ map = kzalloc(sizeof(struct clk_mapping), GFP_KERNEL);
+ if (!map) {
+ pr_err("%s: unable to alloc memory\n", __func__);
+ return -ENOMEM;
+ }
+
+ /* clks[i].enable_reg came from SH_CLK_FSIDIV() */
+ map->phys = (phys_addr_t)clks[i].enable_reg;
+ map->len = 8;
+
+ clks[i].enable_reg = 0; /* remove .enable_reg */
+ clks[i].ops = &fsidiv_clk_ops;
+ clks[i].mapping = map;
+
+ clk_register(&clks[i]);
+ }
+
+ return 0;
+}
diff --git a/drivers/uio/Kconfig b/drivers/uio/Kconfig
index 6f3ea9b..c48b938 100644
--- a/drivers/uio/Kconfig
+++ b/drivers/uio/Kconfig
@@ -97,6 +97,7 @@
config UIO_PRUSS
tristate "Texas Instruments PRUSS driver"
depends on ARCH_DAVINCI_DA850
+ select GENERIC_ALLOCATOR
help
PRUSS driver for OMAPL138/DA850/AM18XX devices
PRUSS driver requires user space components, examples and user space
diff --git a/drivers/uio/uio_pruss.c b/drivers/uio/uio_pruss.c
index 33a7a27..f8738de 100644
--- a/drivers/uio/uio_pruss.c
+++ b/drivers/uio/uio_pruss.c
@@ -25,7 +25,7 @@
#include <linux/clk.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
-#include <mach/sram.h>
+#include <linux/genalloc.h>
#define DRV_NAME "pruss_uio"
#define DRV_VERSION "1.0"
@@ -65,10 +65,11 @@
dma_addr_t sram_paddr;
dma_addr_t ddr_paddr;
void __iomem *prussio_vaddr;
- void *sram_vaddr;
+ unsigned long sram_vaddr;
void *ddr_vaddr;
unsigned int hostirq_start;
unsigned int pintc_base;
+ struct gen_pool *sram_pool;
};
static irqreturn_t pruss_handler(int irq, struct uio_info *info)
@@ -106,7 +107,9 @@
gdev->ddr_paddr);
}
if (gdev->sram_vaddr)
- sram_free(gdev->sram_vaddr, sram_pool_sz);
+ gen_pool_free(gdev->sram_pool,
+ gdev->sram_vaddr,
+ sram_pool_sz);
kfree(gdev->info);
clk_put(gdev->pruss_clk);
kfree(gdev);
@@ -152,10 +155,17 @@
goto out_free;
}
- gdev->sram_vaddr = sram_alloc(sram_pool_sz, &(gdev->sram_paddr));
- if (!gdev->sram_vaddr) {
- dev_err(&dev->dev, "Could not allocate SRAM pool\n");
- goto out_free;
+ if (pdata->sram_pool) {
+ gdev->sram_pool = pdata->sram_pool;
+ gdev->sram_vaddr =
+ gen_pool_alloc(gdev->sram_pool, sram_pool_sz);
+ if (!gdev->sram_vaddr) {
+ dev_err(&dev->dev, "Could not allocate SRAM pool\n");
+ goto out_free;
+ }
+ gdev->sram_paddr =
+ gen_pool_virt_to_phys(gdev->sram_pool,
+ gdev->sram_vaddr);
}
gdev->ddr_vaddr = dma_alloc_coherent(&dev->dev, extram_pool_sz,
diff --git a/drivers/usb/gadget/u_ether.c b/drivers/usb/gadget/u_ether.c
index 6458764..4ec3c0d 100644
--- a/drivers/usb/gadget/u_ether.c
+++ b/drivers/usb/gadget/u_ether.c
@@ -20,6 +20,7 @@
#include <linux/ctype.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
+#include <linux/if_vlan.h>
#include "u_ether.h"
@@ -295,7 +296,7 @@
while (skb2) {
if (status < 0
|| ETH_HLEN > skb2->len
- || skb2->len > ETH_FRAME_LEN) {
+ || skb2->len > VLAN_ETH_FRAME_LEN) {
dev->net->stats.rx_errors++;
dev->net->stats.rx_length_errors++;
DBG(dev, "rx length %d\n", skb2->len);
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index 4a08fc0..8e58a5f 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -24,7 +24,6 @@
#include <linux/usb/ulpi.h>
#include <linux/slab.h>
-#include <mach/hardware.h>
#include <linux/platform_data/usb-ehci-mxc.h>
#include <asm/mach-types.h>
diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c
index cf2688d..e501dbc 100644
--- a/drivers/video/imxfb.c
+++ b/drivers/video/imxfb.c
@@ -33,7 +33,6 @@
#include <linux/math64.h>
#include <linux/platform_data/video-imxfb.h>
-#include <mach/hardware.h>
/*
* Complain if VAR is out of range.
@@ -53,8 +52,8 @@
#define LCDC_SIZE 0x04
#define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20)
-#define YMAX_MASK (cpu_is_mx1() ? 0x1ff : 0x3ff)
-#define SIZE_YMAX(y) ((y) & YMAX_MASK)
+#define YMAX_MASK_IMX1 0x1ff
+#define YMAX_MASK_IMX21 0x3ff
#define LCDC_VPW 0x08
#define VPW_VPW(x) ((x) & 0x3ff)
@@ -128,12 +127,18 @@
struct fb_bitfield transp;
};
+enum imxfb_type {
+ IMX1_FB,
+ IMX21_FB,
+};
+
struct imxfb_info {
struct platform_device *pdev;
void __iomem *regs;
struct clk *clk_ipg;
struct clk *clk_ahb;
struct clk *clk_per;
+ enum imxfb_type devtype;
/*
* These are the addresses we mapped
@@ -168,6 +173,24 @@
void (*backlight_power)(int);
};
+static struct platform_device_id imxfb_devtype[] = {
+ {
+ .name = "imx1-fb",
+ .driver_data = IMX1_FB,
+ }, {
+ .name = "imx21-fb",
+ .driver_data = IMX21_FB,
+ }, {
+ /* sentinel */
+ }
+};
+MODULE_DEVICE_TABLE(platform, imxfb_devtype);
+
+static inline int is_imx1_fb(struct imxfb_info *fbi)
+{
+ return fbi->devtype == IMX1_FB;
+}
+
#define IMX_NAME "IMX"
/*
@@ -366,7 +389,7 @@
break;
case 16:
default:
- if (cpu_is_mx1())
+ if (is_imx1_fb(fbi))
pcr |= PCR_BPIX_12;
else
pcr |= PCR_BPIX_16;
@@ -596,6 +619,7 @@
static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info)
{
struct imxfb_info *fbi = info->par;
+ u32 ymax_mask = is_imx1_fb(fbi) ? YMAX_MASK_IMX1 : YMAX_MASK_IMX21;
pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n",
var->xres, var->hsync_len,
@@ -617,7 +641,7 @@
if (var->right_margin > 255)
printk(KERN_ERR "%s: invalid right_margin %d\n",
info->fix.id, var->right_margin);
- if (var->yres < 1 || var->yres > YMAX_MASK)
+ if (var->yres < 1 || var->yres > ymax_mask)
printk(KERN_ERR "%s: invalid yres %d\n",
info->fix.id, var->yres);
if (var->vsync_len > 100)
@@ -645,7 +669,7 @@
VCR_V_WAIT_2(var->upper_margin),
fbi->regs + LCDC_VCR);
- writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres),
+ writel(SIZE_XMAX(var->xres) | (var->yres & ymax_mask),
fbi->regs + LCDC_SIZE);
writel(fbi->pcr, fbi->regs + LCDC_PCR);
@@ -765,6 +789,7 @@
return -ENOMEM;
fbi = info->par;
+ fbi->devtype = pdev->id_entry->driver_data;
if (!fb_mode)
fb_mode = pdata->mode[0].mode.name;
@@ -939,6 +964,7 @@
.driver = {
.name = DRIVER_NAME,
},
+ .id_table = imxfb_devtype,
};
static int imxfb_setup(void)
diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c
index ce1d452..7368872 100644
--- a/drivers/video/mx3fb.c
+++ b/drivers/video/mx3fb.c
@@ -26,10 +26,9 @@
#include <linux/console.h>
#include <linux/clk.h>
#include <linux/mutex.h>
+#include <linux/dma/ipu-dma.h>
#include <linux/platform_data/dma-imx.h>
-#include <mach/hardware.h>
-#include <mach/ipu.h>
#include <linux/platform_data/video-mx3fb.h>
#include <asm/io.h>
diff --git a/drivers/virtio/virtio.c b/drivers/virtio/virtio.c
index 1e8659c..809b0de 100644
--- a/drivers/virtio/virtio.c
+++ b/drivers/virtio/virtio.c
@@ -225,8 +225,10 @@
void unregister_virtio_device(struct virtio_device *dev)
{
+ int index = dev->index; /* save for after device release */
+
device_unregister(&dev->dev);
- ida_simple_remove(&virtio_index_ida, dev->index);
+ ida_simple_remove(&virtio_index_ida, index);
}
EXPORT_SYMBOL_GPL(unregister_virtio_device);
diff --git a/drivers/watchdog/imx2_wdt.c b/drivers/watchdog/imx2_wdt.c
index bcfab2b..9a45d029 100644
--- a/drivers/watchdog/imx2_wdt.c
+++ b/drivers/watchdog/imx2_wdt.c
@@ -33,7 +33,6 @@
#include <linux/uaccess.h>
#include <linux/timer.h>
#include <linux/jiffies.h>
-#include <mach/hardware.h>
#define DRIVER_NAME "imx2-wdt"
diff --git a/drivers/xen/Makefile b/drivers/xen/Makefile
index 0e863703..7435470 100644
--- a/drivers/xen/Makefile
+++ b/drivers/xen/Makefile
@@ -2,6 +2,7 @@
obj-y += manage.o balloon.o
obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o
endif
+obj-$(CONFIG_X86) += fallback.o
obj-y += grant-table.o features.o events.o
obj-y += xenbus/
diff --git a/drivers/xen/events.c b/drivers/xen/events.c
index 912ac81..0be4df3 100644
--- a/drivers/xen/events.c
+++ b/drivers/xen/events.c
@@ -1395,10 +1395,10 @@
{
struct pt_regs *old_regs = set_irq_regs(regs);
+ irq_enter();
#ifdef CONFIG_X86
exit_idle();
#endif
- irq_enter();
__xen_evtchn_do_upcall();
diff --git a/drivers/xen/fallback.c b/drivers/xen/fallback.c
new file mode 100644
index 0000000..0ef7c4d
--- /dev/null
+++ b/drivers/xen/fallback.c
@@ -0,0 +1,80 @@
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/bug.h>
+#include <linux/export.h>
+#include <asm/hypervisor.h>
+#include <asm/xen/hypercall.h>
+
+int xen_event_channel_op_compat(int cmd, void *arg)
+{
+ struct evtchn_op op;
+ int rc;
+
+ op.cmd = cmd;
+ memcpy(&op.u, arg, sizeof(op.u));
+ rc = _hypercall1(int, event_channel_op_compat, &op);
+
+ switch (cmd) {
+ case EVTCHNOP_close:
+ case EVTCHNOP_send:
+ case EVTCHNOP_bind_vcpu:
+ case EVTCHNOP_unmask:
+ /* no output */
+ break;
+
+#define COPY_BACK(eop) \
+ case EVTCHNOP_##eop: \
+ memcpy(arg, &op.u.eop, sizeof(op.u.eop)); \
+ break
+
+ COPY_BACK(bind_interdomain);
+ COPY_BACK(bind_virq);
+ COPY_BACK(bind_pirq);
+ COPY_BACK(status);
+ COPY_BACK(alloc_unbound);
+ COPY_BACK(bind_ipi);
+#undef COPY_BACK
+
+ default:
+ WARN_ON(rc != -ENOSYS);
+ break;
+ }
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(xen_event_channel_op_compat);
+
+int HYPERVISOR_physdev_op_compat(int cmd, void *arg)
+{
+ struct physdev_op op;
+ int rc;
+
+ op.cmd = cmd;
+ memcpy(&op.u, arg, sizeof(op.u));
+ rc = _hypercall1(int, physdev_op_compat, &op);
+
+ switch (cmd) {
+ case PHYSDEVOP_IRQ_UNMASK_NOTIFY:
+ case PHYSDEVOP_set_iopl:
+ case PHYSDEVOP_set_iobitmap:
+ case PHYSDEVOP_apic_write:
+ /* no output */
+ break;
+
+#define COPY_BACK(pop, fld) \
+ case PHYSDEVOP_##pop: \
+ memcpy(arg, &op.u.fld, sizeof(op.u.fld)); \
+ break
+
+ COPY_BACK(irq_status_query, irq_status_query);
+ COPY_BACK(apic_read, apic_op);
+ COPY_BACK(ASSIGN_VECTOR, irq_op);
+#undef COPY_BACK
+
+ default:
+ WARN_ON(rc != -ENOSYS);
+ break;
+ }
+
+ return rc;
+}
diff --git a/fs/cifs/cifsacl.c b/fs/cifs/cifsacl.c
index fc783e2..0fb15bb 100644
--- a/fs/cifs/cifsacl.c
+++ b/fs/cifs/cifsacl.c
@@ -225,6 +225,13 @@
}
static void
+cifs_copy_sid(struct cifs_sid *dst, const struct cifs_sid *src)
+{
+ memcpy(dst, src, sizeof(*dst));
+ dst->num_subauth = min_t(u8, src->num_subauth, NUM_SUBAUTHS);
+}
+
+static void
id_rb_insert(struct rb_root *root, struct cifs_sid *sidptr,
struct cifs_sid_id **psidid, char *typestr)
{
@@ -248,7 +255,7 @@
}
}
- memcpy(&(*psidid)->sid, sidptr, sizeof(struct cifs_sid));
+ cifs_copy_sid(&(*psidid)->sid, sidptr);
(*psidid)->time = jiffies - (SID_MAP_RETRY + 1);
(*psidid)->refcount = 0;
@@ -354,7 +361,7 @@
* any fields of the node after a reference is put .
*/
if (test_bit(SID_ID_MAPPED, &psidid->state)) {
- memcpy(ssid, &psidid->sid, sizeof(struct cifs_sid));
+ cifs_copy_sid(ssid, &psidid->sid);
psidid->time = jiffies; /* update ts for accessing */
goto id_sid_out;
}
@@ -370,14 +377,14 @@
if (IS_ERR(sidkey)) {
rc = -EINVAL;
cFYI(1, "%s: Can't map and id to a SID", __func__);
+ } else if (sidkey->datalen < sizeof(struct cifs_sid)) {
+ rc = -EIO;
+ cFYI(1, "%s: Downcall contained malformed key "
+ "(datalen=%hu)", __func__, sidkey->datalen);
} else {
lsid = (struct cifs_sid *)sidkey->payload.data;
- memcpy(&psidid->sid, lsid,
- sidkey->datalen < sizeof(struct cifs_sid) ?
- sidkey->datalen : sizeof(struct cifs_sid));
- memcpy(ssid, &psidid->sid,
- sidkey->datalen < sizeof(struct cifs_sid) ?
- sidkey->datalen : sizeof(struct cifs_sid));
+ cifs_copy_sid(&psidid->sid, lsid);
+ cifs_copy_sid(ssid, &psidid->sid);
set_bit(SID_ID_MAPPED, &psidid->state);
key_put(sidkey);
kfree(psidid->sidstr);
@@ -396,7 +403,7 @@
return rc;
}
if (test_bit(SID_ID_MAPPED, &psidid->state))
- memcpy(ssid, &psidid->sid, sizeof(struct cifs_sid));
+ cifs_copy_sid(ssid, &psidid->sid);
else
rc = -EINVAL;
}
@@ -675,8 +682,6 @@
static void copy_sec_desc(const struct cifs_ntsd *pntsd,
struct cifs_ntsd *pnntsd, __u32 sidsoffset)
{
- int i;
-
struct cifs_sid *owner_sid_ptr, *group_sid_ptr;
struct cifs_sid *nowner_sid_ptr, *ngroup_sid_ptr;
@@ -692,26 +697,14 @@
owner_sid_ptr = (struct cifs_sid *)((char *)pntsd +
le32_to_cpu(pntsd->osidoffset));
nowner_sid_ptr = (struct cifs_sid *)((char *)pnntsd + sidsoffset);
-
- nowner_sid_ptr->revision = owner_sid_ptr->revision;
- nowner_sid_ptr->num_subauth = owner_sid_ptr->num_subauth;
- for (i = 0; i < 6; i++)
- nowner_sid_ptr->authority[i] = owner_sid_ptr->authority[i];
- for (i = 0; i < 5; i++)
- nowner_sid_ptr->sub_auth[i] = owner_sid_ptr->sub_auth[i];
+ cifs_copy_sid(nowner_sid_ptr, owner_sid_ptr);
/* copy group sid */
group_sid_ptr = (struct cifs_sid *)((char *)pntsd +
le32_to_cpu(pntsd->gsidoffset));
ngroup_sid_ptr = (struct cifs_sid *)((char *)pnntsd + sidsoffset +
sizeof(struct cifs_sid));
-
- ngroup_sid_ptr->revision = group_sid_ptr->revision;
- ngroup_sid_ptr->num_subauth = group_sid_ptr->num_subauth;
- for (i = 0; i < 6; i++)
- ngroup_sid_ptr->authority[i] = group_sid_ptr->authority[i];
- for (i = 0; i < 5; i++)
- ngroup_sid_ptr->sub_auth[i] = group_sid_ptr->sub_auth[i];
+ cifs_copy_sid(ngroup_sid_ptr, group_sid_ptr);
return;
}
@@ -1120,8 +1113,7 @@
kfree(nowner_sid_ptr);
return rc;
}
- memcpy(owner_sid_ptr, nowner_sid_ptr,
- sizeof(struct cifs_sid));
+ cifs_copy_sid(owner_sid_ptr, nowner_sid_ptr);
kfree(nowner_sid_ptr);
*aclflag = CIFS_ACL_OWNER;
}
@@ -1139,8 +1131,7 @@
kfree(ngroup_sid_ptr);
return rc;
}
- memcpy(group_sid_ptr, ngroup_sid_ptr,
- sizeof(struct cifs_sid));
+ cifs_copy_sid(group_sid_ptr, ngroup_sid_ptr);
kfree(ngroup_sid_ptr);
*aclflag = CIFS_ACL_GROUP;
}
diff --git a/fs/cifs/dir.c b/fs/cifs/dir.c
index 7c0a812..d3671f2 100644
--- a/fs/cifs/dir.c
+++ b/fs/cifs/dir.c
@@ -398,7 +398,16 @@
* in network traffic in the other paths.
*/
if (!(oflags & O_CREAT)) {
- struct dentry *res = cifs_lookup(inode, direntry, 0);
+ struct dentry *res;
+
+ /*
+ * Check for hashed negative dentry. We have already revalidated
+ * the dentry and it is fine. No need to perform another lookup.
+ */
+ if (!d_unhashed(direntry))
+ return -ENOENT;
+
+ res = cifs_lookup(inode, direntry, 0);
if (IS_ERR(res))
return PTR_ERR(res);
diff --git a/fs/eventpoll.c b/fs/eventpoll.c
index da72250..cd96649 100644
--- a/fs/eventpoll.c
+++ b/fs/eventpoll.c
@@ -346,7 +346,7 @@
/* Tells if the epoll_ctl(2) operation needs an event copy from userspace */
static inline int ep_op_has_event(int op)
{
- return op == EPOLL_CTL_ADD || op == EPOLL_CTL_MOD;
+ return op != EPOLL_CTL_DEL;
}
/* Initialize the poll safe wake up structure */
@@ -676,34 +676,6 @@
return 0;
}
-/*
- * Disables a "struct epitem" in the eventpoll set. Returns -EBUSY if the item
- * had no event flags set, indicating that another thread may be currently
- * handling that item's events (in the case that EPOLLONESHOT was being
- * used). Otherwise a zero result indicates that the item has been disabled
- * from receiving events. A disabled item may be re-enabled via
- * EPOLL_CTL_MOD. Must be called with "mtx" held.
- */
-static int ep_disable(struct eventpoll *ep, struct epitem *epi)
-{
- int result = 0;
- unsigned long flags;
-
- spin_lock_irqsave(&ep->lock, flags);
- if (epi->event.events & ~EP_PRIVATE_BITS) {
- if (ep_is_linked(&epi->rdllink))
- list_del_init(&epi->rdllink);
- /* Ensure ep_poll_callback will not add epi back onto ready
- list: */
- epi->event.events &= EP_PRIVATE_BITS;
- }
- else
- result = -EBUSY;
- spin_unlock_irqrestore(&ep->lock, flags);
-
- return result;
-}
-
static void ep_free(struct eventpoll *ep)
{
struct rb_node *rbp;
@@ -1048,6 +1020,8 @@
rb_insert_color(&epi->rbn, &ep->rbr);
}
+
+
#define PATH_ARR_SIZE 5
/*
* These are the number paths of length 1 to 5, that we are allowing to emanate
@@ -1813,12 +1787,6 @@
} else
error = -ENOENT;
break;
- case EPOLL_CTL_DISABLE:
- if (epi)
- error = ep_disable(ep, epi);
- else
- error = -ENOENT;
- break;
}
mutex_unlock(&ep->mtx);
diff --git a/fs/gfs2/file.c b/fs/gfs2/file.c
index 0def050..e056b4c 100644
--- a/fs/gfs2/file.c
+++ b/fs/gfs2/file.c
@@ -516,15 +516,13 @@
struct gfs2_holder i_gh;
int error;
- gfs2_holder_init(ip->i_gl, LM_ST_SHARED, LM_FLAG_ANY, &i_gh);
- error = gfs2_glock_nq(&i_gh);
- if (error == 0) {
- file_accessed(file);
- gfs2_glock_dq(&i_gh);
- }
- gfs2_holder_uninit(&i_gh);
+ error = gfs2_glock_nq_init(ip->i_gl, LM_ST_SHARED, LM_FLAG_ANY,
+ &i_gh);
if (error)
return error;
+ /* grab lock to update inode */
+ gfs2_glock_dq_uninit(&i_gh);
+ file_accessed(file);
}
vma->vm_ops = &gfs2_vm_ops;
@@ -677,10 +675,8 @@
size_t writesize = iov_length(iov, nr_segs);
struct dentry *dentry = file->f_dentry;
struct gfs2_inode *ip = GFS2_I(dentry->d_inode);
- struct gfs2_sbd *sdp;
int ret;
- sdp = GFS2_SB(file->f_mapping->host);
ret = gfs2_rs_alloc(ip);
if (ret)
return ret;
diff --git a/fs/gfs2/lops.c b/fs/gfs2/lops.c
index 8ff95a2..9ceccb1 100644
--- a/fs/gfs2/lops.c
+++ b/fs/gfs2/lops.c
@@ -393,12 +393,10 @@
struct gfs2_meta_header *mh;
struct gfs2_trans *tr;
- lock_buffer(bd->bd_bh);
- gfs2_log_lock(sdp);
tr = current->journal_info;
tr->tr_touched = 1;
if (!list_empty(&bd->bd_list))
- goto out;
+ return;
set_bit(GLF_LFLUSH, &bd->bd_gl->gl_flags);
set_bit(GLF_DIRTY, &bd->bd_gl->gl_flags);
mh = (struct gfs2_meta_header *)bd->bd_bh->b_data;
@@ -414,9 +412,6 @@
sdp->sd_log_num_buf++;
list_add(&bd->bd_list, &sdp->sd_log_le_buf);
tr->tr_num_buf_new++;
-out:
- gfs2_log_unlock(sdp);
- unlock_buffer(bd->bd_bh);
}
static void gfs2_check_magic(struct buffer_head *bh)
@@ -621,7 +616,6 @@
static void revoke_lo_before_commit(struct gfs2_sbd *sdp)
{
- struct gfs2_log_descriptor *ld;
struct gfs2_meta_header *mh;
unsigned int offset;
struct list_head *head = &sdp->sd_log_le_revoke;
@@ -634,7 +628,6 @@
length = gfs2_struct2blk(sdp, sdp->sd_log_num_revoke, sizeof(u64));
page = gfs2_get_log_desc(sdp, GFS2_LOG_DESC_REVOKE, length, sdp->sd_log_num_revoke);
- ld = page_address(page);
offset = sizeof(struct gfs2_log_descriptor);
list_for_each_entry(bd, head, bd_list) {
@@ -777,12 +770,10 @@
struct address_space *mapping = bd->bd_bh->b_page->mapping;
struct gfs2_inode *ip = GFS2_I(mapping->host);
- lock_buffer(bd->bd_bh);
- gfs2_log_lock(sdp);
if (tr)
tr->tr_touched = 1;
if (!list_empty(&bd->bd_list))
- goto out;
+ return;
set_bit(GLF_LFLUSH, &bd->bd_gl->gl_flags);
set_bit(GLF_DIRTY, &bd->bd_gl->gl_flags);
if (gfs2_is_jdata(ip)) {
@@ -793,9 +784,6 @@
} else {
list_add_tail(&bd->bd_list, &sdp->sd_log_le_ordered);
}
-out:
- gfs2_log_unlock(sdp);
- unlock_buffer(bd->bd_bh);
}
/**
diff --git a/fs/gfs2/quota.c b/fs/gfs2/quota.c
index 40c4b0d..c5af8e1 100644
--- a/fs/gfs2/quota.c
+++ b/fs/gfs2/quota.c
@@ -497,8 +497,11 @@
struct gfs2_quota_data **qd;
int error;
- if (ip->i_res == NULL)
- gfs2_rs_alloc(ip);
+ if (ip->i_res == NULL) {
+ error = gfs2_rs_alloc(ip);
+ if (error)
+ return error;
+ }
qd = ip->i_res->rs_qa_qd;
diff --git a/fs/gfs2/rgrp.c b/fs/gfs2/rgrp.c
index 3cc402c..38fe18f 100644
--- a/fs/gfs2/rgrp.c
+++ b/fs/gfs2/rgrp.c
@@ -553,7 +553,6 @@
*/
int gfs2_rs_alloc(struct gfs2_inode *ip)
{
- int error = 0;
struct gfs2_blkreserv *res;
if (ip->i_res)
@@ -561,7 +560,7 @@
res = kmem_cache_zalloc(gfs2_rsrv_cachep, GFP_NOFS);
if (!res)
- error = -ENOMEM;
+ return -ENOMEM;
RB_CLEAR_NODE(&res->rs_node);
@@ -571,7 +570,7 @@
else
ip->i_res = res;
up_write(&ip->i_rw_mutex);
- return error;
+ return 0;
}
static void dump_rs(struct seq_file *seq, const struct gfs2_blkreserv *rs)
@@ -1263,7 +1262,9 @@
int ret = 0;
u64 amt;
u64 trimmed = 0;
+ u64 start, end, minlen;
unsigned int x;
+ unsigned bs_shift = sdp->sd_sb.sb_bsize_shift;
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
@@ -1271,19 +1272,25 @@
if (!blk_queue_discard(q))
return -EOPNOTSUPP;
- if (argp == NULL) {
- r.start = 0;
- r.len = ULLONG_MAX;
- r.minlen = 0;
- } else if (copy_from_user(&r, argp, sizeof(r)))
+ if (copy_from_user(&r, argp, sizeof(r)))
return -EFAULT;
ret = gfs2_rindex_update(sdp);
if (ret)
return ret;
- rgd = gfs2_blk2rgrpd(sdp, r.start, 0);
- rgd_end = gfs2_blk2rgrpd(sdp, r.start + r.len, 0);
+ start = r.start >> bs_shift;
+ end = start + (r.len >> bs_shift);
+ minlen = max_t(u64, r.minlen,
+ q->limits.discard_granularity) >> bs_shift;
+
+ rgd = gfs2_blk2rgrpd(sdp, start, 0);
+ rgd_end = gfs2_blk2rgrpd(sdp, end - 1, 0);
+
+ if (end <= start ||
+ minlen > sdp->sd_max_rg_data ||
+ start > rgd_end->rd_data0 + rgd_end->rd_data)
+ return -EINVAL;
while (1) {
@@ -1295,7 +1302,9 @@
/* Trim each bitmap in the rgrp */
for (x = 0; x < rgd->rd_length; x++) {
struct gfs2_bitmap *bi = rgd->rd_bits + x;
- ret = gfs2_rgrp_send_discards(sdp, rgd->rd_data0, NULL, bi, r.minlen, &amt);
+ ret = gfs2_rgrp_send_discards(sdp,
+ rgd->rd_data0, NULL, bi, minlen,
+ &amt);
if (ret) {
gfs2_glock_dq_uninit(&gh);
goto out;
@@ -1324,7 +1333,7 @@
out:
r.len = trimmed << 9;
- if (argp && copy_to_user(argp, &r, sizeof(r)))
+ if (copy_to_user(argp, &r, sizeof(r)))
return -EFAULT;
return ret;
diff --git a/fs/gfs2/super.c b/fs/gfs2/super.c
index bc73726..d648867 100644
--- a/fs/gfs2/super.c
+++ b/fs/gfs2/super.c
@@ -810,7 +810,8 @@
return;
}
need_unlock = 1;
- }
+ } else if (WARN_ON_ONCE(ip->i_gl->gl_state != LM_ST_EXCLUSIVE))
+ return;
if (current->journal_info == NULL) {
ret = gfs2_trans_begin(sdp, RES_DINODE, 0);
diff --git a/fs/gfs2/trans.c b/fs/gfs2/trans.c
index adbd278..4136270 100644
--- a/fs/gfs2/trans.c
+++ b/fs/gfs2/trans.c
@@ -155,14 +155,22 @@
struct gfs2_sbd *sdp = gl->gl_sbd;
struct gfs2_bufdata *bd;
+ lock_buffer(bh);
+ gfs2_log_lock(sdp);
bd = bh->b_private;
if (bd)
gfs2_assert(sdp, bd->bd_gl == gl);
else {
+ gfs2_log_unlock(sdp);
+ unlock_buffer(bh);
gfs2_attach_bufdata(gl, bh, meta);
bd = bh->b_private;
+ lock_buffer(bh);
+ gfs2_log_lock(sdp);
}
lops_add(sdp, bd);
+ gfs2_log_unlock(sdp);
+ unlock_buffer(bh);
}
void gfs2_trans_add_revoke(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd)
diff --git a/fs/notify/fanotify/fanotify.c b/fs/notify/fanotify/fanotify.c
index f35794b..a506360 100644
--- a/fs/notify/fanotify/fanotify.c
+++ b/fs/notify/fanotify/fanotify.c
@@ -21,6 +21,7 @@
if ((old->path.mnt == new->path.mnt) &&
(old->path.dentry == new->path.dentry))
return true;
+ break;
case (FSNOTIFY_EVENT_NONE):
return true;
default:
diff --git a/fs/xfs/xfs_alloc.c b/fs/xfs/xfs_alloc.c
index 4f33c32..335206a 100644
--- a/fs/xfs/xfs_alloc.c
+++ b/fs/xfs/xfs_alloc.c
@@ -1866,6 +1866,7 @@
/*
* Initialize the args structure.
*/
+ memset(&targs, 0, sizeof(targs));
targs.tp = tp;
targs.mp = mp;
targs.agbp = agbp;
@@ -2207,7 +2208,7 @@
* group or loop over the allocation groups to find the result.
*/
int /* error */
-__xfs_alloc_vextent(
+xfs_alloc_vextent(
xfs_alloc_arg_t *args) /* allocation argument structure */
{
xfs_agblock_t agsize; /* allocation group size */
@@ -2417,46 +2418,6 @@
return error;
}
-static void
-xfs_alloc_vextent_worker(
- struct work_struct *work)
-{
- struct xfs_alloc_arg *args = container_of(work,
- struct xfs_alloc_arg, work);
- unsigned long pflags;
-
- /* we are in a transaction context here */
- current_set_flags_nested(&pflags, PF_FSTRANS);
-
- args->result = __xfs_alloc_vextent(args);
- complete(args->done);
-
- current_restore_flags_nested(&pflags, PF_FSTRANS);
-}
-
-/*
- * Data allocation requests often come in with little stack to work on. Push
- * them off to a worker thread so there is lots of stack to use. Metadata
- * requests, OTOH, are generally from low stack usage paths, so avoid the
- * context switch overhead here.
- */
-int
-xfs_alloc_vextent(
- struct xfs_alloc_arg *args)
-{
- DECLARE_COMPLETION_ONSTACK(done);
-
- if (!args->userdata)
- return __xfs_alloc_vextent(args);
-
-
- args->done = &done;
- INIT_WORK_ONSTACK(&args->work, xfs_alloc_vextent_worker);
- queue_work(xfs_alloc_wq, &args->work);
- wait_for_completion(&done);
- return args->result;
-}
-
/*
* Free an extent.
* Just break up the extent address and hand off to xfs_free_ag_extent
diff --git a/fs/xfs/xfs_alloc.h b/fs/xfs/xfs_alloc.h
index 93be4a6..feacb06 100644
--- a/fs/xfs/xfs_alloc.h
+++ b/fs/xfs/xfs_alloc.h
@@ -120,9 +120,6 @@
char isfl; /* set if is freelist blocks - !acctg */
char userdata; /* set if this is user data */
xfs_fsblock_t firstblock; /* io first block allocated */
- struct completion *done;
- struct work_struct work;
- int result;
} xfs_alloc_arg_t;
/*
diff --git a/fs/xfs/xfs_alloc_btree.c b/fs/xfs/xfs_alloc_btree.c
index f1647ca..f7876c6 100644
--- a/fs/xfs/xfs_alloc_btree.c
+++ b/fs/xfs/xfs_alloc_btree.c
@@ -121,6 +121,8 @@
xfs_extent_busy_insert(cur->bc_tp, be32_to_cpu(agf->agf_seqno), bno, 1,
XFS_EXTENT_BUSY_SKIP_DISCARD);
xfs_trans_agbtree_delta(cur->bc_tp, -1);
+
+ xfs_trans_binval(cur->bc_tp, bp);
return 0;
}
diff --git a/fs/xfs/xfs_bmap.c b/fs/xfs/xfs_bmap.c
index 848ffa77..83d0cf3 100644
--- a/fs/xfs/xfs_bmap.c
+++ b/fs/xfs/xfs_bmap.c
@@ -2437,6 +2437,7 @@
* Normal allocation, done through xfs_alloc_vextent.
*/
tryagain = isaligned = 0;
+ memset(&args, 0, sizeof(args));
args.tp = ap->tp;
args.mp = mp;
args.fsbno = ap->blkno;
@@ -3082,6 +3083,7 @@
* Convert to a btree with two levels, one record in root.
*/
XFS_IFORK_FMT_SET(ip, whichfork, XFS_DINODE_FMT_BTREE);
+ memset(&args, 0, sizeof(args));
args.tp = tp;
args.mp = mp;
args.firstblock = *firstblock;
@@ -3237,6 +3239,7 @@
xfs_buf_t *bp; /* buffer for extent block */
xfs_bmbt_rec_host_t *ep;/* extent record pointer */
+ memset(&args, 0, sizeof(args));
args.tp = tp;
args.mp = ip->i_mount;
args.firstblock = *firstblock;
@@ -4616,12 +4619,11 @@
STATIC int
-xfs_bmapi_allocate(
- struct xfs_bmalloca *bma,
- int flags)
+__xfs_bmapi_allocate(
+ struct xfs_bmalloca *bma)
{
struct xfs_mount *mp = bma->ip->i_mount;
- int whichfork = (flags & XFS_BMAPI_ATTRFORK) ?
+ int whichfork = (bma->flags & XFS_BMAPI_ATTRFORK) ?
XFS_ATTR_FORK : XFS_DATA_FORK;
struct xfs_ifork *ifp = XFS_IFORK_PTR(bma->ip, whichfork);
int tmp_logflags = 0;
@@ -4654,24 +4656,27 @@
* Indicate if this is the first user data in the file, or just any
* user data.
*/
- if (!(flags & XFS_BMAPI_METADATA)) {
+ if (!(bma->flags & XFS_BMAPI_METADATA)) {
bma->userdata = (bma->offset == 0) ?
XFS_ALLOC_INITIAL_USER_DATA : XFS_ALLOC_USERDATA;
}
- bma->minlen = (flags & XFS_BMAPI_CONTIG) ? bma->length : 1;
+ bma->minlen = (bma->flags & XFS_BMAPI_CONTIG) ? bma->length : 1;
/*
* Only want to do the alignment at the eof if it is userdata and
* allocation length is larger than a stripe unit.
*/
if (mp->m_dalign && bma->length >= mp->m_dalign &&
- !(flags & XFS_BMAPI_METADATA) && whichfork == XFS_DATA_FORK) {
+ !(bma->flags & XFS_BMAPI_METADATA) && whichfork == XFS_DATA_FORK) {
error = xfs_bmap_isaeof(bma, whichfork);
if (error)
return error;
}
+ if (bma->flags & XFS_BMAPI_STACK_SWITCH)
+ bma->stack_switch = 1;
+
error = xfs_bmap_alloc(bma);
if (error)
return error;
@@ -4706,7 +4711,7 @@
* A wasdelay extent has been initialized, so shouldn't be flagged
* as unwritten.
*/
- if (!bma->wasdel && (flags & XFS_BMAPI_PREALLOC) &&
+ if (!bma->wasdel && (bma->flags & XFS_BMAPI_PREALLOC) &&
xfs_sb_version_hasextflgbit(&mp->m_sb))
bma->got.br_state = XFS_EXT_UNWRITTEN;
@@ -4734,6 +4739,45 @@
return 0;
}
+static void
+xfs_bmapi_allocate_worker(
+ struct work_struct *work)
+{
+ struct xfs_bmalloca *args = container_of(work,
+ struct xfs_bmalloca, work);
+ unsigned long pflags;
+
+ /* we are in a transaction context here */
+ current_set_flags_nested(&pflags, PF_FSTRANS);
+
+ args->result = __xfs_bmapi_allocate(args);
+ complete(args->done);
+
+ current_restore_flags_nested(&pflags, PF_FSTRANS);
+}
+
+/*
+ * Some allocation requests often come in with little stack to work on. Push
+ * them off to a worker thread so there is lots of stack to use. Otherwise just
+ * call directly to avoid the context switch overhead here.
+ */
+int
+xfs_bmapi_allocate(
+ struct xfs_bmalloca *args)
+{
+ DECLARE_COMPLETION_ONSTACK(done);
+
+ if (!args->stack_switch)
+ return __xfs_bmapi_allocate(args);
+
+
+ args->done = &done;
+ INIT_WORK_ONSTACK(&args->work, xfs_bmapi_allocate_worker);
+ queue_work(xfs_alloc_wq, &args->work);
+ wait_for_completion(&done);
+ return args->result;
+}
+
STATIC int
xfs_bmapi_convert_unwritten(
struct xfs_bmalloca *bma,
@@ -4919,6 +4963,7 @@
bma.conv = !!(flags & XFS_BMAPI_CONVERT);
bma.wasdel = wasdelay;
bma.offset = bno;
+ bma.flags = flags;
/*
* There's a 32/64 bit type mismatch between the
@@ -4934,7 +4979,7 @@
ASSERT(len > 0);
ASSERT(bma.length > 0);
- error = xfs_bmapi_allocate(&bma, flags);
+ error = xfs_bmapi_allocate(&bma);
if (error)
goto error0;
if (bma.blkno == NULLFSBLOCK)
diff --git a/fs/xfs/xfs_bmap.h b/fs/xfs/xfs_bmap.h
index 803b56d..5f469c3 100644
--- a/fs/xfs/xfs_bmap.h
+++ b/fs/xfs/xfs_bmap.h
@@ -77,6 +77,7 @@
* from written to unwritten, otherwise convert from unwritten to written.
*/
#define XFS_BMAPI_CONVERT 0x040
+#define XFS_BMAPI_STACK_SWITCH 0x080
#define XFS_BMAPI_FLAGS \
{ XFS_BMAPI_ENTIRE, "ENTIRE" }, \
@@ -85,7 +86,8 @@
{ XFS_BMAPI_PREALLOC, "PREALLOC" }, \
{ XFS_BMAPI_IGSTATE, "IGSTATE" }, \
{ XFS_BMAPI_CONTIG, "CONTIG" }, \
- { XFS_BMAPI_CONVERT, "CONVERT" }
+ { XFS_BMAPI_CONVERT, "CONVERT" }, \
+ { XFS_BMAPI_STACK_SWITCH, "STACK_SWITCH" }
static inline int xfs_bmapi_aflag(int w)
@@ -133,6 +135,11 @@
char userdata;/* set if is user data */
char aeof; /* allocated space at eof */
char conv; /* overwriting unwritten extents */
+ char stack_switch;
+ int flags;
+ struct completion *done;
+ struct work_struct work;
+ int result;
} xfs_bmalloca_t;
/*
diff --git a/fs/xfs/xfs_buf_item.c b/fs/xfs/xfs_buf_item.c
index a8d0ed9..becf4a9 100644
--- a/fs/xfs/xfs_buf_item.c
+++ b/fs/xfs/xfs_buf_item.c
@@ -526,7 +526,25 @@
}
xfs_buf_relse(bp);
} else if (freed && remove) {
+ /*
+ * There are currently two references to the buffer - the active
+ * LRU reference and the buf log item. What we are about to do
+ * here - simulate a failed IO completion - requires 3
+ * references.
+ *
+ * The LRU reference is removed by the xfs_buf_stale() call. The
+ * buf item reference is removed by the xfs_buf_iodone()
+ * callback that is run by xfs_buf_do_callbacks() during ioend
+ * processing (via the bp->b_iodone callback), and then finally
+ * the ioend processing will drop the IO reference if the buffer
+ * is marked XBF_ASYNC.
+ *
+ * Hence we need to take an additional reference here so that IO
+ * completion processing doesn't free the buffer prematurely.
+ */
xfs_buf_lock(bp);
+ xfs_buf_hold(bp);
+ bp->b_flags |= XBF_ASYNC;
xfs_buf_ioerror(bp, EIO);
XFS_BUF_UNDONE(bp);
xfs_buf_stale(bp);
diff --git a/fs/xfs/xfs_fsops.c b/fs/xfs/xfs_fsops.c
index c25b094..4beaede 100644
--- a/fs/xfs/xfs_fsops.c
+++ b/fs/xfs/xfs_fsops.c
@@ -399,9 +399,26 @@
/* update secondary superblocks. */
for (agno = 1; agno < nagcount; agno++) {
- error = xfs_trans_read_buf(mp, NULL, mp->m_ddev_targp,
+ error = 0;
+ /*
+ * new secondary superblocks need to be zeroed, not read from
+ * disk as the contents of the new area we are growing into is
+ * completely unknown.
+ */
+ if (agno < oagcount) {
+ error = xfs_trans_read_buf(mp, NULL, mp->m_ddev_targp,
XFS_AGB_TO_DADDR(mp, agno, XFS_SB_BLOCK(mp)),
XFS_FSS_TO_BB(mp, 1), 0, &bp);
+ } else {
+ bp = xfs_trans_get_buf(NULL, mp->m_ddev_targp,
+ XFS_AGB_TO_DADDR(mp, agno, XFS_SB_BLOCK(mp)),
+ XFS_FSS_TO_BB(mp, 1), 0);
+ if (bp)
+ xfs_buf_zero(bp, 0, BBTOB(bp->b_length));
+ else
+ error = ENOMEM;
+ }
+
if (error) {
xfs_warn(mp,
"error %d reading secondary superblock for ag %d",
@@ -423,7 +440,7 @@
break; /* no point in continuing */
}
}
- return 0;
+ return error;
error0:
xfs_trans_cancel(tp, XFS_TRANS_ABORT);
diff --git a/fs/xfs/xfs_ialloc.c b/fs/xfs/xfs_ialloc.c
index 445bf1a..c5c4ef4 100644
--- a/fs/xfs/xfs_ialloc.c
+++ b/fs/xfs/xfs_ialloc.c
@@ -250,6 +250,7 @@
/* boundary */
struct xfs_perag *pag;
+ memset(&args, 0, sizeof(args));
args.tp = tp;
args.mp = tp->t_mountp;
diff --git a/fs/xfs/xfs_inode.c b/fs/xfs/xfs_inode.c
index 2778258..1938b41 100644
--- a/fs/xfs/xfs_inode.c
+++ b/fs/xfs/xfs_inode.c
@@ -1509,7 +1509,8 @@
* to mark all the active inodes on the buffer stale.
*/
bp = xfs_trans_get_buf(tp, mp->m_ddev_targp, blkno,
- mp->m_bsize * blks_per_cluster, 0);
+ mp->m_bsize * blks_per_cluster,
+ XBF_UNMAPPED);
if (!bp)
return ENOMEM;
diff --git a/fs/xfs/xfs_ioctl.c b/fs/xfs/xfs_ioctl.c
index 8305f2a..c1df3c6 100644
--- a/fs/xfs/xfs_ioctl.c
+++ b/fs/xfs/xfs_ioctl.c
@@ -70,7 +70,7 @@
int hsize;
xfs_handle_t handle;
struct inode *inode;
- struct fd f;
+ struct fd f = {0};
struct path path;
int error;
struct xfs_inode *ip;
diff --git a/fs/xfs/xfs_iomap.c b/fs/xfs/xfs_iomap.c
index 973dff6..7f53766 100644
--- a/fs/xfs/xfs_iomap.c
+++ b/fs/xfs/xfs_iomap.c
@@ -584,7 +584,9 @@
* pointer that the caller gave to us.
*/
error = xfs_bmapi_write(tp, ip, map_start_fsb,
- count_fsb, 0, &first_block, 1,
+ count_fsb,
+ XFS_BMAPI_STACK_SWITCH,
+ &first_block, 1,
imap, &nimaps, &free_list);
if (error)
goto trans_cancel;
diff --git a/fs/xfs/xfs_log.c b/fs/xfs/xfs_log.c
index 7f4f937..4dad756 100644
--- a/fs/xfs/xfs_log.c
+++ b/fs/xfs/xfs_log.c
@@ -2387,14 +2387,27 @@
/*
- * update the last_sync_lsn before we drop the
+ * Completion of a iclog IO does not imply that
+ * a transaction has completed, as transactions
+ * can be large enough to span many iclogs. We
+ * cannot change the tail of the log half way
+ * through a transaction as this may be the only
+ * transaction in the log and moving th etail to
+ * point to the middle of it will prevent
+ * recovery from finding the start of the
+ * transaction. Hence we should only update the
+ * last_sync_lsn if this iclog contains
+ * transaction completion callbacks on it.
+ *
+ * We have to do this before we drop the
* icloglock to ensure we are the only one that
* can update it.
*/
ASSERT(XFS_LSN_CMP(atomic64_read(&log->l_last_sync_lsn),
be64_to_cpu(iclog->ic_header.h_lsn)) <= 0);
- atomic64_set(&log->l_last_sync_lsn,
- be64_to_cpu(iclog->ic_header.h_lsn));
+ if (iclog->ic_callback)
+ atomic64_set(&log->l_last_sync_lsn,
+ be64_to_cpu(iclog->ic_header.h_lsn));
} else
ioerrors++;
diff --git a/fs/xfs/xfs_log_recover.c b/fs/xfs/xfs_log_recover.c
index 5da3ace..d308749 100644
--- a/fs/xfs/xfs_log_recover.c
+++ b/fs/xfs/xfs_log_recover.c
@@ -3541,7 +3541,7 @@
* - order is important.
*/
error = xlog_bread_offset(log, 0,
- bblks - split_bblks, hbp,
+ bblks - split_bblks, dbp,
offset + BBTOB(split_bblks));
if (error)
goto bread_err2;
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/include/linux/clk/sunxi.h
similarity index 65%
rename from arch/arm/plat-mxc/include/mach/timex.h
rename to include/linux/clk/sunxi.h
index 10343d1..e074fdd 100644
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ b/include/linux/clk/sunxi.h
@@ -1,6 +1,7 @@
/*
- * Copyright (C) 1999 ARM Limited
- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -13,10 +14,9 @@
* GNU General Public License for more details.
*/
-#ifndef __ASM_ARCH_MXC_TIMEX_H__
-#define __ASM_ARCH_MXC_TIMEX_H__
+#ifndef __LINUX_CLK_SUNXI_H_
+#define __LINUX_CLK_SUNXI_H_
-/* Bogus value */
-#define CLOCK_TICK_RATE 12345678
+void __init sunxi_init_clocks(void);
-#endif /* __ASM_ARCH_MXC_TIMEX_H__ */
+#endif
diff --git a/arch/arm/plat-mxc/include/mach/ipu.h b/include/linux/dma/ipu-dma.h
similarity index 96%
rename from arch/arm/plat-mxc/include/mach/ipu.h
rename to include/linux/dma/ipu-dma.h
index 539e559..1803111 100644
--- a/arch/arm/plat-mxc/include/mach/ipu.h
+++ b/include/linux/dma/ipu-dma.h
@@ -9,8 +9,8 @@
* published by the Free Software Foundation.
*/
-#ifndef _IPU_H_
-#define _IPU_H_
+#ifndef __LINUX_DMA_IPU_DMA_H
+#define __LINUX_DMA_IPU_DMA_H
#include <linux/types.h>
#include <linux/dmaengine.h>
@@ -174,4 +174,4 @@
#define to_tx_desc(tx) container_of(tx, struct idmac_tx_desc, txd)
#define to_idmac_chan(c) container_of(c, struct idmac_channel, dma_chan)
-#endif
+#endif /* __LINUX_DMA_IPU_DMA_H */
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/include/linux/irqchip/sunxi.h
similarity index 62%
copy from arch/arm/plat-mxc/include/mach/timex.h
copy to include/linux/irqchip/sunxi.h
index 10343d1..1fe2c22 100644
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ b/include/linux/irqchip/sunxi.h
@@ -1,6 +1,7 @@
/*
- * Copyright (C) 1999 ARM Limited
- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -13,10 +14,14 @@
* GNU General Public License for more details.
*/
-#ifndef __ASM_ARCH_MXC_TIMEX_H__
-#define __ASM_ARCH_MXC_TIMEX_H__
+#ifndef __LINUX_IRQCHIP_SUNXI_H
+#define __LINUX_IRQCHIP_SUNXI_H
-/* Bogus value */
-#define CLOCK_TICK_RATE 12345678
+#include <asm/exception.h>
-#endif /* __ASM_ARCH_MXC_TIMEX_H__ */
+extern void sunxi_init_irq(void);
+
+extern asmlinkage void __exception_irq_entry sunxi_handle_irq(
+ struct pt_regs *regs);
+
+#endif
diff --git a/arch/arm/plat-versatile/include/plat/fpga-irq.h b/include/linux/irqchip/versatile-fpga.h
similarity index 100%
rename from arch/arm/plat-versatile/include/plat/fpga-irq.h
rename to include/linux/irqchip/versatile-fpga.h
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index 7c6a113..9653166 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -137,7 +137,7 @@
dma_addr_t sg_dma;
void *sg_cpu;
- struct dw_mci_dma_ops *dma_ops;
+ const struct dw_mci_dma_ops *dma_ops;
#ifdef CONFIG_MMC_DW_IDMAC
unsigned int ring_size;
#else
@@ -162,7 +162,7 @@
u16 data_offset;
struct device *dev;
struct dw_mci_board *pdata;
- struct dw_mci_drv_data *drv_data;
+ const struct dw_mci_drv_data *drv_data;
void *priv;
struct clk *biu_clk;
struct clk *ciu_clk;
@@ -186,7 +186,7 @@
struct regulator *vmmc; /* Power regulator */
unsigned long irq_flags; /* IRQ flags */
- unsigned int irq;
+ int irq;
};
/* DMA ops for Internal/External DMAC interface */
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index fa8529a..1edcb4d 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -91,6 +91,7 @@
unsigned int quirks2; /* More deviations from spec. */
#define SDHCI_QUIRK2_HOST_OFF_CARD_ON (1<<0)
+#define SDHCI_QUIRK2_HOST_NO_CMD23 (1<<1)
int irq; /* Device IRQ */
void __iomem *ioaddr; /* Mapped address */
diff --git a/include/linux/of_address.h b/include/linux/of_address.h
index a1984dd..e20e3af 100644
--- a/include/linux/of_address.h
+++ b/include/linux/of_address.h
@@ -28,11 +28,13 @@
#endif
#else /* CONFIG_OF_ADDRESS */
+#ifndef of_address_to_resource
static inline int of_address_to_resource(struct device_node *dev, int index,
struct resource *r)
{
return -EINVAL;
}
+#endif
static inline struct device_node *of_find_matching_node_by_address(
struct device_node *from,
const struct of_device_id *matches,
diff --git a/include/linux/platform_data/asoc-imx-ssi.h b/include/linux/platform_data/asoc-imx-ssi.h
index 63f3c28..92c7fd7 100644
--- a/include/linux/platform_data/asoc-imx-ssi.h
+++ b/include/linux/platform_data/asoc-imx-ssi.h
@@ -17,5 +17,7 @@
void (*ac97_warm_reset)(struct snd_ac97 *ac97);
};
+extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type);
+
#endif /* __MACH_SSI_H */
diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h
index 1b90803..f6d30cc 100644
--- a/include/linux/platform_data/dma-imx.h
+++ b/include/linux/platform_data/dma-imx.h
@@ -61,7 +61,9 @@
static inline int imx_dma_is_general_purpose(struct dma_chan *chan)
{
return strstr(dev_name(chan->device->dev), "sdma") ||
- !strcmp(dev_name(chan->device->dev), "imx-dma");
+ !strcmp(dev_name(chan->device->dev), "imx1-dma") ||
+ !strcmp(dev_name(chan->device->dev), "imx21-dma") ||
+ !strcmp(dev_name(chan->device->dev), "imx27-dma");
}
#endif
diff --git a/include/linux/platform_data/uio_pruss.h b/include/linux/platform_data/uio_pruss.h
index f39140a..3d47d21 100644
--- a/include/linux/platform_data/uio_pruss.h
+++ b/include/linux/platform_data/uio_pruss.h
@@ -20,6 +20,7 @@
/* To configure the PRUSS INTC base offset for UIO driver */
struct uio_pruss_pdata {
- u32 pintc_base;
+ u32 pintc_base;
+ struct gen_pool *sram_pool;
};
#endif /* _UIO_PRUSS_H_ */
diff --git a/include/linux/ptp_clock_kernel.h b/include/linux/ptp_clock_kernel.h
index f2dc6d8..38a9935 100644
--- a/include/linux/ptp_clock_kernel.h
+++ b/include/linux/ptp_clock_kernel.h
@@ -54,7 +54,8 @@
* clock operations
*
* @adjfreq: Adjusts the frequency of the hardware clock.
- * parameter delta: Desired period change in parts per billion.
+ * parameter delta: Desired frequency offset from nominal frequency
+ * in parts per billion
*
* @adjtime: Shifts the time of the hardware clock.
* parameter delta: Desired change in nanoseconds.
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h
index 5091091..60c7239 100644
--- a/include/linux/sh_clk.h
+++ b/include/linux/sh_clk.h
@@ -199,4 +199,13 @@
#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
+/* .enable_reg will be updated to .mapping on sh_clk_fsidiv_register() */
+#define SH_CLK_FSIDIV(_reg, _parent) \
+{ \
+ .enable_reg = (void __iomem *)_reg, \
+ .parent = _parent, \
+}
+
+int sh_clk_fsidiv_register(struct clk *clks, int nr);
+
#endif /* __SH_CLOCK_H */
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/include/linux/sunxi_timer.h
similarity index 65%
copy from arch/arm/plat-mxc/include/mach/timex.h
copy to include/linux/sunxi_timer.h
index 10343d1..b9165bb 100644
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ b/include/linux/sunxi_timer.h
@@ -1,6 +1,7 @@
/*
- * Copyright (C) 1999 ARM Limited
- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -13,10 +14,11 @@
* GNU General Public License for more details.
*/
-#ifndef __ASM_ARCH_MXC_TIMEX_H__
-#define __ASM_ARCH_MXC_TIMEX_H__
+#ifndef __SUNXI_TIMER_H
+#define __SUNXI_TIMER_H
-/* Bogus value */
-#define CLOCK_TICK_RATE 12345678
+#include <asm/mach/time.h>
-#endif /* __ASM_ARCH_MXC_TIMEX_H__ */
+extern struct sys_timer sunxi_timer;
+
+#endif
diff --git a/include/uapi/linux/eventpoll.h b/include/uapi/linux/eventpoll.h
index 8c99ce7..2c267bc 100644
--- a/include/uapi/linux/eventpoll.h
+++ b/include/uapi/linux/eventpoll.h
@@ -25,7 +25,6 @@
#define EPOLL_CTL_ADD 1
#define EPOLL_CTL_DEL 2
#define EPOLL_CTL_MOD 3
-#define EPOLL_CTL_DISABLE 4
/*
* Request the handling of system wakeup events so as to prevent system suspends
diff --git a/include/xen/hvm.h b/include/xen/hvm.h
index b193fa2..13e43e4 100644
--- a/include/xen/hvm.h
+++ b/include/xen/hvm.h
@@ -5,6 +5,36 @@
#include <xen/interface/hvm/params.h>
#include <asm/xen/hypercall.h>
+static const char *param_name(int op)
+{
+#define PARAM(x) [HVM_PARAM_##x] = #x
+ static const char *const names[] = {
+ PARAM(CALLBACK_IRQ),
+ PARAM(STORE_PFN),
+ PARAM(STORE_EVTCHN),
+ PARAM(PAE_ENABLED),
+ PARAM(IOREQ_PFN),
+ PARAM(BUFIOREQ_PFN),
+ PARAM(TIMER_MODE),
+ PARAM(HPET_ENABLED),
+ PARAM(IDENT_PT),
+ PARAM(DM_DOMAIN),
+ PARAM(ACPI_S_STATE),
+ PARAM(VM86_TSS),
+ PARAM(VPT_ALIGN),
+ PARAM(CONSOLE_PFN),
+ PARAM(CONSOLE_EVTCHN),
+ };
+#undef PARAM
+
+ if (op >= ARRAY_SIZE(names))
+ return "unknown";
+
+ if (!names[op])
+ return "reserved";
+
+ return names[op];
+}
static inline int hvm_get_parameter(int idx, uint64_t *value)
{
struct xen_hvm_param xhv;
@@ -14,8 +44,8 @@
xhv.index = idx;
r = HYPERVISOR_hvm_op(HVMOP_get_param, &xhv);
if (r < 0) {
- printk(KERN_ERR "Cannot get hvm parameter %d: %d!\n",
- idx, r);
+ printk(KERN_ERR "Cannot get hvm parameter %s (%d): %d!\n",
+ param_name(idx), idx, r);
return r;
}
*value = xhv.value;
diff --git a/kernel/module.c b/kernel/module.c
index 6085f5e..6e48c3a 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -2293,12 +2293,17 @@
src = (void *)info->hdr + symsect->sh_offset;
nsrc = symsect->sh_size / sizeof(*src);
+ /* strtab always starts with a nul, so offset 0 is the empty string. */
+ strtab_size = 1;
+
/* Compute total space required for the core symbols' strtab. */
- for (ndst = i = strtab_size = 1; i < nsrc; ++i, ++src)
- if (is_core_symbol(src, info->sechdrs, info->hdr->e_shnum)) {
- strtab_size += strlen(&info->strtab[src->st_name]) + 1;
+ for (ndst = i = 0; i < nsrc; i++) {
+ if (i == 0 ||
+ is_core_symbol(src+i, info->sechdrs, info->hdr->e_shnum)) {
+ strtab_size += strlen(&info->strtab[src[i].st_name])+1;
ndst++;
}
+ }
/* Append room for core symbols at end of core part. */
info->symoffs = ALIGN(mod->core_size, symsect->sh_addralign ?: 1);
@@ -2332,15 +2337,15 @@
mod->core_symtab = dst = mod->module_core + info->symoffs;
mod->core_strtab = s = mod->module_core + info->stroffs;
src = mod->symtab;
- *dst = *src;
*s++ = 0;
- for (ndst = i = 1; i < mod->num_symtab; ++i, ++src) {
- if (!is_core_symbol(src, info->sechdrs, info->hdr->e_shnum))
- continue;
-
- dst[ndst] = *src;
- dst[ndst++].st_name = s - mod->core_strtab;
- s += strlcpy(s, &mod->strtab[src->st_name], KSYM_NAME_LEN) + 1;
+ for (ndst = i = 0; i < mod->num_symtab; i++) {
+ if (i == 0 ||
+ is_core_symbol(src+i, info->sechdrs, info->hdr->e_shnum)) {
+ dst[ndst] = src[i];
+ dst[ndst++].st_name = s - mod->core_strtab;
+ s += strlcpy(s, &mod->strtab[src[i].st_name],
+ KSYM_NAME_LEN) + 1;
+ }
}
mod->core_num_syms = ndst;
}
diff --git a/mm/vmscan.c b/mm/vmscan.c
index 2624edc..8b055e9 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -3017,6 +3017,8 @@
&balanced_classzone_idx);
}
}
+
+ current->reclaim_state = NULL;
return 0;
}
diff --git a/net/core/dev.c b/net/core/dev.c
index 09cb3f6..bda6d00 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -1666,7 +1666,7 @@
static inline bool skb_loop_sk(struct packet_type *ptype, struct sk_buff *skb)
{
- if (ptype->af_packet_priv == NULL)
+ if (!ptype->af_packet_priv || !skb->sk)
return false;
if (ptype->id_match)
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index 76d4c2c..fad649a 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -2192,7 +2192,8 @@
goto skip;
err = nlmsg_populate_fdb_fill(skb, dev, ha->addr,
- portid, seq, 0, NTF_SELF);
+ portid, seq,
+ RTM_NEWNEIGH, NTF_SELF);
if (err < 0)
return err;
skip:
diff --git a/net/ipv4/inet_diag.c b/net/ipv4/inet_diag.c
index 535584c..0c34bfa 100644
--- a/net/ipv4/inet_diag.c
+++ b/net/ipv4/inet_diag.c
@@ -892,13 +892,16 @@
struct inet_diag_req_v2 *r, struct nlattr *bc)
{
const struct inet_diag_handler *handler;
+ int err = 0;
handler = inet_diag_lock_handler(r->sdiag_protocol);
if (!IS_ERR(handler))
handler->dump(skb, cb, r, bc);
+ else
+ err = PTR_ERR(handler);
inet_diag_unlock_handler(handler);
- return skb->len;
+ return err ? : skb->len;
}
static int inet_diag_dump(struct sk_buff *skb, struct netlink_callback *cb)
diff --git a/net/ipv6/ip6_gre.c b/net/ipv6/ip6_gre.c
index 0185679..d5cb3c4 100644
--- a/net/ipv6/ip6_gre.c
+++ b/net/ipv6/ip6_gre.c
@@ -1633,9 +1633,9 @@
/* IFLA_GRE_OKEY */
nla_total_size(4) +
/* IFLA_GRE_LOCAL */
- nla_total_size(4) +
+ nla_total_size(sizeof(struct in6_addr)) +
/* IFLA_GRE_REMOTE */
- nla_total_size(4) +
+ nla_total_size(sizeof(struct in6_addr)) +
/* IFLA_GRE_TTL */
nla_total_size(1) +
/* IFLA_GRE_TOS */
@@ -1659,8 +1659,8 @@
nla_put_be16(skb, IFLA_GRE_OFLAGS, p->o_flags) ||
nla_put_be32(skb, IFLA_GRE_IKEY, p->i_key) ||
nla_put_be32(skb, IFLA_GRE_OKEY, p->o_key) ||
- nla_put(skb, IFLA_GRE_LOCAL, sizeof(struct in6_addr), &p->raddr) ||
- nla_put(skb, IFLA_GRE_REMOTE, sizeof(struct in6_addr), &p->laddr) ||
+ nla_put(skb, IFLA_GRE_LOCAL, sizeof(struct in6_addr), &p->laddr) ||
+ nla_put(skb, IFLA_GRE_REMOTE, sizeof(struct in6_addr), &p->raddr) ||
nla_put_u8(skb, IFLA_GRE_TTL, p->hop_limit) ||
/*nla_put_u8(skb, IFLA_GRE_TOS, t->priority) ||*/
nla_put_u8(skb, IFLA_GRE_ENCAP_LIMIT, p->encap_limit) ||
diff --git a/net/ipv6/ndisc.c b/net/ipv6/ndisc.c
index ff36194..2edce30 100644
--- a/net/ipv6/ndisc.c
+++ b/net/ipv6/ndisc.c
@@ -535,7 +535,7 @@
{
struct inet6_dev *idev;
struct inet6_ifaddr *ifa;
- struct in6_addr mcaddr;
+ struct in6_addr mcaddr = IN6ADDR_LINKLOCAL_ALLNODES_INIT;
idev = in6_dev_get(dev);
if (!idev)
@@ -543,7 +543,6 @@
read_lock_bh(&idev->lock);
list_for_each_entry(ifa, &idev->addr_list, if_list) {
- addrconf_addr_solict_mult(&ifa->addr, &mcaddr);
ndisc_send_na(dev, NULL, &mcaddr, &ifa->addr,
/*router=*/ !!idev->cnf.forwarding,
/*solicited=*/ false, /*override=*/ true,
diff --git a/net/sched/sch_qfq.c b/net/sched/sch_qfq.c
index f0dd83c..9687fa1 100644
--- a/net/sched/sch_qfq.c
+++ b/net/sched/sch_qfq.c
@@ -84,18 +84,19 @@
* grp->index is the index of the group; and grp->slot_shift
* is the shift for the corresponding (scaled) sigma_i.
*/
-#define QFQ_MAX_INDEX 19
-#define QFQ_MAX_WSHIFT 16
+#define QFQ_MAX_INDEX 24
+#define QFQ_MAX_WSHIFT 12
#define QFQ_MAX_WEIGHT (1<<QFQ_MAX_WSHIFT)
-#define QFQ_MAX_WSUM (2*QFQ_MAX_WEIGHT)
+#define QFQ_MAX_WSUM (16*QFQ_MAX_WEIGHT)
#define FRAC_BITS 30 /* fixed point arithmetic */
#define ONE_FP (1UL << FRAC_BITS)
#define IWSUM (ONE_FP/QFQ_MAX_WSUM)
-#define QFQ_MTU_SHIFT 11
+#define QFQ_MTU_SHIFT 16 /* to support TSO/GSO */
#define QFQ_MIN_SLOT_SHIFT (FRAC_BITS + QFQ_MTU_SHIFT - QFQ_MAX_INDEX)
+#define QFQ_MIN_LMAX 256 /* min possible lmax for a class */
/*
* Possible group states. These values are used as indexes for the bitmaps
@@ -231,6 +232,32 @@
q->wsum += delta_w;
}
+static void qfq_update_reactivate_class(struct qfq_sched *q,
+ struct qfq_class *cl,
+ u32 inv_w, u32 lmax, int delta_w)
+{
+ bool need_reactivation = false;
+ int i = qfq_calc_index(inv_w, lmax);
+
+ if (&q->groups[i] != cl->grp && cl->qdisc->q.qlen > 0) {
+ /*
+ * shift cl->F back, to not charge the
+ * class for the not-yet-served head
+ * packet
+ */
+ cl->F = cl->S;
+ /* remove class from its slot in the old group */
+ qfq_deactivate_class(q, cl);
+ need_reactivation = true;
+ }
+
+ qfq_update_class_params(q, cl, lmax, inv_w, delta_w);
+
+ if (need_reactivation) /* activate in new group */
+ qfq_activate_class(q, cl, qdisc_peek_len(cl->qdisc));
+}
+
+
static int qfq_change_class(struct Qdisc *sch, u32 classid, u32 parentid,
struct nlattr **tca, unsigned long *arg)
{
@@ -238,7 +265,7 @@
struct qfq_class *cl = (struct qfq_class *)*arg;
struct nlattr *tb[TCA_QFQ_MAX + 1];
u32 weight, lmax, inv_w;
- int i, err;
+ int err;
int delta_w;
if (tca[TCA_OPTIONS] == NULL) {
@@ -270,16 +297,14 @@
if (tb[TCA_QFQ_LMAX]) {
lmax = nla_get_u32(tb[TCA_QFQ_LMAX]);
- if (!lmax || lmax > (1UL << QFQ_MTU_SHIFT)) {
+ if (lmax < QFQ_MIN_LMAX || lmax > (1UL << QFQ_MTU_SHIFT)) {
pr_notice("qfq: invalid max length %u\n", lmax);
return -EINVAL;
}
} else
- lmax = 1UL << QFQ_MTU_SHIFT;
+ lmax = psched_mtu(qdisc_dev(sch));
if (cl != NULL) {
- bool need_reactivation = false;
-
if (tca[TCA_RATE]) {
err = gen_replace_estimator(&cl->bstats, &cl->rate_est,
qdisc_root_sleeping_lock(sch),
@@ -291,24 +316,8 @@
if (lmax == cl->lmax && inv_w == cl->inv_w)
return 0; /* nothing to update */
- i = qfq_calc_index(inv_w, lmax);
sch_tree_lock(sch);
- if (&q->groups[i] != cl->grp && cl->qdisc->q.qlen > 0) {
- /*
- * shift cl->F back, to not charge the
- * class for the not-yet-served head
- * packet
- */
- cl->F = cl->S;
- /* remove class from its slot in the old group */
- qfq_deactivate_class(q, cl);
- need_reactivation = true;
- }
-
- qfq_update_class_params(q, cl, lmax, inv_w, delta_w);
-
- if (need_reactivation) /* activate in new group */
- qfq_activate_class(q, cl, qdisc_peek_len(cl->qdisc));
+ qfq_update_reactivate_class(q, cl, inv_w, lmax, delta_w);
sch_tree_unlock(sch);
return 0;
@@ -663,15 +672,48 @@
/*
- * XXX we should make sure that slot becomes less than 32.
- * This is guaranteed by the input values.
- * roundedS is always cl->S rounded on grp->slot_shift bits.
+ * If the weight and lmax (max_pkt_size) of the classes do not change,
+ * then QFQ guarantees that the slot index is never higher than
+ * 2 + ((1<<QFQ_MTU_SHIFT)/QFQ_MIN_LMAX) * (QFQ_MAX_WEIGHT/QFQ_MAX_WSUM).
+ *
+ * With the current values of the above constants, the index is
+ * then guaranteed to never be higher than 2 + 256 * (1 / 16) = 18.
+ *
+ * When the weight of a class is increased or the lmax of the class is
+ * decreased, a new class with smaller slot size may happen to be
+ * activated. The activation of this class should be properly delayed
+ * to when the service of the class has finished in the ideal system
+ * tracked by QFQ. If the activation of the class is not delayed to
+ * this reference time instant, then this class may be unjustly served
+ * before other classes waiting for service. This may cause
+ * (unfrequently) the above bound to the slot index to be violated for
+ * some of these unlucky classes.
+ *
+ * Instead of delaying the activation of the new class, which is quite
+ * complex, the following inaccurate but simple solution is used: if
+ * the slot index is higher than QFQ_MAX_SLOTS-2, then the timestamps
+ * of the class are shifted backward so as to let the slot index
+ * become equal to QFQ_MAX_SLOTS-2. This threshold is used because, if
+ * the slot index is above it, then the data structure implementing
+ * the bucket list either gets immediately corrupted or may get
+ * corrupted on a possible next packet arrival that causes the start
+ * time of the group to be shifted backward.
*/
static void qfq_slot_insert(struct qfq_group *grp, struct qfq_class *cl,
u64 roundedS)
{
u64 slot = (roundedS - grp->S) >> grp->slot_shift;
- unsigned int i = (grp->front + slot) % QFQ_MAX_SLOTS;
+ unsigned int i; /* slot index in the bucket list */
+
+ if (unlikely(slot > QFQ_MAX_SLOTS - 2)) {
+ u64 deltaS = roundedS - grp->S -
+ ((u64)(QFQ_MAX_SLOTS - 2)<<grp->slot_shift);
+ cl->S -= deltaS;
+ cl->F -= deltaS;
+ slot = QFQ_MAX_SLOTS - 2;
+ }
+
+ i = (grp->front + slot) % QFQ_MAX_SLOTS;
hlist_add_head(&cl->next, &grp->slots[i]);
__set_bit(slot, &grp->full_slots);
@@ -892,6 +934,13 @@
}
pr_debug("qfq_enqueue: cl = %x\n", cl->common.classid);
+ if (unlikely(cl->lmax < qdisc_pkt_len(skb))) {
+ pr_debug("qfq: increasing maxpkt from %u to %u for class %u",
+ cl->lmax, qdisc_pkt_len(skb), cl->common.classid);
+ qfq_update_reactivate_class(q, cl, cl->inv_w,
+ qdisc_pkt_len(skb), 0);
+ }
+
err = qdisc_enqueue(skb, cl->qdisc);
if (unlikely(err != NET_XMIT_SUCCESS)) {
pr_debug("qfq_enqueue: enqueue failed %d\n", err);
diff --git a/net/tipc/handler.c b/net/tipc/handler.c
index 111ff83..b36f0fc 100644
--- a/net/tipc/handler.c
+++ b/net/tipc/handler.c
@@ -116,7 +116,6 @@
return;
handler_enabled = 0;
- tasklet_disable(&tipc_tasklet);
tasklet_kill(&tipc_tasklet);
spin_lock_bh(&qitem_lock);
diff --git a/scripts/Makefile.modinst b/scripts/Makefile.modinst
index dda4b2b..ecbb447 100644
--- a/scripts/Makefile.modinst
+++ b/scripts/Makefile.modinst
@@ -16,8 +16,9 @@
__modinst: $(modules)
@:
+# Don't stop modules_install if we can't sign external modules.
quiet_cmd_modules_install = INSTALL $@
- cmd_modules_install = mkdir -p $(2); cp $@ $(2) ; $(mod_strip_cmd) $(2)/$(notdir $@) ; $(mod_sign_cmd) $(2)/$(notdir $@)
+ cmd_modules_install = mkdir -p $(2); cp $@ $(2) ; $(mod_strip_cmd) $(2)/$(notdir $@) ; $(mod_sign_cmd) $(2)/$(notdir $@) $(patsubst %,|| true,$(KBUILD_EXTMOD))
# Modules built outside the kernel source tree go into extra by default
INSTALL_MOD_DIR ?= extra
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 21a9f5d..f18750e 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -1890,8 +1890,10 @@
}
if ($realfile =~ m@^(drivers/net/|net/)@ &&
- $rawline !~ m@^\+[ \t]*(\/\*|\*\/)@ &&
- $rawline =~ m@^\+[ \t]*.+\*\/[ \t]*$@) {
+ $rawline !~ m@^\+[ \t]*\*/[ \t]*$@ && #trailing */
+ $rawline !~ m@^\+.*/\*.*\*/[ \t]*$@ && #inline /*...*/
+ $rawline !~ m@^\+.*\*{2,}/[ \t]*$@ && #trailing **/
+ $rawline =~ m@^\+[ \t]*.+\*\/[ \t]*$@) { #non blank */
WARN("NETWORKING_BLOCK_COMMENT_STYLE",
"networking block comments put the trailing */ on a separate line\n" . $herecurr);
}
diff --git a/sound/core/oss/mixer_oss.c b/sound/core/oss/mixer_oss.c
index a9a2e63..e8a1d18 100644
--- a/sound/core/oss/mixer_oss.c
+++ b/sound/core/oss/mixer_oss.c
@@ -76,6 +76,7 @@
snd_card_unref(card);
return -EFAULT;
}
+ snd_card_unref(card);
return 0;
}
diff --git a/sound/core/oss/pcm_oss.c b/sound/core/oss/pcm_oss.c
index f337b66..4c1cc51 100644
--- a/sound/core/oss/pcm_oss.c
+++ b/sound/core/oss/pcm_oss.c
@@ -2454,6 +2454,7 @@
mutex_unlock(&pcm->open_mutex);
if (err < 0)
goto __error;
+ snd_card_unref(pcm->card);
return err;
__error:
diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
index 6e8872d..f9ddecf 100644
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -2122,7 +2122,8 @@
pcm = snd_lookup_minor_data(iminor(inode),
SNDRV_DEVICE_TYPE_PCM_PLAYBACK);
err = snd_pcm_open(file, pcm, SNDRV_PCM_STREAM_PLAYBACK);
- snd_card_unref(pcm->card);
+ if (pcm)
+ snd_card_unref(pcm->card);
return err;
}
@@ -2135,7 +2136,8 @@
pcm = snd_lookup_minor_data(iminor(inode),
SNDRV_DEVICE_TYPE_PCM_CAPTURE);
err = snd_pcm_open(file, pcm, SNDRV_PCM_STREAM_CAPTURE);
- snd_card_unref(pcm->card);
+ if (pcm)
+ snd_card_unref(pcm->card);
return err;
}
diff --git a/sound/core/sound.c b/sound/core/sound.c
index 89780c3..70ccdab 100644
--- a/sound/core/sound.c
+++ b/sound/core/sound.c
@@ -114,7 +114,7 @@
mreg = snd_minors[minor];
if (mreg && mreg->type == type) {
private_data = mreg->private_data;
- if (mreg->card_ptr)
+ if (private_data && mreg->card_ptr)
atomic_inc(&mreg->card_ptr->refcount);
} else
private_data = NULL;
diff --git a/sound/core/sound_oss.c b/sound/core/sound_oss.c
index e1d79ee..726a49a 100644
--- a/sound/core/sound_oss.c
+++ b/sound/core/sound_oss.c
@@ -54,7 +54,7 @@
mreg = snd_oss_minors[minor];
if (mreg && mreg->type == type) {
private_data = mreg->private_data;
- if (mreg->card_ptr)
+ if (private_data && mreg->card_ptr)
atomic_inc(&mreg->card_ptr->refcount);
} else
private_data = NULL;
diff --git a/sound/i2c/other/ak4113.c b/sound/i2c/other/ak4113.c
index ef68d71..e04e750 100644
--- a/sound/i2c/other/ak4113.c
+++ b/sound/i2c/other/ak4113.c
@@ -426,7 +426,7 @@
},
{
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
- .name = "IEC958 Preample Capture Default",
+ .name = "IEC958 Preamble Capture Default",
.access = SNDRV_CTL_ELEM_ACCESS_READ |
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
.info = snd_ak4113_spdif_pinfo,
diff --git a/sound/i2c/other/ak4114.c b/sound/i2c/other/ak4114.c
index 816e7d2..5bf4fca 100644
--- a/sound/i2c/other/ak4114.c
+++ b/sound/i2c/other/ak4114.c
@@ -401,7 +401,7 @@
},
{
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
- .name = "IEC958 Preample Capture Default",
+ .name = "IEC958 Preamble Capture Default",
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
.info = snd_ak4114_spdif_pinfo,
.get = snd_ak4114_spdif_pget,
diff --git a/sound/i2c/other/ak4117.c b/sound/i2c/other/ak4117.c
index b4b2a51..40e33c9 100644
--- a/sound/i2c/other/ak4117.c
+++ b/sound/i2c/other/ak4117.c
@@ -380,7 +380,7 @@
},
{
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
- .name = "IEC958 Preample Capture Default",
+ .name = "IEC958 Preamble Capture Default",
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
.info = snd_ak4117_spdif_pinfo,
.get = snd_ak4117_spdif_pget,
diff --git a/sound/pci/es1968.c b/sound/pci/es1968.c
index 5d0e568..50169bc 100644
--- a/sound/pci/es1968.c
+++ b/sound/pci/es1968.c
@@ -2655,6 +2655,8 @@
{ TYPE_MAESTRO2E, 0x1179 },
{ TYPE_MAESTRO2E, 0x14c0 }, /* HP omnibook 4150 */
{ TYPE_MAESTRO2E, 0x1558 },
+ { TYPE_MAESTRO2E, 0x125d }, /* a PCI card, e.g. Terratec DMX */
+ { TYPE_MAESTRO2, 0x125d }, /* a PCI card, e.g. SF64-PCE2 */
};
static struct ess_device_list mpu_blacklist[] __devinitdata = {
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 72b085a..cd2dbaf 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -3563,6 +3563,8 @@
/* Teradici */
{ PCI_DEVICE(0x6549, 0x1200),
.driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
+ { PCI_DEVICE(0x6549, 0x2200),
+ .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
/* Creative X-Fi (CA0110-IBG) */
/* CTHDA chips */
{ PCI_DEVICE(0x1102, 0x0010),
diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c
index cdd43ea..1eeba73 100644
--- a/sound/pci/hda/patch_analog.c
+++ b/sound/pci/hda/patch_analog.c
@@ -545,6 +545,7 @@
if (spec->multiout.dig_out_nid) {
info++;
codec->num_pcms++;
+ codec->spdif_status_reset = 1;
info->name = "AD198x Digital";
info->pcm_type = HDA_PCM_TYPE_SPDIF;
info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ad198x_pcm_digital_playback;
diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c
index 61a7113..d5f3a26 100644
--- a/sound/pci/hda/patch_cirrus.c
+++ b/sound/pci/hda/patch_cirrus.c
@@ -101,8 +101,8 @@
#define CS420X_VENDOR_NID 0x11
#define CS_DIG_OUT1_PIN_NID 0x10
#define CS_DIG_OUT2_PIN_NID 0x15
-#define CS_DMIC1_PIN_NID 0x12
-#define CS_DMIC2_PIN_NID 0x0e
+#define CS_DMIC1_PIN_NID 0x0e
+#define CS_DMIC2_PIN_NID 0x12
/* coef indices */
#define IDX_SPDIF_STAT 0x0000
@@ -1079,14 +1079,18 @@
cs_automic(codec, NULL);
coef = 0x000a; /* ADC1/2 - Digital and Analog Soft Ramp */
+ cs_vendor_coef_set(codec, IDX_ADC_CFG, coef);
+
+ coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
if (is_active_pin(codec, CS_DMIC2_PIN_NID))
- coef |= 0x0500; /* DMIC2 2 chan on, GPIO1 off */
+ coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
if (is_active_pin(codec, CS_DMIC1_PIN_NID))
- coef |= 0x1800; /* DMIC1 2 chan on, GPIO0 off
+ coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
* No effect if SPDIF_OUT2 is
* selected in IDX_SPDIF_CTL.
*/
- cs_vendor_coef_set(codec, IDX_ADC_CFG, coef);
+
+ cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
} else {
if (spec->mic_detect)
cs_automic(codec, NULL);
@@ -1107,7 +1111,7 @@
| 0x0400 /* Disable Coefficient Auto increment */
)},
/* Beep */
- {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
+ {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
{0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
{} /* terminator */
@@ -1728,8 +1732,7 @@
}
-static struct snd_kcontrol_new cs421x_capture_source = {
-
+static const struct snd_kcontrol_new cs421x_capture_source = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Capture Source",
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
@@ -1946,7 +1949,7 @@
}
#endif
-static struct hda_codec_ops cs421x_patch_ops = {
+static const struct hda_codec_ops cs421x_patch_ops = {
.build_controls = cs421x_build_controls,
.build_pcms = cs_build_pcms,
.init = cs421x_init,
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index f7397ad..c0ce3b1 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -5840,7 +5840,7 @@
return alc_parse_auto_config(codec, alc269_ignore, ssids);
}
-static void alc269_toggle_power_output(struct hda_codec *codec, int power_up)
+static void alc269vb_toggle_power_output(struct hda_codec *codec, int power_up)
{
int val = alc_read_coef_idx(codec, 0x04);
if (power_up)
@@ -5857,10 +5857,10 @@
if (spec->codec_variant != ALC269_TYPE_ALC269VB)
return;
- if ((alc_get_coef0(codec) & 0x00ff) == 0x017)
- alc269_toggle_power_output(codec, 0);
- if ((alc_get_coef0(codec) & 0x00ff) == 0x018) {
- alc269_toggle_power_output(codec, 0);
+ if (spec->codec_variant == ALC269_TYPE_ALC269VB)
+ alc269vb_toggle_power_output(codec, 0);
+ if (spec->codec_variant == ALC269_TYPE_ALC269VB &&
+ (alc_get_coef0(codec) & 0x00ff) == 0x018) {
msleep(150);
}
}
@@ -5870,24 +5870,22 @@
{
struct alc_spec *spec = codec->spec;
- if (spec->codec_variant == ALC269_TYPE_ALC269VB ||
+ if (spec->codec_variant == ALC269_TYPE_ALC269VB)
+ alc269vb_toggle_power_output(codec, 0);
+ if (spec->codec_variant == ALC269_TYPE_ALC269VB &&
(alc_get_coef0(codec) & 0x00ff) == 0x018) {
- alc269_toggle_power_output(codec, 0);
msleep(150);
}
codec->patch_ops.init(codec);
- if (spec->codec_variant == ALC269_TYPE_ALC269VB ||
+ if (spec->codec_variant == ALC269_TYPE_ALC269VB)
+ alc269vb_toggle_power_output(codec, 1);
+ if (spec->codec_variant == ALC269_TYPE_ALC269VB &&
(alc_get_coef0(codec) & 0x00ff) == 0x017) {
- alc269_toggle_power_output(codec, 1);
msleep(200);
}
- if (spec->codec_variant == ALC269_TYPE_ALC269VB ||
- (alc_get_coef0(codec) & 0x00ff) == 0x018)
- alc269_toggle_power_output(codec, 1);
-
snd_hda_codec_resume_amp(codec);
snd_hda_codec_resume_cache(codec);
hda_call_check_power_status(codec, 0x01);
@@ -7079,6 +7077,7 @@
.patch = patch_alc662 },
{ .id = 0x10ec0663, .name = "ALC663", .patch = patch_alc662 },
{ .id = 0x10ec0665, .name = "ALC665", .patch = patch_alc662 },
+ { .id = 0x10ec0668, .name = "ALC668", .patch = patch_alc662 },
{ .id = 0x10ec0670, .name = "ALC670", .patch = patch_alc662 },
{ .id = 0x10ec0680, .name = "ALC680", .patch = patch_alc680 },
{ .id = 0x10ec0880, .name = "ALC880", .patch = patch_alc880 },
@@ -7096,6 +7095,7 @@
{ .id = 0x10ec0889, .name = "ALC889", .patch = patch_alc882 },
{ .id = 0x10ec0892, .name = "ALC892", .patch = patch_alc662 },
{ .id = 0x10ec0899, .name = "ALC898", .patch = patch_alc882 },
+ { .id = 0x10ec0900, .name = "ALC1150", .patch = patch_alc882 },
{} /* terminator */
};
diff --git a/sound/pci/hda/patch_via.c b/sound/pci/hda/patch_via.c
index 72a2f60..019e1a0 100644
--- a/sound/pci/hda/patch_via.c
+++ b/sound/pci/hda/patch_via.c
@@ -1809,11 +1809,11 @@
{
struct via_spec *spec = codec->spec;
const struct auto_pin_cfg *cfg = &spec->autocfg;
- int i, dac_num;
+ int i;
hda_nid_t nid;
+ spec->multiout.num_dacs = 0;
spec->multiout.dac_nids = spec->private_dac_nids;
- dac_num = 0;
for (i = 0; i < cfg->line_outs; i++) {
hda_nid_t dac = 0;
nid = cfg->line_out_pins[i];
@@ -1824,16 +1824,13 @@
if (!i && parse_output_path(codec, nid, dac, 1,
&spec->out_mix_path))
dac = spec->out_mix_path.path[0];
- if (dac) {
- spec->private_dac_nids[i] = dac;
- dac_num++;
- }
+ if (dac)
+ spec->private_dac_nids[spec->multiout.num_dacs++] = dac;
}
if (!spec->out_path[0].depth && spec->out_mix_path.depth) {
spec->out_path[0] = spec->out_mix_path;
spec->out_mix_path.depth = 0;
}
- spec->multiout.num_dacs = dac_num;
return 0;
}
@@ -3628,6 +3625,7 @@
*/
enum {
VIA_FIXUP_INTMIC_BOOST,
+ VIA_FIXUP_ASUS_G75,
};
static void via_fixup_intmic_boost(struct hda_codec *codec,
@@ -3642,13 +3640,35 @@
.type = HDA_FIXUP_FUNC,
.v.func = via_fixup_intmic_boost,
},
+ [VIA_FIXUP_ASUS_G75] = {
+ .type = HDA_FIXUP_PINS,
+ .v.pins = (const struct hda_pintbl[]) {
+ /* set 0x24 and 0x33 as speakers */
+ { 0x24, 0x991301f0 },
+ { 0x33, 0x991301f1 }, /* subwoofer */
+ { }
+ }
+ },
};
static const struct snd_pci_quirk vt2002p_fixups[] = {
+ SND_PCI_QUIRK(0x1043, 0x1487, "Asus G75", VIA_FIXUP_ASUS_G75),
SND_PCI_QUIRK(0x1043, 0x8532, "Asus X202E", VIA_FIXUP_INTMIC_BOOST),
{}
};
+/* NIDs 0x24 and 0x33 on VT1802 have connections to non-existing NID 0x3e
+ * Replace this with mixer NID 0x1c
+ */
+static void fix_vt1802_connections(struct hda_codec *codec)
+{
+ static hda_nid_t conn_24[] = { 0x14, 0x1c };
+ static hda_nid_t conn_33[] = { 0x1c };
+
+ snd_hda_override_conn_list(codec, 0x24, ARRAY_SIZE(conn_24), conn_24);
+ snd_hda_override_conn_list(codec, 0x33, ARRAY_SIZE(conn_33), conn_33);
+}
+
/* patch for vt2002P */
static int patch_vt2002P(struct hda_codec *codec)
{
@@ -3663,6 +3683,8 @@
spec->aa_mix_nid = 0x21;
override_mic_boost(codec, 0x2b, 0, 3, 40);
override_mic_boost(codec, 0x29, 0, 3, 40);
+ if (spec->codec_type == VT1802)
+ fix_vt1802_connections(codec);
add_secret_dac_path(codec);
snd_hda_pick_fixup(codec, NULL, vt2002p_fixups, via_fixups);
diff --git a/sound/pci/rme9652/hdspm.c b/sound/pci/rme9652/hdspm.c
index f1cd1e3..748e36c 100644
--- a/sound/pci/rme9652/hdspm.c
+++ b/sound/pci/rme9652/hdspm.c
@@ -3979,7 +3979,8 @@
case 8: /* SYNC IN */
val = hdspm_sync_in_sync_check(hdspm); break;
default:
- val = hdspm_s1_sync_check(hdspm, ucontrol->id.index-1);
+ val = hdspm_s1_sync_check(hdspm,
+ kcontrol->private_value-1);
}
break;
@@ -4899,7 +4900,7 @@
insel = "Coaxial";
break;
default:
- insel = "Unkown";
+ insel = "Unknown";
}
snd_iprintf(buffer,
diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c
index 6159929..4d8db36 100644
--- a/sound/soc/codecs/cs42l52.c
+++ b/sound/soc/codecs/cs42l52.c
@@ -763,7 +763,7 @@
if ((freq >= CS42L52_MIN_CLK) && (freq <= CS42L52_MAX_CLK)) {
cs42l52->sysclk = freq;
} else {
- dev_err(codec->dev, "Invalid freq paramter\n");
+ dev_err(codec->dev, "Invalid freq parameter\n");
return -EINVAL;
}
return 0;
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c
index 3fddc7a..b2b2b37 100644
--- a/sound/soc/codecs/wm8994.c
+++ b/sound/soc/codecs/wm8994.c
@@ -3722,7 +3722,7 @@
} while (count--);
if (count == 0)
- dev_warn(codec->dev, "No impedence range reported for jack\n");
+ dev_warn(codec->dev, "No impedance range reported for jack\n");
#ifndef CONFIG_SND_SOC_WM8994_MODULE
trace_snd_soc_jack_irq(dev_name(codec->dev));
diff --git a/sound/soc/fsl/imx-pcm-fiq.c b/sound/soc/fsl/imx-pcm-fiq.c
index 22c6130..9ffc9e6 100644
--- a/sound/soc/fsl/imx-pcm-fiq.c
+++ b/sound/soc/fsl/imx-pcm-fiq.c
@@ -29,7 +29,6 @@
#include <asm/fiq.h>
-#include <mach/irqs.h>
#include <linux/platform_data/asoc-imx-ssi.h>
#include "imx-ssi.h"
diff --git a/sound/soc/fsl/imx-ssi.c b/sound/soc/fsl/imx-ssi.c
index 006f7d4..dd56644 100644
--- a/sound/soc/fsl/imx-ssi.c
+++ b/sound/soc/fsl/imx-ssi.c
@@ -48,7 +48,6 @@
#include <sound/soc.h>
#include <linux/platform_data/asoc-imx-ssi.h>
-#include <mach/hardware.h>
#include "imx-ssi.h"
diff --git a/sound/usb/endpoint.c b/sound/usb/endpoint.c
index 7f78c6d..34de6f2 100644
--- a/sound/usb/endpoint.c
+++ b/sound/usb/endpoint.c
@@ -35,6 +35,7 @@
#define EP_FLAG_ACTIVATED 0
#define EP_FLAG_RUNNING 1
+#define EP_FLAG_STOPPING 2
/*
* snd_usb_endpoint is a model that abstracts everything related to an
@@ -502,10 +503,20 @@
if (alive)
snd_printk(KERN_ERR "timeout: still %d active urbs on EP #%x\n",
alive, ep->ep_num);
+ clear_bit(EP_FLAG_STOPPING, &ep->flags);
return 0;
}
+/* sync the pending stop operation;
+ * this function itself doesn't trigger the stop operation
+ */
+void snd_usb_endpoint_sync_pending_stop(struct snd_usb_endpoint *ep)
+{
+ if (ep && test_bit(EP_FLAG_STOPPING, &ep->flags))
+ wait_clear_urbs(ep);
+}
+
/*
* unlink active urbs.
*/
@@ -918,6 +929,8 @@
if (wait)
wait_clear_urbs(ep);
+ else
+ set_bit(EP_FLAG_STOPPING, &ep->flags);
}
}
diff --git a/sound/usb/endpoint.h b/sound/usb/endpoint.h
index 6376ccf..3d4c970 100644
--- a/sound/usb/endpoint.h
+++ b/sound/usb/endpoint.h
@@ -19,6 +19,7 @@
int snd_usb_endpoint_start(struct snd_usb_endpoint *ep, int can_sleep);
void snd_usb_endpoint_stop(struct snd_usb_endpoint *ep,
int force, int can_sleep, int wait);
+void snd_usb_endpoint_sync_pending_stop(struct snd_usb_endpoint *ep);
int snd_usb_endpoint_activate(struct snd_usb_endpoint *ep);
int snd_usb_endpoint_deactivate(struct snd_usb_endpoint *ep);
void snd_usb_endpoint_free(struct list_head *head);
diff --git a/sound/usb/pcm.c b/sound/usb/pcm.c
index 37428f7..5c12a3f 100644
--- a/sound/usb/pcm.c
+++ b/sound/usb/pcm.c
@@ -568,6 +568,9 @@
goto unlock;
}
+ snd_usb_endpoint_sync_pending_stop(subs->sync_endpoint);
+ snd_usb_endpoint_sync_pending_stop(subs->data_endpoint);
+
ret = set_format(subs, subs->cur_audiofmt);
if (ret < 0)
goto unlock;
diff --git a/tools/testing/selftests/Makefile b/tools/testing/selftests/Makefile
index 4348014..85baf11 100644
--- a/tools/testing/selftests/Makefile
+++ b/tools/testing/selftests/Makefile
@@ -1,4 +1,4 @@
-TARGETS = breakpoints kcmp mqueue vm cpu-hotplug memory-hotplug epoll
+TARGETS = breakpoints kcmp mqueue vm cpu-hotplug memory-hotplug
all:
for TARGET in $(TARGETS); do \
diff --git a/tools/testing/selftests/epoll/Makefile b/tools/testing/selftests/epoll/Makefile
deleted file mode 100644
index 19806ed..0000000
--- a/tools/testing/selftests/epoll/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-# Makefile for epoll selftests
-
-all: test_epoll
-%: %.c
- gcc -pthread -g -o $@ $^
-
-run_tests: all
- ./test_epoll
-
-clean:
- $(RM) test_epoll
diff --git a/tools/testing/selftests/epoll/test_epoll.c b/tools/testing/selftests/epoll/test_epoll.c
deleted file mode 100644
index f752539..0000000
--- a/tools/testing/selftests/epoll/test_epoll.c
+++ /dev/null
@@ -1,344 +0,0 @@
-/*
- * tools/testing/selftests/epoll/test_epoll.c
- *
- * Copyright 2012 Adobe Systems Incorporated
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * Paton J. Lewis <palewis@adobe.com>
- *
- */
-
-#include <errno.h>
-#include <fcntl.h>
-#include <pthread.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <sys/epoll.h>
-#include <sys/socket.h>
-
-/*
- * A pointer to an epoll_item_private structure will be stored in the epoll
- * item's event structure so that we can get access to the epoll_item_private
- * data after calling epoll_wait:
- */
-struct epoll_item_private {
- int index; /* Position of this struct within the epoll_items array. */
- int fd;
- uint32_t events;
- pthread_mutex_t mutex; /* Guards the following variables... */
- int stop;
- int status; /* Stores any error encountered while handling item. */
- /* The following variable allows us to test whether we have encountered
- a problem while attempting to cancel and delete the associated
- event. When the test program exits, 'deleted' should be exactly
- one. If it is greater than one, then the failed test reflects a real
- world situation where we would have tried to access the epoll item's
- private data after deleting it: */
- int deleted;
-};
-
-struct epoll_item_private *epoll_items;
-
-/*
- * Delete the specified item from the epoll set. In a real-world secneario this
- * is where we would free the associated data structure, but in this testing
- * environment we retain the structure so that we can test for double-deletion:
- */
-void delete_item(int index)
-{
- __sync_fetch_and_add(&epoll_items[index].deleted, 1);
-}
-
-/*
- * A pointer to a read_thread_data structure will be passed as the argument to
- * each read thread:
- */
-struct read_thread_data {
- int stop;
- int status; /* Indicates any error encountered by the read thread. */
- int epoll_set;
-};
-
-/*
- * The function executed by the read threads:
- */
-void *read_thread_function(void *function_data)
-{
- struct read_thread_data *thread_data =
- (struct read_thread_data *)function_data;
- struct epoll_event event_data;
- struct epoll_item_private *item_data;
- char socket_data;
-
- /* Handle events until we encounter an error or this thread's 'stop'
- condition is set: */
- while (1) {
- int result = epoll_wait(thread_data->epoll_set,
- &event_data,
- 1, /* Number of desired events */
- 1000); /* Timeout in ms */
- if (result < 0) {
- /* Breakpoints signal all threads. Ignore that while
- debugging: */
- if (errno == EINTR)
- continue;
- thread_data->status = errno;
- return 0;
- } else if (thread_data->stop)
- return 0;
- else if (result == 0) /* Timeout */
- continue;
-
- /* We need the mutex here because checking for the stop
- condition and re-enabling the epoll item need to be done
- together as one atomic operation when EPOLL_CTL_DISABLE is
- available: */
- item_data = (struct epoll_item_private *)event_data.data.ptr;
- pthread_mutex_lock(&item_data->mutex);
-
- /* Remove the item from the epoll set if we want to stop
- handling that event: */
- if (item_data->stop)
- delete_item(item_data->index);
- else {
- /* Clear the data that was written to the other end of
- our non-blocking socket: */
- do {
- if (read(item_data->fd, &socket_data, 1) < 1) {
- if ((errno == EAGAIN) ||
- (errno == EWOULDBLOCK))
- break;
- else
- goto error_unlock;
- }
- } while (item_data->events & EPOLLET);
-
- /* The item was one-shot, so re-enable it: */
- event_data.events = item_data->events;
- if (epoll_ctl(thread_data->epoll_set,
- EPOLL_CTL_MOD,
- item_data->fd,
- &event_data) < 0)
- goto error_unlock;
- }
-
- pthread_mutex_unlock(&item_data->mutex);
- }
-
-error_unlock:
- thread_data->status = item_data->status = errno;
- pthread_mutex_unlock(&item_data->mutex);
- return 0;
-}
-
-/*
- * A pointer to a write_thread_data structure will be passed as the argument to
- * the write thread:
- */
-struct write_thread_data {
- int stop;
- int status; /* Indicates any error encountered by the write thread. */
- int n_fds;
- int *fds;
-};
-
-/*
- * The function executed by the write thread. It writes a single byte to each
- * socket in turn until the stop condition for this thread is set. If writing to
- * a socket would block (i.e. errno was EAGAIN), we leave that socket alone for
- * the moment and just move on to the next socket in the list. We don't care
- * about the order in which we deliver events to the epoll set. In fact we don't
- * care about the data we're writing to the pipes at all; we just want to
- * trigger epoll events:
- */
-void *write_thread_function(void *function_data)
-{
- const char data = 'X';
- int index;
- struct write_thread_data *thread_data =
- (struct write_thread_data *)function_data;
- while (!thread_data->stop)
- for (index = 0;
- !thread_data->stop && (index < thread_data->n_fds);
- ++index)
- if ((write(thread_data->fds[index], &data, 1) < 1) &&
- (errno != EAGAIN) &&
- (errno != EWOULDBLOCK)) {
- thread_data->status = errno;
- return;
- }
-}
-
-/*
- * Arguments are currently ignored:
- */
-int main(int argc, char **argv)
-{
- const int n_read_threads = 100;
- const int n_epoll_items = 500;
- int index;
- int epoll_set = epoll_create1(0);
- struct write_thread_data write_thread_data = {
- 0, 0, n_epoll_items, malloc(n_epoll_items * sizeof(int))
- };
- struct read_thread_data *read_thread_data =
- malloc(n_read_threads * sizeof(struct read_thread_data));
- pthread_t *read_threads = malloc(n_read_threads * sizeof(pthread_t));
- pthread_t write_thread;
-
- printf("-----------------\n");
- printf("Runing test_epoll\n");
- printf("-----------------\n");
-
- epoll_items = malloc(n_epoll_items * sizeof(struct epoll_item_private));
-
- if (epoll_set < 0 || epoll_items == 0 || write_thread_data.fds == 0 ||
- read_thread_data == 0 || read_threads == 0)
- goto error;
-
- if (sysconf(_SC_NPROCESSORS_ONLN) < 2) {
- printf("Error: please run this test on a multi-core system.\n");
- goto error;
- }
-
- /* Create the socket pairs and epoll items: */
- for (index = 0; index < n_epoll_items; ++index) {
- int socket_pair[2];
- struct epoll_event event_data;
- if (socketpair(AF_UNIX,
- SOCK_STREAM | SOCK_NONBLOCK,
- 0,
- socket_pair) < 0)
- goto error;
- write_thread_data.fds[index] = socket_pair[0];
- epoll_items[index].index = index;
- epoll_items[index].fd = socket_pair[1];
- if (pthread_mutex_init(&epoll_items[index].mutex, NULL) != 0)
- goto error;
- /* We always use EPOLLONESHOT because this test is currently
- structured to demonstrate the need for EPOLL_CTL_DISABLE,
- which only produces useful information in the EPOLLONESHOT
- case (without EPOLLONESHOT, calling epoll_ctl with
- EPOLL_CTL_DISABLE will never return EBUSY). If support for
- testing events without EPOLLONESHOT is desired, it should
- probably be implemented in a separate unit test. */
- epoll_items[index].events = EPOLLIN | EPOLLONESHOT;
- if (index < n_epoll_items / 2)
- epoll_items[index].events |= EPOLLET;
- epoll_items[index].stop = 0;
- epoll_items[index].status = 0;
- epoll_items[index].deleted = 0;
- event_data.events = epoll_items[index].events;
- event_data.data.ptr = &epoll_items[index];
- if (epoll_ctl(epoll_set,
- EPOLL_CTL_ADD,
- epoll_items[index].fd,
- &event_data) < 0)
- goto error;
- }
-
- /* Create and start the read threads: */
- for (index = 0; index < n_read_threads; ++index) {
- read_thread_data[index].stop = 0;
- read_thread_data[index].status = 0;
- read_thread_data[index].epoll_set = epoll_set;
- if (pthread_create(&read_threads[index],
- NULL,
- read_thread_function,
- &read_thread_data[index]) != 0)
- goto error;
- }
-
- if (pthread_create(&write_thread,
- NULL,
- write_thread_function,
- &write_thread_data) != 0)
- goto error;
-
- /* Cancel all event pollers: */
-#ifdef EPOLL_CTL_DISABLE
- for (index = 0; index < n_epoll_items; ++index) {
- pthread_mutex_lock(&epoll_items[index].mutex);
- ++epoll_items[index].stop;
- if (epoll_ctl(epoll_set,
- EPOLL_CTL_DISABLE,
- epoll_items[index].fd,
- NULL) == 0)
- delete_item(index);
- else if (errno != EBUSY) {
- pthread_mutex_unlock(&epoll_items[index].mutex);
- goto error;
- }
- /* EBUSY means events were being handled; allow the other thread
- to delete the item. */
- pthread_mutex_unlock(&epoll_items[index].mutex);
- }
-#else
- for (index = 0; index < n_epoll_items; ++index) {
- pthread_mutex_lock(&epoll_items[index].mutex);
- ++epoll_items[index].stop;
- pthread_mutex_unlock(&epoll_items[index].mutex);
- /* Wait in case a thread running read_thread_function is
- currently executing code between epoll_wait and
- pthread_mutex_lock with this item. Note that a longer delay
- would make double-deletion less likely (at the expense of
- performance), but there is no guarantee that any delay would
- ever be sufficient. Note also that we delete all event
- pollers at once for testing purposes, but in a real-world
- environment we are likely to want to be able to cancel event
- pollers at arbitrary times. Therefore we can't improve this
- situation by just splitting this loop into two loops
- (i.e. signal 'stop' for all items, sleep, and then delete all
- items). We also can't fix the problem via EPOLL_CTL_DEL
- because that command can't prevent the case where some other
- thread is executing read_thread_function within the region
- mentioned above: */
- usleep(1);
- pthread_mutex_lock(&epoll_items[index].mutex);
- if (!epoll_items[index].deleted)
- delete_item(index);
- pthread_mutex_unlock(&epoll_items[index].mutex);
- }
-#endif
-
- /* Shut down the read threads: */
- for (index = 0; index < n_read_threads; ++index)
- __sync_fetch_and_add(&read_thread_data[index].stop, 1);
- for (index = 0; index < n_read_threads; ++index) {
- if (pthread_join(read_threads[index], NULL) != 0)
- goto error;
- if (read_thread_data[index].status)
- goto error;
- }
-
- /* Shut down the write thread: */
- __sync_fetch_and_add(&write_thread_data.stop, 1);
- if ((pthread_join(write_thread, NULL) != 0) || write_thread_data.status)
- goto error;
-
- /* Check for final error conditions: */
- for (index = 0; index < n_epoll_items; ++index) {
- if (epoll_items[index].status != 0)
- goto error;
- if (pthread_mutex_destroy(&epoll_items[index].mutex) < 0)
- goto error;
- }
- for (index = 0; index < n_epoll_items; ++index)
- if (epoll_items[index].deleted != 1) {
- printf("Error: item data deleted %1d times.\n",
- epoll_items[index].deleted);
- goto error;
- }
-
- printf("[PASS]\n");
- return 0;
-
- error:
- printf("[FAIL]\n");
- return errno;
-}