tree 84bf054ecae2bd42a5ec2305174df08ab1cfb89b
parent 35de7bfe91453fca9bb3154a36ddbb86711e08a0
author Thierry Reding <thierry.reding@avionic-design.de> 1353013676 +0100
committer Stephen Warren <swarren@nvidia.com> 1353015986 -0700

ARM: tegra: Add Tegra20 host1x clock support

Extend the pll_d frequency table with a few entries to support common
HDMI and LVDS display modes and setup the clock parents for the two
display controllers and HDMI.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>