ARM: mach-shmobile: sh73a0 INTCS support
Add INTCS support for the sh73a0 processor.
The interrupts on the sh73a0 processor are managed
through controllers such as GIC, INTCS and INTCA.
The ARM cores use the GIC as primary interrupt
controller and the INTCS and INTCA are hanging off
the GIC as cascaded interrupt controllers.
Peripherals connected both to the GIC and the INTC
controllers should if possible only use the GIC.
If no GIC connection is available then INTCS and
INTCA may be used instead.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 15932fd..49ac8eb 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -30,6 +30,7 @@
extern struct clk sh7372_extal1_clk;
extern struct clk sh7372_extal2_clk;
+extern void sh73a0_init_irq(void);
extern void sh73a0_add_early_devices(void);
extern void sh73a0_add_standard_devices(void);
extern void sh73a0_clock_init(void);