| commit | 60b3df9c1e24a18aabb412da9905208c5f04ebea | [log] [tgz] |
|---|---|---|
| author | Peter Zijlstra <a.p.zijlstra@chello.nl> | Fri Mar 13 12:21:30 2009 +0100 |
| committer | Ingo Molnar <mingo@elte.hu> | Mon Apr 06 09:29:32 2009 +0200 |
| tree | 2c132d1a82648b176f8662cea32f51c208517dd5 | |
| parent | 755642322aa66fbc5421a35fd3e1733f73e20083 [diff] |
perf_counter: add comment to barrier We need to ensure the enabled=0 write happens before we start disabling the actual counters, so that a pcm_amd_enable() will not enable one underneath us. I think the race is impossible anyway, we always balance the ops within any one context and perform enable() with IRQs disabled. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Signed-off-by: Ingo Molnar <mingo@elte.hu>