| commit | 60f975b98cf41476ba0e156f7523b197b046cf2b | [log] [tgz] |
|---|---|---|
| author | Stephen Warren <swarren@nvidia.com> | Thu Apr 12 14:09:39 2012 -0600 |
| committer | Stephen Warren <swarren@nvidia.com> | Wed Apr 25 15:22:09 2012 -0600 |
| tree | 1af645f32f8aa377307e18876b4296586c18df95 | |
| parent | c8b62ab41f76218efca5e4baa5c22ef52a9fe3a5 [diff] |
ARM: tegra: reparent sclk to pll_c_out1 pll_p_out4 needs to be used for other purposes. Reparent sclk so that it runs from pll_c. Change sclk's rate to 120MHz from 108MHz since this is the lowest precise rate that can be achieved by dividing the pll_c rate without reducing the sclk rate. (600/5=120, 600/5.5=109.0909..., 600/6=100). Signed-off-by: Stephen Warren <swarren@nvidia.com>