ARM: dts: msm: Enabe all GDSCs on MSMSKUNK
Enable the Peripheral, Graphics, Display, Camera and Video
GDSCs on MSMSKUNK.
CRs-Fixed: 1076165
Change-Id: Ie3b60a2d034d14c5c0e95183b9c6bf73231d7fb2
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
diff --git a/arch/arm64/boot/dts/qcom/msm-gdsc-skunk.dtsi b/arch/arm64/boot/dts/qcom/msm-gdsc-skunk.dtsi
index ad638b8..be39e54 100644
--- a/arch/arm64/boot/dts/qcom/msm-gdsc-skunk.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm-gdsc-skunk.dtsi
@@ -14,134 +14,148 @@
&soc {
/* GDSCs in Global CC */
pcie_0_gdsc: qcom,gdsc@0x16b004 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "pcie_0_gdsc";
reg = <0x16b004 0x4>;
status = "disabled";
};
pcie_1_gdsc: qcom,gdsc@0x18d004 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "pcie_1_gdsc";
reg = <0x18d004 0x4>;
status = "disabled";
};
ufs_card_gdsc: qcom,gdsc@0x175004 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "ufs_card_gdsc";
reg = <0x175004 0x4>;
status = "disabled";
};
ufs_phy_gdsc: qcom,gdsc@0x177004 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "ufs_phy_gdsc";
reg = <0x177004 0x4>;
status = "disabled";
};
usb30_prim_gdsc: qcom,gdsc@0x10f004 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "usb30_prim_gdsc";
reg = <0x10f004 0x4>;
status = "disabled";
};
usb30_sec_gdsc: qcom,gdsc@0x110004 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "usb30_sec_gdsc";
reg = <0x110004 0x4>;
status = "disabled";
};
hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc: qcom,gdsc@0x17d030 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc";
reg = <0x17d030 0x4>;
+ qcom,no-status-check-on-disable;
+ qcom,gds-timeout = <500>;
status = "disabled";
};
hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc: qcom,gdsc@0x17d03c {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc";
reg = <0x17d03c 0x4>;
+ qcom,no-status-check-on-disable;
+ qcom,gds-timeout = <500>;
status = "disabled";
};
hlos1_vote_aggre_noc_mmu_tbu1_gdsc: qcom,gdsc@0x17d034 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_aggre_noc_mmu_tbu1_gdsc";
reg = <0x17d034 0x4>;
+ qcom,no-status-check-on-disable;
+ qcom,gds-timeout = <500>;
status = "disabled";
};
hlos1_vote_aggre_noc_mmu_tbu2_gdsc: qcom,gdsc@0x17d038 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_aggre_noc_mmu_tbu2_gdsc";
reg = <0x17d038 0x4>;
+ qcom,no-status-check-on-disable;
+ qcom,gds-timeout = <500>;
status = "disabled";
};
hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc: qcom,gdsc@0x17d040 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc";
reg = <0x17d040 0x4>;
+ qcom,no-status-check-on-disable;
+ qcom,gds-timeout = <500>;
status = "disabled";
};
hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc: qcom,gdsc@0x17d048 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc";
reg = <0x17d048 0x4>;
+ qcom,no-status-check-on-disable;
+ qcom,gds-timeout = <500>;
status = "disabled";
};
hlos1_vote_mmnoc_mmu_tbu_sf_gdsc: qcom,gdsc@0x17d044 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc";
reg = <0x17d044 0x4>;
+ qcom,no-status-check-on-disable;
+ qcom,gds-timeout = <500>;
status = "disabled";
};
/* GDSCs in Camera CC */
bps_gdsc: qcom,gdsc@0xad06004 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "bps_gdsc";
reg = <0xad06004 0x4>;
status = "disabled";
};
ife_0_gdsc: qcom,gdsc@0xad09004 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "ife_0_gdsc";
reg = <0xad09004 0x4>;
status = "disabled";
};
ife_1_gdsc: qcom,gdsc@0xad0a004 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "ife_1_gdsc";
reg = <0xad0a004 0x4>;
status = "disabled";
};
ipe_0_gdsc: qcom,gdsc@0xad07004 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "ipe_0_gdsc";
reg = <0xad07004 0x4>;
status = "disabled";
};
ipe_1_gdsc: qcom,gdsc@0xad08004 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "ipe_1_gdsc";
reg = <0xad08004 0x4>;
status = "disabled";
};
titan_top_gdsc: qcom,gdsc@0xad0b134 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "titan_top_gdsc";
reg = <0xad0b134 0x4>;
status = "disabled";
@@ -149,37 +163,45 @@
/* GDSCs in Display CC */
mdss_core_gdsc: qcom,gdsc@0xaf03000 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "mdss_core_gdsc";
reg = <0xaf03000 0x4>;
status = "disabled";
};
/* GDSCs in Graphics CC */
- gpu_cx_gdsc: qcom,gdsc@0x5091070 {
- compatible = "regulator-fixed";
+ gpu_cx_hw_ctrl: syscon@0x5091540 {
+ compatible = "syscon";
+ reg = <0x5091540 0x4>;
+ };
+
+ gpu_cx_gdsc: qcom,gdsc@0x509106c {
+ compatible = "qcom,gdsc";
regulator-name = "gpu_cx_gdsc";
- reg = <0x5091070 0x4>;
+ reg = <0x509106c 0x4>;
+ hw-ctrl-addr = <&gpu_cx_hw_ctrl>;
+ qcom,no-status-check-on-disable;
+ qcom,gds-timeout = <500>;
status = "disabled";
};
/* GDSCs in Video CC */
vcodec0_gdsc: qcom,gdsc@0xab00874 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "vcodec0_gdsc";
reg = <0xab00874 0x4>;
status = "disabled";
};
vcodec1_gdsc: qcom,gdsc@0xab008b4 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "vcodec1_gdsc";
reg = <0xab008b4 0x4>;
status = "disabled";
};
venus_gdsc: qcom,gdsc@0xab00814 {
- compatible = "regulator-fixed";
+ compatible = "qcom,gdsc";
regulator-name = "venus_gdsc";
reg = <0xab00814 0x4>;
status = "disabled";