| commit | 6222709d60734dd1e11f8d24520d9f23b4eb953e | [log] [tgz] |
|---|---|---|
| author | Damien Lespiau <damien.lespiau@intel.com> | Thu Apr 30 16:39:20 2015 +0100 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Fri May 08 13:03:35 2015 +0200 |
| tree | dea715d2e0caeb6960df4622064f3e9926a21ef5 | |
| parent | 57520bc55cf56b77e7a67cb0877fafdb65181f6a [diff] |
drm/i915/skl: Make the Misc I/O power well part of the PLLS domain The specs tell us to ungate PG1 and Misc I/O at display init. We'll use the PLLS power domain to ensure those two power wells are up. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>