tree dea715d2e0caeb6960df4622064f3e9926a21ef5
parent 57520bc55cf56b77e7a67cb0877fafdb65181f6a
author Damien Lespiau <damien.lespiau@intel.com> 1430408360 +0100
committer Daniel Vetter <daniel.vetter@ffwll.ch> 1431083015 +0200

drm/i915/skl: Make the Misc I/O power well part of the PLLS domain

The specs tell us to ungate PG1 and Misc I/O at display init. We'll use
the PLLS power domain to ensure those two power wells are up.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>