| commit | 6333ed8f26cf77311088d2e2b7cf16d8480bcbb2 | [log] [tgz] |
|---|---|---|
| author | Haren Myneni <haren@linux.vnet.ibm.com> | Sun Dec 13 03:30:41 2015 -0800 |
| committer | Herbert Xu <herbert@gondor.apana.org.au> | Thu Dec 17 16:42:12 2015 +0800 |
| tree | f6b0d2fb24dc4b71d3aee51a16885c13488d7567 | |
| parent | 81b312f11dfd7466462d94667f0a8df14a412d2a [diff] |
crypto: nx-842 - Mask XERS0 bit in return value NX842 coprocessor sets 3rd bit in CR register with XER[S0] which is nothing to do with NX request. Since this bit can be set with other valuable return status, mast this bit. One of other bits (INITIATED, BUSY or REJECTED) will be returned for any given NX request. Signed-off-by: Haren Myneni <haren@us.ibm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>