| commit | 6387b75284aa7b78c2e947934fb874444ab427e9 | [log] [tgz] |
|---|---|---|
| author | Sakari Ailus <sakari.ailus@iki.fi> | Wed Mar 25 19:57:32 2015 -0300 |
| committer | Mauro Carvalho Chehab <mchehab@osg.samsung.com> | Thu Apr 02 16:42:04 2015 -0300 |
| tree | d54e942201ce1ec6255b334d167551b7149276b1 | |
| parent | 3494bb05940e4c392baeb85f77c1e7c8a78b4e1a [diff] |
[media] omap3isp: Calculate vpclk_div for CSI-2 The video port clock is l3_ick divided by vpclk_div. This clock must be high enough for the external pixel rate. The video port requires two clock cycles to process a pixel. Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>