config USB_DWC3
	tristate "DesignWare USB3 DRD Core Support"
	depends on (USB || USB_GADGET) && HAS_DMA
	select USB_XHCI_PLATFORM if USB_SUPPORT && USB_XHCI_HCD
	help
	  Say Y or M here if your system has a Dual Role SuperSpeed
	  USB controller based on the DesignWare USB3 IP Core.

	  If you choose to build this driver is a dynamically linked
	  module, the module will be called dwc3.ko.

if USB_DWC3

choice
	bool "DWC3 Mode Selection"
	default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
	default USB_DWC3_HOST if (USB && !USB_GADGET)
	default USB_DWC3_GADGET if (!USB && USB_GADGET)

config USB_DWC3_HOST
	bool "Host only mode"
	depends on USB=y || USB=USB_DWC3
	help
	  Select this when you want to use DWC3 in host mode only,
	  thereby the gadget feature will be regressed.

config USB_DWC3_GADGET
	bool "Gadget only mode"
	depends on USB_GADGET=y || USB_GADGET=USB_DWC3
	help
	  Select this when you want to use DWC3 in gadget mode only,
	  thereby the host feature will be regressed.

config USB_DWC3_DUAL_ROLE
	bool "Dual Role mode"
	depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
	help
	  This is the default mode of working of DWC3 controller where
	  both host and gadget features are enabled.

endchoice

comment "Platform Glue Driver Support"

config USB_DWC3_OMAP
	tristate "Texas Instruments OMAP5 and similar Platforms"
	depends on EXTCON && (ARCH_OMAP2PLUS || COMPILE_TEST)
	depends on OF
	default USB_DWC3
	help
	  Some platforms from Texas Instruments like OMAP5, DRA7xxx and
	  AM437x use this IP for USB2/3 functionality.

	  Say 'Y' or 'M' here if you have one such device

config USB_DWC3_EXYNOS
	tristate "Samsung Exynos Platform"
	depends on ARCH_EXYNOS && OF || COMPILE_TEST
	default USB_DWC3
	help
	  Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
	  say 'Y' or 'M' if you have one such device.

config USB_DWC3_PCI
	tristate "PCIe-based Platforms"
	depends on PCI
	default USB_DWC3
	help
	  If you're using the DesignWare Core IP with a PCIe, please say
	  'Y' or 'M' here.

	  One such PCIe-based platform is Synopsys' PCIe HAPS model of
	  this IP.

config USB_DWC3_KEYSTONE
	tristate "Texas Instruments Keystone2 Platforms"
	depends on ARCH_KEYSTONE || COMPILE_TEST
	default USB_DWC3
	help
	  Support of USB2/3 functionality in TI Keystone2 platforms.
	  Say 'Y' or 'M' here if you have one such device

config USB_DWC3_ST
	tristate "STMicroelectronics Platforms"
	depends on ARCH_STI && OF
	default USB_DWC3
	help
	  STMicroelectronics SoCs with one DesignWare Core USB3 IP
	  inside (i.e. STiH407).
	  Say 'Y' or 'M' if you have one such device.

config USB_DWC3_QCOM
	tristate "Qualcomm Platforms"
	depends on ARCH_QCOM || COMPILE_TEST
	default USB_DWC3
	help
	  Recent Qualcomm SoCs ship with one DesignWare Core USB3 IP inside,
	  say 'Y' or 'M' if you have one such device.

comment "Debugging features"

config USB_DWC3_DEBUG
	bool "Enable Debugging Messages"
	help
	  Say Y here to enable debugging messages on DWC3 Driver.

config DWC3_HOST_USB3_LPM_ENABLE
	bool "Enable USB3 LPM Capability"
	depends on USB_DWC3_HOST=y || USB_DWC3_DUAL_ROLE=y
	default n
	help
	  Select this when you want to enable USB3 LPM with dwc3 xhci host.

endif