ALSA: ice1724 - Re-fix IRQ mask initialization
The previous IRQ mask initialization was wrong. It must set the bits
to be masked.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
diff --git a/sound/pci/ice1712/ice1724.c b/sound/pci/ice1712/ice1724.c
index 40725df..0dfa054 100644
--- a/sound/pci/ice1712/ice1724.c
+++ b/sound/pci/ice1712/ice1724.c
@@ -395,8 +395,8 @@
"status = 0x%x\n", status);
if (status & VT1724_IRQ_MPU_TX) {
printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
- outb(inb(ICEREG1724(ice, IRQMASK)) &
- ~VT1724_IRQ_MPU_TX,
+ outb(inb(ICEREG1724(ice, IRQMASK)) |
+ VT1724_IRQ_MPU_TX,
ICEREG1724(ice, IRQMASK));
}
break;
@@ -2413,8 +2413,8 @@
return -EIO;
}
- /* clear interrupts -- otherwise you'll get irq problems later */
- outb(0, ICEREG1724(ice, IRQMASK));
+ /* MPU_RX and TX irq masks are cleared later dynamically */
+ outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
/* don't handle FIFO overrun/underruns (just yet),
* since they cause machine lockups