thermal: qpnp-adc: Update ADC_TM peripheral registration
Register ADC_TM peripheral with of_thermal to support
clients using thermal core to set trips and read temperature.
Update ADC_TM driver to activate the trip threshold for
warm and cool zones when thermal core sets the trip threshold
and enable the sensor.
In addition remove support for qpnp-adc-tm peripheral register
configuration.
Change-Id: Ie2d3955bfed62b183d8872cd1ce49d5f783e06ae
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
diff --git a/drivers/thermal/qpnp-adc-tm.c b/drivers/thermal/qpnp-adc-tm.c
index 8d706cd..342160e 100644
--- a/drivers/thermal/qpnp-adc-tm.c
+++ b/drivers/thermal/qpnp-adc-tm.c
@@ -34,6 +34,7 @@
#include <linux/qpnp/qpnp-adc.h>
#include <linux/thermal.h>
#include <linux/platform_device.h>
+#include "thermal_core.h"
/* QPNP VADC TM register definition */
#define QPNP_REVISION3 0x2
@@ -41,126 +42,15 @@
#define QPNP_PERPH_TYPE2 0x2
#define QPNP_REVISION_EIGHT_CHANNEL_SUPPORT 2
#define QPNP_PERPH_SUBTYPE_TWO_CHANNEL_SUPPORT 0x22
-#define QPNP_STATUS1 0x8
-#define QPNP_STATUS1_OP_MODE 4
-#define QPNP_STATUS1_MEAS_INTERVAL_EN_STS BIT(2)
-#define QPNP_STATUS1_REQ_STS BIT(1)
-#define QPNP_STATUS1_EOC BIT(0)
-#define QPNP_STATUS2 0x9
-#define QPNP_STATUS2_CONV_SEQ_STATE 6
-#define QPNP_STATUS2_FIFO_NOT_EMPTY_FLAG BIT(1)
-#define QPNP_STATUS2_CONV_SEQ_TIMEOUT_STS BIT(0)
-#define QPNP_CONV_TIMEOUT_ERR 2
-
-#define QPNP_MODE_CTL 0x40
-#define QPNP_OP_MODE_SHIFT 3
-#define QPNP_VREF_XO_THM_FORCE BIT(2)
-#define QPNP_AMUX_TRIM_EN BIT(1)
-#define QPNP_ADC_TRIM_EN BIT(0)
#define QPNP_EN_CTL1 0x46
#define QPNP_ADC_TM_EN BIT(7)
#define QPNP_BTM_CONV_REQ 0x47
#define QPNP_ADC_CONV_REQ_EN BIT(7)
-#define QPNP_ADC_CH_SEL_CTL 0x48
-#define QPNP_ADC_DIG_PARAM 0x50
-#define QPNP_ADC_DIG_DEC_RATIO_SEL_SHIFT 3
-#define QPNP_HW_SETTLE_DELAY 0x51
+#define QPNP_OP_MODE_SHIFT 3
#define QPNP_CONV_REQ 0x52
#define QPNP_CONV_REQ_SET BIT(7)
-#define QPNP_CONV_SEQ_CTL 0x54
-#define QPNP_CONV_SEQ_HOLDOFF_SHIFT 4
-#define QPNP_CONV_SEQ_TRIG_CTL 0x55
-#define QPNP_ADC_TM_MEAS_INTERVAL_CTL 0x57
-#define QPNP_ADC_TM_MEAS_INTERVAL_TIME_SHIFT 0x3
-#define QPNP_ADC_TM_MEAS_INTERVAL_CTL2 0x58
-#define QPNP_ADC_TM_MEAS_INTERVAL_CTL2_SHIFT 0x4
-#define QPNP_ADC_TM_MEAS_INTERVAL_CTL2_MASK 0xf0
-#define QPNP_ADC_TM_MEAS_INTERVAL_CTL3_MASK 0xf
-#define QPNP_ADC_MEAS_INTERVAL_OP_CTL 0x59
-#define QPNP_ADC_MEAS_INTERVAL_OP BIT(7)
-
-#define QPNP_FAST_AVG_CTL 0x5a
-#define QPNP_FAST_AVG_EN 0x5b
-#define QPNP_FAST_AVG_ENABLED BIT(7)
-
-#define QPNP_M0_LOW_THR_LSB 0x5c
-#define QPNP_M0_LOW_THR_MSB 0x5d
-#define QPNP_M0_HIGH_THR_LSB 0x5e
-#define QPNP_M0_HIGH_THR_MSB 0x5f
-#define QPNP_M1_ADC_CH_SEL_CTL 0x68
-#define QPNP_M1_LOW_THR_LSB 0x69
-#define QPNP_M1_LOW_THR_MSB 0x6a
-#define QPNP_M1_HIGH_THR_LSB 0x6b
-#define QPNP_M1_HIGH_THR_MSB 0x6c
-#define QPNP_M2_ADC_CH_SEL_CTL 0x70
-#define QPNP_M2_LOW_THR_LSB 0x71
-#define QPNP_M2_LOW_THR_MSB 0x72
-#define QPNP_M2_HIGH_THR_LSB 0x73
-#define QPNP_M2_HIGH_THR_MSB 0x74
-#define QPNP_M3_ADC_CH_SEL_CTL 0x78
-#define QPNP_M3_LOW_THR_LSB 0x79
-#define QPNP_M3_LOW_THR_MSB 0x7a
-#define QPNP_M3_HIGH_THR_LSB 0x7b
-#define QPNP_M3_HIGH_THR_MSB 0x7c
-#define QPNP_M4_ADC_CH_SEL_CTL 0x80
-#define QPNP_M4_LOW_THR_LSB 0x81
-#define QPNP_M4_LOW_THR_MSB 0x82
-#define QPNP_M4_HIGH_THR_LSB 0x83
-#define QPNP_M4_HIGH_THR_MSB 0x84
-#define QPNP_M5_ADC_CH_SEL_CTL 0x88
-#define QPNP_M5_LOW_THR_LSB 0x89
-#define QPNP_M5_LOW_THR_MSB 0x8a
-#define QPNP_M5_HIGH_THR_LSB 0x8b
-#define QPNP_M5_HIGH_THR_MSB 0x8c
-#define QPNP_M6_ADC_CH_SEL_CTL 0x90
-#define QPNP_M6_LOW_THR_LSB 0x91
-#define QPNP_M6_LOW_THR_MSB 0x92
-#define QPNP_M6_HIGH_THR_LSB 0x93
-#define QPNP_M6_HIGH_THR_MSB 0x94
-#define QPNP_M7_ADC_CH_SEL_CTL 0x98
-#define QPNP_M7_LOW_THR_LSB 0x99
-#define QPNP_M7_LOW_THR_MSB 0x9a
-#define QPNP_M7_HIGH_THR_LSB 0x9b
-#define QPNP_M7_HIGH_THR_MSB 0x9c
-
-#define QPNP_ADC_TM_MULTI_MEAS_EN 0x41
-#define QPNP_ADC_TM_MULTI_MEAS_EN_M0 BIT(0)
-#define QPNP_ADC_TM_MULTI_MEAS_EN_M1 BIT(1)
-#define QPNP_ADC_TM_MULTI_MEAS_EN_M2 BIT(2)
-#define QPNP_ADC_TM_MULTI_MEAS_EN_M3 BIT(3)
-#define QPNP_ADC_TM_MULTI_MEAS_EN_M4 BIT(4)
-#define QPNP_ADC_TM_MULTI_MEAS_EN_M5 BIT(5)
-#define QPNP_ADC_TM_MULTI_MEAS_EN_M6 BIT(6)
-#define QPNP_ADC_TM_MULTI_MEAS_EN_M7 BIT(7)
-#define QPNP_ADC_TM_LOW_THR_INT_EN 0x42
-#define QPNP_ADC_TM_LOW_THR_INT_EN_M0 BIT(0)
-#define QPNP_ADC_TM_LOW_THR_INT_EN_M1 BIT(1)
-#define QPNP_ADC_TM_LOW_THR_INT_EN_M2 BIT(2)
-#define QPNP_ADC_TM_LOW_THR_INT_EN_M3 BIT(3)
-#define QPNP_ADC_TM_LOW_THR_INT_EN_M4 BIT(4)
-#define QPNP_ADC_TM_LOW_THR_INT_EN_M5 BIT(5)
-#define QPNP_ADC_TM_LOW_THR_INT_EN_M6 BIT(6)
-#define QPNP_ADC_TM_LOW_THR_INT_EN_M7 BIT(7)
-#define QPNP_ADC_TM_HIGH_THR_INT_EN 0x43
-#define QPNP_ADC_TM_HIGH_THR_INT_EN_M0 BIT(0)
-#define QPNP_ADC_TM_HIGH_THR_INT_EN_M1 BIT(1)
-#define QPNP_ADC_TM_HIGH_THR_INT_EN_M2 BIT(2)
-#define QPNP_ADC_TM_HIGH_THR_INT_EN_M3 BIT(3)
-#define QPNP_ADC_TM_HIGH_THR_INT_EN_M4 BIT(4)
-#define QPNP_ADC_TM_HIGH_THR_INT_EN_M5 BIT(5)
-#define QPNP_ADC_TM_HIGH_THR_INT_EN_M6 BIT(6)
-#define QPNP_ADC_TM_HIGH_THR_INT_EN_M7 BIT(7)
-
-#define QPNP_ADC_TM_M0_MEAS_INTERVAL_CTL 0x59
-#define QPNP_ADC_TM_M1_MEAS_INTERVAL_CTL 0x6d
-#define QPNP_ADC_TM_M2_MEAS_INTERVAL_CTL 0x75
-#define QPNP_ADC_TM_M3_MEAS_INTERVAL_CTL 0x7d
-#define QPNP_ADC_TM_M4_MEAS_INTERVAL_CTL 0x85
-#define QPNP_ADC_TM_M5_MEAS_INTERVAL_CTL 0x8d
-#define QPNP_ADC_TM_M6_MEAS_INTERVAL_CTL 0x95
-#define QPNP_ADC_TM_M7_MEAS_INTERVAL_CTL 0x9d
#define QPNP_ADC_TM_STATUS1 0x8
#define QPNP_ADC_TM_STATUS_LOW 0xa
#define QPNP_ADC_TM_STATUS_HIGH 0xb
@@ -172,22 +62,22 @@
#define QPNP_ADC_TM_THR_LSB_MASK(val) (val & 0xff)
#define QPNP_ADC_TM_THR_MSB_MASK(val) ((val & 0xff00) >> 8)
-#define QPNP_MIN_TIME 2000
-#define QPNP_MAX_TIME 2100
-#define QPNP_RETRY 1000
-
/* QPNP ADC TM HC start */
-#define QPNP_BTM_HC_STATUS1 0x08
-#define QPNP_BTM_HC_STATUS_LOW 0x0a
-#define QPNP_BTM_HC_STATUS_HIGH 0x0b
+#define QPNP_BTM_HC_STATUS1 0x08
+#define QPNP_BTM_HC_STATUS_LOW 0x0a
+#define QPNP_BTM_HC_STATUS_HIGH 0x0b
-#define QPNP_BTM_HC_ADC_DIG_PARAM 0x42
-#define QPNP_BTM_HC_FAST_AVG_CTL 0x43
-#define QPNP_BTM_EN_CTL1 0x46
-#define QPNP_BTM_CONV_REQ 0x47
+#define QPNP_BTM_HC_ADC_DIG_PARAM 0x42
+#define QPNP_BTM_HC_FAST_AVG_CTL 0x43
+#define QPNP_BTM_EN_CTL1 0x46
+#define QPNP_BTM_CONV_REQ 0x47
-#define QPNP_BTM_MEAS_INTERVAL_CTL 0x50
-#define QPNP_BTM_MEAS_INTERVAL_CTL2 0x51
+#define QPNP_BTM_MEAS_INTERVAL_CTL 0x50
+#define QPNP_BTM_MEAS_INTERVAL_CTL2 0x51
+#define QPNP_ADC_TM_MEAS_INTERVAL_TIME_SHIFT 0x3
+#define QPNP_ADC_TM_MEAS_INTERVAL_CTL2_SHIFT 0x4
+#define QPNP_ADC_TM_MEAS_INTERVAL_CTL2_MASK 0xf0
+#define QPNP_ADC_TM_MEAS_INTERVAL_CTL3_MASK 0xf
#define QPNP_BTM_Mn_ADC_CH_SEL_CTL(n) ((n * 8) + 0x60)
#define QPNP_BTM_Mn_LOW_THR0(n) ((n * 8) + 0x61)
@@ -208,6 +98,7 @@
#define QPNP_BTM_Mn_DATA0(n) ((n * 2) + 0xa0)
#define QPNP_BTM_Mn_DATA1(n) ((n * 2) + 0xa1)
+#define QPNP_BTM_CHANNELS 8
/* QPNP ADC TM HC end */
@@ -277,69 +168,6 @@
LIST_HEAD(qpnp_adc_tm_device_list);
-struct qpnp_adc_tm_trip_reg_type {
- enum qpnp_adc_tm_channel_select btm_amux_chan;
- uint16_t low_thr_lsb_addr;
- uint16_t low_thr_msb_addr;
- uint16_t high_thr_lsb_addr;
- uint16_t high_thr_msb_addr;
- u8 multi_meas_en;
- u8 low_thr_int_chan_en;
- u8 high_thr_int_chan_en;
- u8 meas_interval_ctl;
-};
-
-static struct qpnp_adc_tm_trip_reg_type adc_tm_data[] = {
- [QPNP_ADC_TM_CHAN0] = {QPNP_ADC_TM_M0_ADC_CH_SEL_CTL,
- QPNP_M0_LOW_THR_LSB,
- QPNP_M0_LOW_THR_MSB, QPNP_M0_HIGH_THR_LSB,
- QPNP_M0_HIGH_THR_MSB, QPNP_ADC_TM_MULTI_MEAS_EN_M0,
- QPNP_ADC_TM_LOW_THR_INT_EN_M0, QPNP_ADC_TM_HIGH_THR_INT_EN_M0,
- QPNP_ADC_TM_M0_MEAS_INTERVAL_CTL},
- [QPNP_ADC_TM_CHAN1] = {QPNP_ADC_TM_M1_ADC_CH_SEL_CTL,
- QPNP_M1_LOW_THR_LSB,
- QPNP_M1_LOW_THR_MSB, QPNP_M1_HIGH_THR_LSB,
- QPNP_M1_HIGH_THR_MSB, QPNP_ADC_TM_MULTI_MEAS_EN_M1,
- QPNP_ADC_TM_LOW_THR_INT_EN_M1, QPNP_ADC_TM_HIGH_THR_INT_EN_M1,
- QPNP_ADC_TM_M1_MEAS_INTERVAL_CTL},
- [QPNP_ADC_TM_CHAN2] = {QPNP_ADC_TM_M2_ADC_CH_SEL_CTL,
- QPNP_M2_LOW_THR_LSB,
- QPNP_M2_LOW_THR_MSB, QPNP_M2_HIGH_THR_LSB,
- QPNP_M2_HIGH_THR_MSB, QPNP_ADC_TM_MULTI_MEAS_EN_M2,
- QPNP_ADC_TM_LOW_THR_INT_EN_M2, QPNP_ADC_TM_HIGH_THR_INT_EN_M2,
- QPNP_ADC_TM_M2_MEAS_INTERVAL_CTL},
- [QPNP_ADC_TM_CHAN3] = {QPNP_ADC_TM_M3_ADC_CH_SEL_CTL,
- QPNP_M3_LOW_THR_LSB,
- QPNP_M3_LOW_THR_MSB, QPNP_M3_HIGH_THR_LSB,
- QPNP_M3_HIGH_THR_MSB, QPNP_ADC_TM_MULTI_MEAS_EN_M3,
- QPNP_ADC_TM_LOW_THR_INT_EN_M3, QPNP_ADC_TM_HIGH_THR_INT_EN_M3,
- QPNP_ADC_TM_M3_MEAS_INTERVAL_CTL},
- [QPNP_ADC_TM_CHAN4] = {QPNP_ADC_TM_M4_ADC_CH_SEL_CTL,
- QPNP_M4_LOW_THR_LSB,
- QPNP_M4_LOW_THR_MSB, QPNP_M4_HIGH_THR_LSB,
- QPNP_M4_HIGH_THR_MSB, QPNP_ADC_TM_MULTI_MEAS_EN_M4,
- QPNP_ADC_TM_LOW_THR_INT_EN_M4, QPNP_ADC_TM_HIGH_THR_INT_EN_M4,
- QPNP_ADC_TM_M4_MEAS_INTERVAL_CTL},
- [QPNP_ADC_TM_CHAN5] = {QPNP_ADC_TM_M5_ADC_CH_SEL_CTL,
- QPNP_M5_LOW_THR_LSB,
- QPNP_M5_LOW_THR_MSB, QPNP_M5_HIGH_THR_LSB,
- QPNP_M5_HIGH_THR_MSB, QPNP_ADC_TM_MULTI_MEAS_EN_M5,
- QPNP_ADC_TM_LOW_THR_INT_EN_M5, QPNP_ADC_TM_HIGH_THR_INT_EN_M5,
- QPNP_ADC_TM_M5_MEAS_INTERVAL_CTL},
- [QPNP_ADC_TM_CHAN6] = {QPNP_ADC_TM_M6_ADC_CH_SEL_CTL,
- QPNP_M6_LOW_THR_LSB,
- QPNP_M6_LOW_THR_MSB, QPNP_M6_HIGH_THR_LSB,
- QPNP_M6_HIGH_THR_MSB, QPNP_ADC_TM_MULTI_MEAS_EN_M6,
- QPNP_ADC_TM_LOW_THR_INT_EN_M6, QPNP_ADC_TM_HIGH_THR_INT_EN_M6,
- QPNP_ADC_TM_M6_MEAS_INTERVAL_CTL},
- [QPNP_ADC_TM_CHAN7] = {QPNP_ADC_TM_M7_ADC_CH_SEL_CTL,
- QPNP_M7_LOW_THR_LSB,
- QPNP_M7_LOW_THR_MSB, QPNP_M7_HIGH_THR_LSB,
- QPNP_M7_HIGH_THR_MSB, QPNP_ADC_TM_MULTI_MEAS_EN_M7,
- QPNP_ADC_TM_LOW_THR_INT_EN_M7, QPNP_ADC_TM_HIGH_THR_INT_EN_M7,
- QPNP_ADC_TM_M7_MEAS_INTERVAL_CTL},
-};
-
static struct qpnp_adc_tm_reverse_scale_fn adc_tm_rscale_fn[] = {
[SCALE_R_VBATT] = {qpnp_adc_vbatt_rscaler},
[SCALE_RBATT_THERM] = {qpnp_adc_btm_scaler},
@@ -380,33 +208,6 @@
return rc;
}
-static int32_t qpnp_adc_tm_fast_avg_en(struct qpnp_adc_tm_chip *chip,
- uint32_t *fast_avg_sample)
-{
- int rc = 0, version = 0;
- u8 fast_avg_en = 0;
-
- version = qpnp_adc_get_revid_version(chip->dev);
- if (!((version == QPNP_REV_ID_8916_1_0) ||
- (version == QPNP_REV_ID_8916_1_1) ||
- (version == QPNP_REV_ID_8916_2_0))) {
- pr_debug("fast-avg-en not required for this version\n");
- return rc;
- }
-
- fast_avg_en = QPNP_FAST_AVG_ENABLED;
- rc = qpnp_adc_tm_write_reg(chip, QPNP_FAST_AVG_EN, fast_avg_en, 1);
- if (rc < 0) {
- pr_err("adc-tm fast-avg enable err\n");
- return rc;
- }
-
- if (*fast_avg_sample >= 3)
- *fast_avg_sample = 2;
-
- return rc;
-}
-
static int qpnp_adc_tm_check_vreg_vote(struct qpnp_adc_tm_chip *chip)
{
int rc = 0;
@@ -443,13 +244,11 @@
return rc;
}
- if (chip->adc_tm_hc) {
- data = QPNP_ADC_CONV_REQ_EN;
- rc = qpnp_adc_tm_write_reg(chip, QPNP_BTM_CONV_REQ, data, 1);
- if (rc < 0) {
- pr_err("adc-tm enable failed\n");
- return rc;
- }
+ data = QPNP_ADC_CONV_REQ_EN;
+ rc = qpnp_adc_tm_write_reg(chip, QPNP_BTM_CONV_REQ, data, 1);
+ if (rc < 0) {
+ pr_err("adc-tm enable failed\n");
+ return rc;
}
return rc;
@@ -460,12 +259,10 @@
u8 data = 0;
int rc = 0;
- if (chip->adc_tm_hc) {
- rc = qpnp_adc_tm_write_reg(chip, QPNP_BTM_CONV_REQ, data, 1);
- if (rc < 0) {
- pr_err("adc-tm enable failed\n");
- return rc;
- }
+ rc = qpnp_adc_tm_write_reg(chip, QPNP_BTM_CONV_REQ, data, 1);
+ if (rc < 0) {
+ pr_err("adc-tm enable failed\n");
+ return rc;
}
rc = qpnp_adc_tm_write_reg(chip, QPNP_EN_CTL1, data, 1);
@@ -538,132 +335,11 @@
static int32_t qpnp_adc_tm_enable_if_channel_meas(
struct qpnp_adc_tm_chip *chip)
{
- u8 adc_tm_meas_en = 0, status_low = 0, status_high = 0;
int rc = 0;
- if (chip->adc_tm_hc) {
- rc = qpnp_adc_tm_rc_check_channel_en(chip);
- if (rc) {
- pr_err("adc_tm channel check failed\n");
- return rc;
- }
- } else {
- /* Check if a measurement request is still required */
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_MULTI_MEAS_EN,
- &adc_tm_meas_en, 1);
- if (rc) {
- pr_err("read status high failed with %d\n", rc);
- return rc;
- }
-
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_LOW_THR_INT_EN,
- &status_low, 1);
- if (rc) {
- pr_err("read status low failed with %d\n", rc);
- return rc;
- }
-
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_HIGH_THR_INT_EN,
- &status_high, 1);
- if (rc) {
- pr_err("read status high failed with %d\n", rc);
- return rc;
- }
-
- /* Enable only if there are pending measurement requests */
- if ((adc_tm_meas_en && status_high) ||
- (adc_tm_meas_en && status_low)) {
- qpnp_adc_tm_enable(chip);
-
- /* Request conversion */
- rc = qpnp_adc_tm_write_reg(chip, QPNP_CONV_REQ,
- QPNP_CONV_REQ_SET, 1);
- if (rc < 0) {
- pr_err("adc-tm request conversion failed\n");
- return rc;
- }
- } else {
- /* disable the vote if applicable */
- if (chip->adc_vote_enable && chip->adc->hkadc_ldo &&
- chip->adc->hkadc_ldo_ok) {
- qpnp_adc_disable_voltage(chip->adc);
- chip->adc_vote_enable = false;
- }
- }
- }
-
- return rc;
-}
-
-static int32_t qpnp_adc_tm_mode_select(struct qpnp_adc_tm_chip *chip,
- u8 mode_ctl)
-{
- int rc;
-
- mode_ctl |= (QPNP_ADC_TRIM_EN | QPNP_AMUX_TRIM_EN);
-
- /* VADC_BTM current sets mode to recurring measurements */
- rc = qpnp_adc_tm_write_reg(chip, QPNP_MODE_CTL, mode_ctl, 1);
- if (rc < 0)
- pr_err("adc-tm write mode selection err\n");
-
- return rc;
-}
-
-static int32_t qpnp_adc_tm_req_sts_check(struct qpnp_adc_tm_chip *chip)
-{
- u8 status1 = 0, mode_ctl = 0;
- int rc, count = 0;
-
- /* Re-enable the peripheral */
- rc = qpnp_adc_tm_enable(chip);
+ rc = qpnp_adc_tm_rc_check_channel_en(chip);
if (rc) {
- pr_err("adc-tm re-enable peripheral failed\n");
- return rc;
- }
-
- /* The VADC_TM bank needs to be disabled for new conversion request */
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_STATUS1, &status1, 1);
- if (rc) {
- pr_err("adc-tm read status1 failed\n");
- return rc;
- }
-
- /* Disable the bank if a conversion is occurring */
- while (status1 & QPNP_STATUS1_REQ_STS) {
- if (count > QPNP_RETRY) {
- pr_err("retry error=%d with 0x%x\n", count, status1);
- break;
- }
- /*
- * Wait time is based on the optimum sampling rate
- * and adding enough time buffer to account for ADC conversions
- * occurring on different peripheral banks
- */
- usleep_range(QPNP_MIN_TIME, QPNP_MAX_TIME);
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_STATUS1,
- &status1, 1);
- if (rc < 0) {
- pr_err("adc-tm disable failed\n");
- return rc;
- }
- count++;
- }
-
- if (!chip->adc_tm_hc) {
- /* Change the mode back to recurring measurement mode */
- mode_ctl = ADC_OP_MEASUREMENT_INTERVAL << QPNP_OP_MODE_SHIFT;
- rc = qpnp_adc_tm_mode_select(chip, mode_ctl);
- if (rc < 0) {
- pr_err("adc-tm mode change to recurring failed\n");
- return rc;
- }
- }
-
- /* Disable the peripheral */
- rc = qpnp_adc_tm_disable(chip);
- if (rc < 0) {
- pr_err("adc-tm peripheral disable failed\n");
+ pr_err("adc_tm channel check failed\n");
return rc;
}
@@ -676,20 +352,11 @@
int rc = 0, i;
bool chan_found = false;
- if (!chip->adc_tm_hc) {
- for (i = 0; i < QPNP_ADC_TM_CHAN_NONE; i++) {
- if (adc_tm_data[i].btm_amux_chan == btm_chan) {
- *btm_chan_idx = i;
- chan_found = true;
- }
- }
- } else {
- for (i = 0; i < chip->max_channels_available; i++) {
- if (chip->sensor[i].btm_channel_num == btm_chan) {
- *btm_chan_idx = i;
- chan_found = true;
- break;
- }
+ for (i = 0; i < chip->max_channels_available; i++) {
+ if (chip->sensor[i].btm_channel_num == btm_chan) {
+ *btm_chan_idx = i;
+ chan_found = true;
+ break;
}
}
@@ -760,12 +427,7 @@
switch (chip->sensor[chan_idx].timer_select) {
case ADC_MEAS_TIMER_SELECT1:
- if (!chip->adc_tm_hc)
- rc = qpnp_adc_tm_write_reg(chip,
- QPNP_ADC_TM_MEAS_INTERVAL_CTL,
- chip->sensor[chan_idx].meas_interval, 1);
- else
- rc = qpnp_adc_tm_write_reg(chip,
+ rc = qpnp_adc_tm_write_reg(chip,
QPNP_BTM_MEAS_INTERVAL_CTL,
chip->sensor[chan_idx].meas_interval, 1);
if (rc < 0) {
@@ -775,12 +437,7 @@
break;
case ADC_MEAS_TIMER_SELECT2:
/* Thermal channels uses timer2, default to 1 second */
- if (!chip->adc_tm_hc)
- rc = qpnp_adc_tm_read_reg(chip,
- QPNP_ADC_TM_MEAS_INTERVAL_CTL2,
- &meas_interval_timer2, 1);
- else
- rc = qpnp_adc_tm_read_reg(chip,
+ rc = qpnp_adc_tm_read_reg(chip,
QPNP_BTM_MEAS_INTERVAL_CTL2,
&meas_interval_timer2, 1);
if (rc < 0) {
@@ -791,12 +448,7 @@
timer_interval_store <<= QPNP_ADC_TM_MEAS_INTERVAL_CTL2_SHIFT;
timer_interval_store &= QPNP_ADC_TM_MEAS_INTERVAL_CTL2_MASK;
meas_interval_timer2 |= timer_interval_store;
- if (!chip->adc_tm_hc)
- rc = qpnp_adc_tm_write_reg(chip,
- QPNP_ADC_TM_MEAS_INTERVAL_CTL2,
- meas_interval_timer2, 1);
- else
- rc = qpnp_adc_tm_write_reg(chip,
+ rc = qpnp_adc_tm_write_reg(chip,
QPNP_BTM_MEAS_INTERVAL_CTL2,
meas_interval_timer2, 1);
if (rc < 0) {
@@ -805,12 +457,7 @@
}
break;
case ADC_MEAS_TIMER_SELECT3:
- if (!chip->adc_tm_hc)
- rc = qpnp_adc_tm_read_reg(chip,
- QPNP_ADC_TM_MEAS_INTERVAL_CTL2,
- &meas_interval_timer2, 1);
- else
- rc = qpnp_adc_tm_read_reg(chip,
+ rc = qpnp_adc_tm_read_reg(chip,
QPNP_BTM_MEAS_INTERVAL_CTL2,
&meas_interval_timer2, 1);
if (rc < 0) {
@@ -820,11 +467,6 @@
timer_interval_store = chip->sensor[chan_idx].meas_interval;
timer_interval_store &= QPNP_ADC_TM_MEAS_INTERVAL_CTL3_MASK;
meas_interval_timer2 |= timer_interval_store;
- if (!chip->adc_tm_hc)
- rc = qpnp_adc_tm_write_reg(chip,
- QPNP_ADC_TM_MEAS_INTERVAL_CTL2,
- meas_interval_timer2, 1);
- else
rc = qpnp_adc_tm_write_reg(chip,
QPNP_BTM_MEAS_INTERVAL_CTL2,
meas_interval_timer2, 1);
@@ -844,14 +486,9 @@
pr_err("Invalid btm channel idx\n");
return rc;
}
- if (!chip->adc_tm_hc)
- rc = qpnp_adc_tm_write_reg(chip,
- adc_tm_data[btm_chan_idx].meas_interval_ctl,
- chip->sensor[chan_idx].timer_select, 1);
- else
- rc = qpnp_adc_tm_write_reg(chip,
- QPNP_BTM_Mn_MEAS_INTERVAL_CTL(btm_chan_idx),
- chip->sensor[chan_idx].timer_select, 1);
+ rc = qpnp_adc_tm_write_reg(chip,
+ QPNP_BTM_Mn_MEAS_INTERVAL_CTL(btm_chan_idx),
+ chip->sensor[chan_idx].timer_select, 1);
if (rc < 0) {
pr_err("TM channel timer configure failed\n");
return rc;
@@ -934,67 +571,6 @@
return rc;
}
-static int32_t qpnp_adc_tm_read_thr_value(struct qpnp_adc_tm_chip *chip,
- uint32_t btm_chan)
-{
- int rc = 0;
- u8 data_lsb = 0, data_msb = 0;
- uint32_t btm_chan_idx = 0;
- int32_t low_thr = 0, high_thr = 0;
-
- if (!chip->adc_tm_hc) {
- pr_err("Not applicable for VADC HC peripheral\n");
- return -EINVAL;
- }
-
- rc = qpnp_adc_tm_get_btm_idx(chip, btm_chan, &btm_chan_idx);
- if (rc < 0) {
- pr_err("Invalid btm channel idx\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_read_reg(chip,
- adc_tm_data[btm_chan_idx].low_thr_lsb_addr,
- &data_lsb, 1);
- if (rc < 0) {
- pr_err("low threshold lsb setting failed\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_read_reg(chip,
- adc_tm_data[btm_chan_idx].low_thr_msb_addr,
- &data_msb, 1);
- if (rc < 0) {
- pr_err("low threshold msb setting failed\n");
- return rc;
- }
-
- low_thr = (data_msb << 8) | data_lsb;
-
- rc = qpnp_adc_tm_read_reg(chip,
- adc_tm_data[btm_chan_idx].high_thr_lsb_addr,
- &data_lsb, 1);
- if (rc < 0) {
- pr_err("high threshold lsb setting failed\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_read_reg(chip,
- adc_tm_data[btm_chan_idx].high_thr_msb_addr,
- &data_msb, 1);
- if (rc < 0) {
- pr_err("high threshold msb setting failed\n");
- return rc;
- }
-
- high_thr = (data_msb << 8) | data_lsb;
-
- pr_debug("configured thresholds high:0x%x and low:0x%x\n",
- high_thr, low_thr);
-
- return rc;
-}
-
static int32_t qpnp_adc_tm_thr_update(struct qpnp_adc_tm_chip *chip,
uint32_t btm_chan, int32_t high_thr, int32_t low_thr)
{
@@ -1007,69 +583,36 @@
return rc;
}
- if (!chip->adc_tm_hc) {
- rc = qpnp_adc_tm_write_reg(chip,
- adc_tm_data[btm_chan_idx].low_thr_lsb_addr,
- QPNP_ADC_TM_THR_LSB_MASK(low_thr), 1);
- if (rc < 0) {
- pr_err("low threshold lsb setting failed\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_write_reg(chip,
- adc_tm_data[btm_chan_idx].low_thr_msb_addr,
- QPNP_ADC_TM_THR_MSB_MASK(low_thr), 1);
- if (rc < 0) {
- pr_err("low threshold msb setting failed\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_write_reg(chip,
- adc_tm_data[btm_chan_idx].high_thr_lsb_addr,
- QPNP_ADC_TM_THR_LSB_MASK(high_thr), 1);
- if (rc < 0) {
- pr_err("high threshold lsb setting failed\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_write_reg(chip,
- adc_tm_data[btm_chan_idx].high_thr_msb_addr,
- QPNP_ADC_TM_THR_MSB_MASK(high_thr), 1);
- if (rc < 0)
- pr_err("high threshold msb setting failed\n");
- } else {
- rc = qpnp_adc_tm_write_reg(chip,
- QPNP_BTM_Mn_LOW_THR0(btm_chan_idx),
- QPNP_ADC_TM_THR_LSB_MASK(low_thr), 1);
- if (rc < 0) {
- pr_err("low threshold lsb setting failed\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_write_reg(chip,
- QPNP_BTM_Mn_LOW_THR1(btm_chan_idx),
- QPNP_ADC_TM_THR_MSB_MASK(low_thr), 1);
- if (rc < 0) {
- pr_err("low threshold msb setting failed\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_write_reg(chip,
- QPNP_BTM_Mn_HIGH_THR0(btm_chan_idx),
- QPNP_ADC_TM_THR_LSB_MASK(high_thr), 1);
- if (rc < 0) {
- pr_err("high threshold lsb setting failed\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_write_reg(chip,
- QPNP_BTM_Mn_HIGH_THR1(btm_chan_idx),
- QPNP_ADC_TM_THR_MSB_MASK(high_thr), 1);
- if (rc < 0)
- pr_err("high threshold msb setting failed\n");
-
+ rc = qpnp_adc_tm_write_reg(chip,
+ QPNP_BTM_Mn_LOW_THR0(btm_chan_idx),
+ QPNP_ADC_TM_THR_LSB_MASK(low_thr), 1);
+ if (rc < 0) {
+ pr_err("low threshold lsb setting failed\n");
+ return rc;
}
+ rc = qpnp_adc_tm_write_reg(chip,
+ QPNP_BTM_Mn_LOW_THR1(btm_chan_idx),
+ QPNP_ADC_TM_THR_MSB_MASK(low_thr), 1);
+ if (rc < 0) {
+ pr_err("low threshold msb setting failed\n");
+ return rc;
+ }
+
+ rc = qpnp_adc_tm_write_reg(chip,
+ QPNP_BTM_Mn_HIGH_THR0(btm_chan_idx),
+ QPNP_ADC_TM_THR_LSB_MASK(high_thr), 1);
+ if (rc < 0) {
+ pr_err("high threshold lsb setting failed\n");
+ return rc;
+ }
+
+ rc = qpnp_adc_tm_write_reg(chip,
+ QPNP_BTM_Mn_HIGH_THR1(btm_chan_idx),
+ QPNP_ADC_TM_THR_MSB_MASK(high_thr), 1);
+ if (rc < 0)
+ pr_err("high threshold msb setting failed\n");
+
pr_debug("client requested high:%d and low:%d\n",
high_thr, low_thr);
@@ -1206,14 +749,9 @@
pr_debug("low sensor mask:%x with state:%d\n",
sensor_mask, chan_prop->state_request);
/* Enable low threshold's interrupt */
- if (!chip->adc_tm_hc)
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_ADC_TM_LOW_THR_INT_EN,
- sensor_mask, true);
- else
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_BTM_Mn_EN(btm_chan_idx),
- QPNP_BTM_Mn_LOW_THR_INT_EN, true);
+ rc = qpnp_adc_tm_reg_update(chip,
+ QPNP_BTM_Mn_EN(btm_chan_idx),
+ QPNP_BTM_Mn_LOW_THR_INT_EN, true);
if (rc < 0) {
pr_err("low thr enable err:%d\n", btm_chan);
return rc;
@@ -1223,14 +761,9 @@
if (high_thr_set) {
/* Enable high threshold's interrupt */
pr_debug("high sensor mask:%x\n", sensor_mask);
- if (!chip->adc_tm_hc)
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_ADC_TM_HIGH_THR_INT_EN,
- sensor_mask, true);
- else
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_BTM_Mn_EN(btm_chan_idx),
- QPNP_BTM_Mn_HIGH_THR_INT_EN, true);
+ rc = qpnp_adc_tm_reg_update(chip,
+ QPNP_BTM_Mn_EN(btm_chan_idx),
+ QPNP_BTM_Mn_HIGH_THR_INT_EN, true);
if (rc < 0) {
pr_err("high thr enable err:%d\n", btm_chan);
return rc;
@@ -1239,11 +772,7 @@
}
/* Enable corresponding BTM channel measurement */
- if (!chip->adc_tm_hc)
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_ADC_TM_MULTI_MEAS_EN, sensor_mask, true);
- else
- rc = qpnp_adc_tm_reg_update(chip, QPNP_BTM_Mn_EN(btm_chan_idx),
+ rc = qpnp_adc_tm_reg_update(chip, QPNP_BTM_Mn_EN(btm_chan_idx),
QPNP_BTM_Mn_MEAS_EN, true);
if (rc < 0) {
pr_err("multi measurement en failed\n");
@@ -1358,135 +887,12 @@
return 0;
}
-static int32_t qpnp_adc_tm_configure(struct qpnp_adc_tm_chip *chip,
- struct qpnp_adc_amux_properties *chan_prop)
-{
- u8 decimation = 0, op_cntrl = 0, mode_ctl = 0;
- int rc = 0;
- uint32_t btm_chan = 0;
-
- /* Set measurement in single measurement mode */
- mode_ctl = ADC_OP_NORMAL_MODE << QPNP_OP_MODE_SHIFT;
- rc = qpnp_adc_tm_mode_select(chip, mode_ctl);
- if (rc < 0) {
- pr_err("adc-tm single mode select failed\n");
- return rc;
- }
-
- /* Disable bank */
- rc = qpnp_adc_tm_disable(chip);
- if (rc)
- return rc;
-
- /* Check if a conversion is in progress */
- rc = qpnp_adc_tm_req_sts_check(chip);
- if (rc < 0) {
- pr_err("adc-tm req_sts check failed\n");
- return rc;
- }
-
- /* Configure AMUX channel select for the corresponding BTM channel*/
- btm_chan = chan_prop->chan_prop->tm_channel_select;
- rc = qpnp_adc_tm_write_reg(chip, btm_chan, chan_prop->amux_channel, 1);
- if (rc < 0) {
- pr_err("adc-tm channel selection err\n");
- return rc;
- }
-
- /* Digital parameter setup */
- decimation |= chan_prop->decimation <<
- QPNP_ADC_DIG_DEC_RATIO_SEL_SHIFT;
- rc = qpnp_adc_tm_write_reg(chip, QPNP_ADC_DIG_PARAM, decimation, 1);
- if (rc < 0) {
- pr_err("adc-tm digital parameter setup err\n");
- return rc;
- }
-
- /* Hardware setting time */
- rc = qpnp_adc_tm_write_reg(chip, QPNP_HW_SETTLE_DELAY,
- chan_prop->hw_settle_time, 1);
- if (rc < 0) {
- pr_err("adc-tm hw settling time setup err\n");
- return rc;
- }
-
- /* Fast averaging setup/enable */
- rc = qpnp_adc_tm_fast_avg_en(chip, &chan_prop->fast_avg_setup);
- if (rc < 0) {
- pr_err("adc-tm fast-avg enable err\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_write_reg(chip, QPNP_FAST_AVG_CTL,
- chan_prop->fast_avg_setup, 1);
- if (rc < 0) {
- pr_err("adc-tm fast-avg setup err\n");
- return rc;
- }
-
- /* Measurement interval setup */
- rc = qpnp_adc_tm_timer_interval_select(chip, btm_chan,
- chan_prop->chan_prop);
- if (rc < 0) {
- pr_err("adc-tm timer select failed\n");
- return rc;
- }
-
- /* Channel configuration setup */
- rc = qpnp_adc_tm_channel_configure(chip, btm_chan,
- chan_prop->chan_prop, chan_prop->amux_channel);
- if (rc < 0) {
- pr_err("adc-tm channel configure failed\n");
- return rc;
- }
-
- /* Recurring interval measurement enable */
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_MEAS_INTERVAL_OP_CTL,
- &op_cntrl, 1);
- op_cntrl |= QPNP_ADC_MEAS_INTERVAL_OP;
- rc = qpnp_adc_tm_reg_update(chip, QPNP_ADC_MEAS_INTERVAL_OP_CTL,
- op_cntrl, true);
- if (rc < 0) {
- pr_err("adc-tm meas interval op configure failed\n");
- return rc;
- }
-
- /* Enable bank */
- rc = qpnp_adc_tm_enable(chip);
- if (rc)
- return rc;
-
- /* Request conversion */
- rc = qpnp_adc_tm_write_reg(chip, QPNP_CONV_REQ, QPNP_CONV_REQ_SET, 1);
- if (rc < 0) {
- pr_err("adc-tm request conversion failed\n");
- return rc;
- }
-
- return 0;
-}
-
-static int qpnp_adc_tm_get_mode(struct thermal_zone_device *thermal,
- enum thermal_device_mode *mode)
-{
- struct qpnp_adc_tm_sensor *adc_tm = thermal->devdata;
-
- if ((IS_ERR(adc_tm)) || qpnp_adc_tm_check_revision(
- adc_tm->chip, adc_tm->btm_channel_num))
- return -EINVAL;
-
- *mode = adc_tm->mode;
-
- return 0;
-}
-
-static int qpnp_adc_tm_set_mode(struct thermal_zone_device *thermal,
+static int qpnp_adc_tm_set_mode(struct qpnp_adc_tm_sensor *adc_tm,
enum thermal_device_mode mode)
{
- struct qpnp_adc_tm_sensor *adc_tm = thermal->devdata;
struct qpnp_adc_tm_chip *chip = adc_tm->chip;
int rc = 0, channel;
- u8 sensor_mask = 0, mode_ctl = 0;
+ u8 sensor_mask = 0;
uint32_t btm_chan_idx = 0, btm_chan = 0;
if (qpnp_adc_tm_is_valid(chip)) {
@@ -1525,32 +931,14 @@
chip->adc->amux_prop->calib_type =
chip->adc->adc_channels[channel].calib_type;
- if (!chip->adc_tm_hc) {
- rc = qpnp_adc_tm_configure(chip, chip->adc->amux_prop);
- if (rc) {
- pr_err("adc-tm configure failed with %d\n", rc);
- goto fail;
- }
- } else {
- rc = qpnp_adc_tm_hc_configure(chip,
- chip->adc->amux_prop);
- if (rc) {
- pr_err("hc configure failed with %d\n", rc);
- goto fail;
- }
+ rc = qpnp_adc_tm_hc_configure(chip, chip->adc->amux_prop);
+ if (rc) {
+ pr_err("hc configure failed with %d\n", rc);
+ goto fail;
}
} else if (mode == THERMAL_DEVICE_DISABLED) {
sensor_mask = 1 << adc_tm->sensor_num;
- if (!chip->adc_tm_hc) {
- mode_ctl = ADC_OP_NORMAL_MODE << QPNP_OP_MODE_SHIFT;
- rc = qpnp_adc_tm_mode_select(chip, mode_ctl);
- if (rc < 0) {
- pr_err("adc-tm single mode select failed\n");
- goto fail;
- }
- }
-
/* Disable bank */
rc = qpnp_adc_tm_disable(chip);
if (rc < 0) {
@@ -1558,28 +946,12 @@
goto fail;
}
- if (!chip->adc_tm_hc) {
- /* Check if a conversion is in progress */
- rc = qpnp_adc_tm_req_sts_check(chip);
- if (rc < 0) {
- pr_err("adc-tm req_sts check failed\n");
- goto fail;
- }
-
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_ADC_TM_MULTI_MEAS_EN, sensor_mask, false);
- if (rc < 0) {
- pr_err("multi measurement update failed\n");
- goto fail;
- }
- } else {
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_BTM_Mn_EN(btm_chan_idx),
- QPNP_BTM_Mn_MEAS_EN, false);
- if (rc < 0) {
- pr_err("multi measurement disable failed\n");
- goto fail;
- }
+ rc = qpnp_adc_tm_reg_update(chip,
+ QPNP_BTM_Mn_EN(btm_chan_idx),
+ QPNP_BTM_Mn_MEAS_EN, false);
+ if (rc < 0) {
+ pr_err("multi measurement disable failed\n");
+ goto fail;
}
rc = qpnp_adc_tm_enable_if_channel_meas(chip);
@@ -1597,11 +969,13 @@
return 0;
}
-static int qpnp_adc_tm_get_trip_type(struct thermal_zone_device *thermal,
- int trip, enum thermal_trip_type *type)
+static int qpnp_adc_tm_activate_trip_type(struct qpnp_adc_tm_sensor *adc_tm,
+ int trip, enum thermal_trip_activation_mode mode)
{
- struct qpnp_adc_tm_sensor *adc_tm = thermal->devdata;
struct qpnp_adc_tm_chip *chip = adc_tm->chip;
+ int rc = 0, sensor_mask = 0;
+ bool state = false;
+ uint32_t btm_chan_idx = 0, btm_chan = 0;
if (qpnp_adc_tm_is_valid(chip))
return -ENODEV;
@@ -1609,110 +983,48 @@
if (qpnp_adc_tm_check_revision(chip, adc_tm->btm_channel_num))
return -EINVAL;
- switch (trip) {
- case ADC_TM_TRIP_HIGH_WARM:
- *type = THERMAL_TRIP_CONFIGURABLE_HI;
- break;
- case ADC_TM_TRIP_LOW_COOL:
- *type = THERMAL_TRIP_CONFIGURABLE_LOW;
- break;
- default:
- return -EINVAL;
- }
+ if (mode == THERMAL_TRIP_ACTIVATION_ENABLED)
+ state = true;
- return 0;
-}
+ sensor_mask = 1 << adc_tm->sensor_num;
-static int qpnp_adc_tm_get_trip_temp(struct thermal_zone_device *thermal,
- int trip, int *temp)
-{
- struct qpnp_adc_tm_sensor *adc_tm_sensor = thermal->devdata;
- struct qpnp_adc_tm_chip *chip = adc_tm_sensor->chip;
- int64_t result = 0;
- u8 trip_cool_thr0, trip_cool_thr1, trip_warm_thr0, trip_warm_thr1;
- unsigned int reg, rc = 0;
- uint16_t reg_low_thr_lsb, reg_low_thr_msb;
- uint16_t reg_high_thr_lsb, reg_high_thr_msb;
- uint32_t btm_chan_idx = 0, btm_chan = 0;
+ pr_debug("Sensor number:%x with state:%d\n",
+ adc_tm->sensor_num, state);
- if (qpnp_adc_tm_is_valid(chip))
- return -ENODEV;
-
- if (qpnp_adc_tm_check_revision(chip, adc_tm_sensor->btm_channel_num))
- return -EINVAL;
-
- btm_chan = adc_tm_sensor->btm_channel_num;
+ btm_chan = adc_tm->btm_channel_num;
rc = qpnp_adc_tm_get_btm_idx(chip, btm_chan, &btm_chan_idx);
if (rc < 0) {
pr_err("Invalid btm channel idx\n");
return rc;
}
- if (!chip->adc_tm_hc) {
- reg_low_thr_lsb = adc_tm_data[btm_chan_idx].low_thr_lsb_addr;
- reg_low_thr_msb = adc_tm_data[btm_chan_idx].low_thr_msb_addr;
- reg_high_thr_lsb = adc_tm_data[btm_chan_idx].high_thr_lsb_addr;
- reg_high_thr_msb = adc_tm_data[btm_chan_idx].high_thr_msb_addr;
- } else {
- reg_low_thr_lsb = QPNP_BTM_Mn_LOW_THR0(btm_chan_idx);
- reg_low_thr_msb = QPNP_BTM_Mn_LOW_THR1(btm_chan_idx);
- reg_high_thr_lsb = QPNP_BTM_Mn_HIGH_THR0(btm_chan_idx);
- reg_high_thr_msb = QPNP_BTM_Mn_HIGH_THR1(btm_chan_idx);
- }
-
switch (trip) {
case ADC_TM_TRIP_HIGH_WARM:
- rc = qpnp_adc_tm_read_reg(chip, reg_low_thr_lsb,
- &trip_warm_thr0, 1);
- if (rc) {
- pr_err("adc-tm low_thr_lsb err\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_read_reg(chip, reg_low_thr_msb,
- &trip_warm_thr1, 1);
- if (rc) {
- pr_err("adc-tm low_thr_msb err\n");
- return rc;
- }
- reg = (trip_warm_thr1 << 8) | trip_warm_thr0;
+ /* low_thr (lower voltage) for higher temp */
+ rc = qpnp_adc_tm_reg_update(chip,
+ QPNP_BTM_Mn_EN(btm_chan_idx),
+ QPNP_BTM_Mn_LOW_THR_INT_EN, state);
+ if (rc)
+ pr_err("channel:%x failed\n", btm_chan);
break;
case ADC_TM_TRIP_LOW_COOL:
- rc = qpnp_adc_tm_read_reg(chip, reg_high_thr_lsb,
- &trip_cool_thr0, 1);
- if (rc) {
- pr_err("adc-tm_tm high_thr_lsb err\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_read_reg(chip, reg_high_thr_msb,
- &trip_cool_thr1, 1);
- if (rc) {
- pr_err("adc-tm_tm high_thr_lsb err\n");
- return rc;
- }
- reg = (trip_cool_thr1 << 8) | trip_cool_thr0;
+ /* high_thr (higher voltage) for cooler temp */
+ rc = qpnp_adc_tm_reg_update(chip,
+ QPNP_BTM_Mn_EN(btm_chan_idx),
+ QPNP_BTM_Mn_HIGH_THR_INT_EN, state);
+ if (rc)
+ pr_err("channel:%x failed\n", btm_chan);
break;
default:
return -EINVAL;
}
- rc = qpnp_adc_tm_scale_voltage_therm_pu2(chip->vadc_dev,
- chip->adc->adc_prop, reg, &result);
- if (rc < 0) {
- pr_err("Failed to lookup the therm thresholds\n");
- return rc;
- }
-
- *temp = result;
-
- return 0;
+ return rc;
}
-static int qpnp_adc_tm_set_trip_temp(struct thermal_zone_device *thermal,
- int trip, int temp)
+static int qpnp_adc_tm_set_trip_temp(void *data, int low_temp, int high_temp)
{
- struct qpnp_adc_tm_sensor *adc_tm = thermal->devdata;
+ struct qpnp_adc_tm_sensor *adc_tm = data;
struct qpnp_adc_tm_chip *chip = adc_tm->chip;
struct qpnp_adc_tm_config tm_config;
u8 trip_cool_thr0, trip_cool_thr1, trip_warm_thr0, trip_warm_thr1;
@@ -1729,19 +1041,18 @@
tm_config.channel = adc_tm->vadc_channel_num;
tm_config.high_thr_temp = tm_config.low_thr_temp = 0;
- switch (trip) {
- case ADC_TM_TRIP_HIGH_WARM:
- tm_config.high_thr_temp = temp;
- break;
- case ADC_TM_TRIP_LOW_COOL:
- tm_config.low_thr_temp = temp;
- break;
- default:
+ if (high_temp != INT_MAX)
+ tm_config.high_thr_temp = high_temp;
+ if (low_temp != INT_MIN)
+ tm_config.low_thr_temp = low_temp;
+
+ if ((high_temp == INT_MAX) && (low_temp == INT_MIN)) {
+ pr_err("No trips to set\n");
return -EINVAL;
}
- pr_debug("requested a high - %d and low - %d with trip - %d\n",
- tm_config.high_thr_temp, tm_config.low_thr_temp, trip);
+ pr_debug("requested a high - %d and low - %d\n",
+ tm_config.high_thr_temp, tm_config.low_thr_temp);
rc = qpnp_adc_tm_scale_therm_voltage_pu2(chip->vadc_dev,
chip->adc->adc_prop, &tm_config);
if (rc < 0) {
@@ -1764,20 +1075,12 @@
return rc;
}
- if (!chip->adc_tm_hc) {
- reg_low_thr_lsb = adc_tm_data[btm_chan_idx].low_thr_lsb_addr;
- reg_low_thr_msb = adc_tm_data[btm_chan_idx].low_thr_msb_addr;
- reg_high_thr_lsb = adc_tm_data[btm_chan_idx].high_thr_lsb_addr;
- reg_high_thr_msb = adc_tm_data[btm_chan_idx].high_thr_msb_addr;
- } else {
- reg_low_thr_lsb = QPNP_BTM_Mn_LOW_THR0(btm_chan_idx);
- reg_low_thr_msb = QPNP_BTM_Mn_LOW_THR1(btm_chan_idx);
- reg_high_thr_lsb = QPNP_BTM_Mn_HIGH_THR0(btm_chan_idx);
- reg_high_thr_msb = QPNP_BTM_Mn_HIGH_THR1(btm_chan_idx);
- }
+ reg_low_thr_lsb = QPNP_BTM_Mn_LOW_THR0(btm_chan_idx);
+ reg_low_thr_msb = QPNP_BTM_Mn_LOW_THR1(btm_chan_idx);
+ reg_high_thr_lsb = QPNP_BTM_Mn_HIGH_THR0(btm_chan_idx);
+ reg_high_thr_msb = QPNP_BTM_Mn_HIGH_THR1(btm_chan_idx);
- switch (trip) {
- case ADC_TM_TRIP_HIGH_WARM:
+ if (high_temp != INT_MAX) {
rc = qpnp_adc_tm_write_reg(chip, reg_low_thr_lsb,
trip_cool_thr0, 1);
if (rc) {
@@ -1791,9 +1094,26 @@
pr_err("adc-tm_tm read threshold err\n");
return rc;
}
- adc_tm->low_thr = tm_config.high_thr_voltage;
- break;
- case ADC_TM_TRIP_LOW_COOL:
+ adc_tm->low_thr = tm_config.high_thr_voltage;
+
+ rc = qpnp_adc_tm_activate_trip_type(adc_tm,
+ ADC_TM_TRIP_HIGH_WARM,
+ THERMAL_TRIP_ACTIVATION_ENABLED);
+ if (rc) {
+ pr_err("adc-tm warm activation failed\n");
+ return rc;
+ }
+ } else {
+ rc = qpnp_adc_tm_activate_trip_type(adc_tm,
+ ADC_TM_TRIP_HIGH_WARM,
+ THERMAL_TRIP_ACTIVATION_DISABLED);
+ if (rc) {
+ pr_err("adc-tm warm deactivation failed\n");
+ return rc;
+ }
+ }
+
+ if (low_temp != INT_MIN) {
rc = qpnp_adc_tm_write_reg(chip, reg_high_thr_lsb,
trip_warm_thr0, 1);
if (rc) {
@@ -1807,10 +1127,37 @@
pr_err("adc-tm_tm read threshold err\n");
return rc;
}
- adc_tm->high_thr = tm_config.low_thr_voltage;
- break;
- default:
- return -EINVAL;
+ adc_tm->high_thr = tm_config.low_thr_voltage;
+
+ rc = qpnp_adc_tm_activate_trip_type(adc_tm,
+ ADC_TM_TRIP_LOW_COOL,
+ THERMAL_TRIP_ACTIVATION_ENABLED);
+ if (rc) {
+ pr_err("adc-tm cool activation failed\n");
+ return rc;
+ }
+ } else {
+ rc = qpnp_adc_tm_activate_trip_type(adc_tm,
+ ADC_TM_TRIP_LOW_COOL,
+ THERMAL_TRIP_ACTIVATION_DISABLED);
+ if (rc) {
+ pr_err("adc-tm cool deactivation failed\n");
+ return rc;
+ }
+ }
+
+ if ((high_temp != INT_MAX) || (low_temp != INT_MIN)) {
+ rc = qpnp_adc_tm_set_mode(adc_tm, THERMAL_DEVICE_ENABLED);
+ if (rc) {
+ pr_err("sensor enabled failed\n");
+ return rc;
+ }
+ } else {
+ rc = qpnp_adc_tm_set_mode(adc_tm, THERMAL_DEVICE_DISABLED);
+ if (rc) {
+ pr_err("sensor disable failed\n");
+ return rc;
+ }
}
return 0;
@@ -1878,9 +1225,8 @@
struct qpnp_adc_tm_chip *chip = adc_tm->chip;
if (adc_tm->thermal_node) {
- sysfs_notify(&adc_tm->tz_dev->device.kobj,
- NULL, "type");
pr_debug("notifying uspace client\n");
+ of_thermal_handle_trip(adc_tm->tz_dev);
} else {
if (adc_tm->scale_type == SCALE_RBATT_THERM)
notify_battery_therm(adc_tm);
@@ -1891,222 +1237,23 @@
atomic_dec(&chip->wq_cnt);
}
-static int qpnp_adc_tm_activate_trip_type(struct thermal_zone_device *thermal,
- int trip, enum thermal_trip_activation_mode mode)
-{
- struct qpnp_adc_tm_sensor *adc_tm = thermal->devdata;
- struct qpnp_adc_tm_chip *chip = adc_tm->chip;
- int rc = 0, sensor_mask = 0;
- u8 thr_int_en = 0;
- bool state = false;
- uint32_t btm_chan_idx = 0, btm_chan = 0;
-
- if (qpnp_adc_tm_is_valid(chip))
- return -ENODEV;
-
- if (qpnp_adc_tm_check_revision(chip, adc_tm->btm_channel_num))
- return -EINVAL;
-
- if (mode == THERMAL_TRIP_ACTIVATION_ENABLED)
- state = true;
-
- sensor_mask = 1 << adc_tm->sensor_num;
-
- pr_debug("Sensor number:%x with state:%d\n",
- adc_tm->sensor_num, state);
-
- btm_chan = adc_tm->btm_channel_num;
- rc = qpnp_adc_tm_get_btm_idx(chip, btm_chan, &btm_chan_idx);
- if (rc < 0) {
- pr_err("Invalid btm channel idx\n");
- return rc;
- }
-
- switch (trip) {
- case ADC_TM_TRIP_HIGH_WARM:
- /* low_thr (lower voltage) for higher temp */
- thr_int_en = adc_tm_data[btm_chan_idx].low_thr_int_chan_en;
- if (!chip->adc_tm_hc)
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_ADC_TM_LOW_THR_INT_EN,
- sensor_mask, state);
- else
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_BTM_Mn_EN(btm_chan_idx),
- QPNP_BTM_Mn_LOW_THR_INT_EN, state);
- if (rc)
- pr_err("channel:%x failed\n", btm_chan);
- break;
- case ADC_TM_TRIP_LOW_COOL:
- /* high_thr (higher voltage) for cooler temp */
- thr_int_en = adc_tm_data[btm_chan_idx].high_thr_int_chan_en;
- if (!chip->adc_tm_hc)
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_ADC_TM_HIGH_THR_INT_EN,
- sensor_mask, state);
- else
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_BTM_Mn_EN(btm_chan_idx),
- QPNP_BTM_Mn_HIGH_THR_INT_EN, state);
- if (rc)
- pr_err("channel:%x failed\n", btm_chan);
- break;
- default:
- return -EINVAL;
- }
-
- return rc;
-}
-
-static int qpnp_adc_tm_recalib_request_check(struct qpnp_adc_tm_chip *chip,
- int sensor_num, u8 status_high, u8 *notify_check)
-{
- int rc = 0;
- u8 sensor_mask = 0, mode_ctl = 0;
- int32_t old_thr = 0, new_thr = 0;
- uint32_t channel, btm_chan_num, scale_type;
- struct qpnp_vadc_result result;
- struct qpnp_adc_thr_client_info *client_info = NULL;
- struct list_head *thr_list;
- bool status = false;
-
- if (!chip->adc_tm_recalib_check) {
- *notify_check = 1;
- return rc;
- }
-
- list_for_each(thr_list, &chip->sensor[sensor_num].thr_list) {
- client_info = list_entry(thr_list,
- struct qpnp_adc_thr_client_info, list);
- channel = client_info->btm_param->channel;
- btm_chan_num = chip->sensor[sensor_num].btm_channel_num;
- sensor_mask = 1 << sensor_num;
-
- rc = qpnp_vadc_read(chip->vadc_dev, channel, &result);
- if (rc < 0) {
- pr_err("failure to read vadc channel=%d\n",
- client_info->btm_param->channel);
- goto fail;
- }
- new_thr = result.physical;
-
- if (status_high)
- old_thr = client_info->btm_param->high_thr;
- else
- old_thr = client_info->btm_param->low_thr;
-
- if (new_thr > old_thr)
- status = (status_high) ? true : false;
- else
- status = (status_high) ? false : true;
-
- pr_debug(
- "recalib:sen=%d, new_thr=%d, new_thr_adc_code=0x%x, old_thr=%d status=%d valid_status=%d\n",
- sensor_num, new_thr, result.adc_code,
- old_thr, status_high, status);
-
- rc = qpnp_adc_tm_read_thr_value(chip, btm_chan_num);
- if (rc < 0) {
- pr_err("adc-tm thresholds read failed\n");
- goto fail;
- }
-
- if (status) {
- *notify_check = 1;
- pr_debug("Client can be notify\n");
- return rc;
- }
-
- pr_debug("Client can not be notify, restart measurement\n");
- /* Set measurement in single measurement mode */
- mode_ctl = ADC_OP_NORMAL_MODE << QPNP_OP_MODE_SHIFT;
- rc = qpnp_adc_tm_mode_select(chip, mode_ctl);
- if (rc < 0) {
- pr_err("adc-tm single mode select failed\n");
- goto fail;
- }
-
- /* Disable bank */
- rc = qpnp_adc_tm_disable(chip);
- if (rc < 0) {
- pr_err("adc-tm disable failed\n");
- goto fail;
- }
-
- /* Check if a conversion is in progress */
- rc = qpnp_adc_tm_req_sts_check(chip);
- if (rc < 0) {
- pr_err("adc-tm req_sts check failed\n");
- goto fail;
- }
-
- rc = qpnp_adc_tm_reg_update(chip, QPNP_ADC_TM_LOW_THR_INT_EN,
- sensor_mask, false);
- if (rc < 0) {
- pr_err("low threshold int write failed\n");
- goto fail;
- }
-
- rc = qpnp_adc_tm_reg_update(chip, QPNP_ADC_TM_HIGH_THR_INT_EN,
- sensor_mask, false);
- if (rc < 0) {
- pr_err("high threshold int enable failed\n");
- goto fail;
- }
-
- rc = qpnp_adc_tm_reg_update(chip, QPNP_ADC_TM_MULTI_MEAS_EN,
- sensor_mask, false);
- if (rc < 0) {
- pr_err("multi measurement en failed\n");
- goto fail;
- }
-
- /* restart measurement */
- scale_type = chip->sensor[sensor_num].scale_type;
- chip->adc->amux_prop->amux_channel = channel;
- chip->adc->amux_prop->decimation =
- chip->adc->adc_channels[sensor_num].adc_decimation;
- chip->adc->amux_prop->hw_settle_time =
- chip->adc->adc_channels[sensor_num].hw_settle_time;
- chip->adc->amux_prop->fast_avg_setup =
- chip->adc->adc_channels[sensor_num].fast_avg_setup;
- chip->adc->amux_prop->mode_sel =
- ADC_OP_MEASUREMENT_INTERVAL << QPNP_OP_MODE_SHIFT;
- adc_tm_rscale_fn[scale_type].chan(chip->vadc_dev,
- client_info->btm_param,
- &chip->adc->amux_prop->chan_prop->low_thr,
- &chip->adc->amux_prop->chan_prop->high_thr);
- qpnp_adc_tm_add_to_list(chip, sensor_num,
- client_info->btm_param,
- chip->adc->amux_prop->chan_prop);
- chip->adc->amux_prop->chan_prop->tm_channel_select =
- chip->sensor[sensor_num].btm_channel_num;
- chip->adc->amux_prop->chan_prop->state_request =
- client_info->btm_param->state_request;
-
- rc = qpnp_adc_tm_configure(chip, chip->adc->amux_prop);
- if (rc) {
- pr_err("adc-tm configure failed with %d\n", rc);
- goto fail;
- }
- *notify_check = 0;
- pr_debug("BTM channel reconfigured for measuremnt\n");
- }
-fail:
- return rc;
-}
-
static int qpnp_adc_tm_disable_rearm_high_thresholds(
struct qpnp_adc_tm_chip *chip, int sensor_num)
{
struct qpnp_adc_thr_client_info *client_info = NULL;
struct list_head *thr_list;
- uint32_t btm_chan_num = 0;
- u8 sensor_mask = 0, notify_check = 0;
+ uint32_t btm_chan_num = 0, btm_chan_idx = 0;
+ u8 sensor_mask = 0;
int rc = 0;
btm_chan_num = chip->sensor[sensor_num].btm_channel_num;
+ rc = qpnp_adc_tm_get_btm_idx(chip, btm_chan_num, &btm_chan_idx);
+ if (rc < 0) {
+ pr_err("Invalid btm channel idx\n");
+ return rc;
+ }
+
pr_debug("high:sen:%d, hs:0x%x, ls:0x%x, meas_en:0x%x\n",
sensor_num, chip->th_info.adc_tm_high_enable,
chip->th_info.adc_tm_low_enable,
@@ -2118,11 +1265,11 @@
*/
sensor_mask = 1 << sensor_num;
pr_debug("non thermal node - mask:%x\n", sensor_mask);
- rc = qpnp_adc_tm_recalib_request_check(chip,
- sensor_num, true, ¬ify_check);
- if (rc < 0 || !notify_check) {
- pr_debug("Calib recheck re-armed rc=%d\n", rc);
- chip->th_info.adc_tm_high_enable = 0;
+ rc = qpnp_adc_tm_reg_update(chip,
+ QPNP_BTM_Mn_EN(btm_chan_idx),
+ QPNP_BTM_Mn_HIGH_THR_INT_EN, false);
+ if (rc < 0) {
+ pr_err("high threshold int update failed\n");
return rc;
}
} else {
@@ -2134,7 +1281,7 @@
sensor_mask = 1 << sensor_num;
pr_debug("thermal node with mask:%x\n", sensor_mask);
rc = qpnp_adc_tm_activate_trip_type(
- chip->sensor[sensor_num].tz_dev,
+ &chip->sensor[sensor_num],
ADC_TM_TRIP_LOW_COOL,
THERMAL_TRIP_ACTIVATION_DISABLED);
if (rc < 0) {
@@ -2159,22 +1306,12 @@
}
qpnp_adc_tm_manage_thresholds(chip, sensor_num, btm_chan_num);
- if (!chip->adc_tm_hc) {
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_ADC_TM_MULTI_MEAS_EN,
- sensor_mask, false);
- if (rc < 0) {
- pr_err("multi meas disable failed\n");
- return rc;
- }
- } else {
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_BTM_Mn_EN(sensor_num),
- QPNP_BTM_Mn_MEAS_EN, false);
- if (rc < 0) {
- pr_err("multi meas disable failed\n");
- return rc;
- }
+ rc = qpnp_adc_tm_reg_update(chip,
+ QPNP_BTM_Mn_EN(sensor_num),
+ QPNP_BTM_Mn_MEAS_EN, false);
+ if (rc < 0) {
+ pr_err("multi meas disable failed\n");
+ return rc;
}
rc = qpnp_adc_tm_enable_if_channel_meas(chip);
@@ -2194,11 +1331,17 @@
{
struct qpnp_adc_thr_client_info *client_info = NULL;
struct list_head *thr_list;
- uint32_t btm_chan_num = 0;
- u8 sensor_mask = 0, notify_check = 0;
+ uint32_t btm_chan_num = 0, btm_chan_idx = 0;
+ u8 sensor_mask = 0;
int rc = 0;
btm_chan_num = chip->sensor[sensor_num].btm_channel_num;
+ rc = qpnp_adc_tm_get_btm_idx(chip, btm_chan_num, &btm_chan_idx);
+ if (rc < 0) {
+ pr_err("Invalid btm channel idx\n");
+ return rc;
+ }
+
pr_debug("low:sen:%d, hs:0x%x, ls:0x%x, meas_en:0x%x\n",
sensor_num, chip->th_info.adc_tm_high_enable,
chip->th_info.adc_tm_low_enable,
@@ -2208,20 +1351,13 @@
* For non thermal registered clients such as usb_id,
* vbatt, pmic_therm
*/
- pr_debug("non thermal node - mask:%x\n", sensor_mask);
- rc = qpnp_adc_tm_recalib_request_check(chip,
- sensor_num, false, ¬ify_check);
- if (rc < 0 || !notify_check) {
- pr_debug("Calib recheck re-armed rc=%d\n", rc);
- chip->th_info.adc_tm_low_enable = 0;
- return rc;
- }
sensor_mask = 1 << sensor_num;
+ pr_debug("non thermal node - mask:%x\n", sensor_mask);
rc = qpnp_adc_tm_reg_update(chip,
- QPNP_ADC_TM_LOW_THR_INT_EN,
- sensor_mask, false);
+ QPNP_BTM_Mn_EN(btm_chan_idx),
+ QPNP_BTM_Mn_LOW_THR_INT_EN, false);
if (rc < 0) {
- pr_err("low threshold int read failed\n");
+ pr_err("low threshold int update failed\n");
return rc;
}
} else {
@@ -2233,7 +1369,7 @@
sensor_mask = 1 << sensor_num;
pr_debug("thermal node with mask:%x\n", sensor_mask);
rc = qpnp_adc_tm_activate_trip_type(
- chip->sensor[sensor_num].tz_dev,
+ &chip->sensor[sensor_num],
ADC_TM_TRIP_HIGH_WARM,
THERMAL_TRIP_ACTIVATION_DISABLED);
if (rc < 0) {
@@ -2258,22 +1394,12 @@
}
qpnp_adc_tm_manage_thresholds(chip, sensor_num, btm_chan_num);
- if (!chip->adc_tm_hc) {
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_ADC_TM_MULTI_MEAS_EN,
- sensor_mask, false);
- if (rc < 0) {
- pr_err("multi meas disable failed\n");
- return rc;
- }
- } else {
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_BTM_Mn_EN(sensor_num),
- QPNP_BTM_Mn_MEAS_EN, false);
- if (rc < 0) {
- pr_err("multi meas disable failed\n");
- return rc;
- }
+ rc = qpnp_adc_tm_reg_update(chip,
+ QPNP_BTM_Mn_EN(sensor_num),
+ QPNP_BTM_Mn_MEAS_EN, false);
+ if (rc < 0) {
+ pr_err("multi meas disable failed\n");
+ return rc;
}
rc = qpnp_adc_tm_enable_if_channel_meas(chip);
@@ -2299,14 +1425,6 @@
mutex_lock(&chip->adc->adc_lock);
- if (!chip->adc_tm_hc) {
- rc = qpnp_adc_tm_req_sts_check(chip);
- if (rc) {
- pr_err("adc-tm-tm req sts check failed with %d\n", rc);
- goto fail;
- }
- }
-
while (sensor_num < chip->max_channels_available) {
if (chip->sensor[sensor_num].high_thr_triggered) {
rc = qpnp_adc_tm_disable_rearm_high_thresholds(
@@ -2364,93 +1482,6 @@
pr_err("adc-tm high thr work failed\n");
}
-static irqreturn_t qpnp_adc_tm_high_thr_isr(int irq, void *data)
-{
- struct qpnp_adc_tm_chip *chip = data;
- u8 mode_ctl = 0, status1 = 0, sensor_mask = 0;
- int rc = 0, sensor_notify_num = 0, i = 0, sensor_num = 0;
-
- mode_ctl = ADC_OP_NORMAL_MODE << QPNP_OP_MODE_SHIFT;
- /* Set measurement in single measurement mode */
- qpnp_adc_tm_mode_select(chip, mode_ctl);
-
- qpnp_adc_tm_disable(chip);
-
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_STATUS1, &status1, 1);
- if (rc) {
- pr_err("adc-tm read status1 failed\n");
- return IRQ_HANDLED;
- }
-
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_STATUS_HIGH,
- &chip->th_info.status_high, 1);
- if (rc) {
- pr_err("adc-tm-tm read status high failed with %d\n", rc);
- return IRQ_HANDLED;
- }
-
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_HIGH_THR_INT_EN,
- &chip->th_info.adc_tm_high_thr_set, 1);
- if (rc) {
- pr_err("adc-tm-tm read high thr failed with %d\n", rc);
- return IRQ_HANDLED;
- }
-
- /*
- * Check which interrupt threshold is lower and measure against the
- * enabled channel.
- */
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_MULTI_MEAS_EN,
- &chip->th_info.qpnp_adc_tm_meas_en, 1);
- if (rc) {
- pr_err("adc-tm-tm read status high failed with %d\n", rc);
- return IRQ_HANDLED;
- }
-
- chip->th_info.adc_tm_high_enable = chip->th_info.qpnp_adc_tm_meas_en &
- chip->th_info.status_high;
- chip->th_info.adc_tm_high_enable &= chip->th_info.adc_tm_high_thr_set;
-
- sensor_notify_num = chip->th_info.adc_tm_high_enable;
- while (i < chip->max_channels_available) {
- if ((sensor_notify_num & 0x1) == 1)
- sensor_num = i;
- sensor_notify_num >>= 1;
- i++;
- }
-
- if (!chip->sensor[sensor_num].thermal_node) {
- sensor_mask = 1 << sensor_num;
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_ADC_TM_HIGH_THR_INT_EN,
- sensor_mask, false);
- if (rc < 0) {
- pr_err("high threshold int read failed\n");
- return IRQ_HANDLED;
- }
- } else {
- /*
- * Uses the thermal sysfs registered device to disable
- * the corresponding high voltage threshold which
- * is triggered by low temp
- */
- pr_debug("thermal node with mask:%x\n", sensor_mask);
- rc = qpnp_adc_tm_activate_trip_type(
- chip->sensor[sensor_num].tz_dev,
- ADC_TM_TRIP_LOW_COOL,
- THERMAL_TRIP_ACTIVATION_DISABLED);
- if (rc < 0) {
- pr_err("notify error:%d\n", sensor_num);
- return IRQ_HANDLED;
- }
- }
-
- atomic_inc(&chip->wq_cnt);
- queue_work(chip->high_thr_wq, &chip->trigger_high_thr_work);
-
- return IRQ_HANDLED;
-}
-
static void qpnp_adc_tm_low_thr_work(struct work_struct *work)
{
struct qpnp_adc_tm_chip *chip = container_of(work,
@@ -2471,88 +1502,6 @@
pr_err("adc-tm low thr work failed\n");
}
-static irqreturn_t qpnp_adc_tm_low_thr_isr(int irq, void *data)
-{
- struct qpnp_adc_tm_chip *chip = data;
- u8 mode_ctl = 0, status1 = 0, sensor_mask = 0;
- int rc = 0, sensor_notify_num = 0, i = 0, sensor_num = 0;
-
- mode_ctl = ADC_OP_NORMAL_MODE << QPNP_OP_MODE_SHIFT;
- /* Set measurement in single measurement mode */
- qpnp_adc_tm_mode_select(chip, mode_ctl);
-
- qpnp_adc_tm_disable(chip);
-
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_STATUS1, &status1, 1);
- if (rc) {
- pr_err("adc-tm read status1 failed\n");
- return IRQ_HANDLED;
- }
-
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_STATUS_LOW,
- &chip->th_info.status_low, 1);
- if (rc) {
- pr_err("adc-tm-tm read status low failed with %d\n", rc);
- return IRQ_HANDLED;
- }
-
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_LOW_THR_INT_EN,
- &chip->th_info.adc_tm_low_thr_set, 1);
- if (rc) {
- pr_err("adc-tm-tm read low thr failed with %d\n", rc);
- return IRQ_HANDLED;
- }
-
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_MULTI_MEAS_EN,
- &chip->th_info.qpnp_adc_tm_meas_en, 1);
- if (rc) {
- pr_err("adc-tm-tm read status high failed with %d\n", rc);
- return IRQ_HANDLED;
- }
-
- chip->th_info.adc_tm_low_enable = chip->th_info.qpnp_adc_tm_meas_en &
- chip->th_info.status_low;
- chip->th_info.adc_tm_low_enable &= chip->th_info.adc_tm_low_thr_set;
-
- sensor_notify_num = chip->th_info.adc_tm_low_enable;
- while (i < chip->max_channels_available) {
- if ((sensor_notify_num & 0x1) == 1)
- sensor_num = i;
- sensor_notify_num >>= 1;
- i++;
- }
-
- if (!chip->sensor[sensor_num].thermal_node) {
- sensor_mask = 1 << sensor_num;
- rc = qpnp_adc_tm_reg_update(chip,
- QPNP_ADC_TM_LOW_THR_INT_EN,
- sensor_mask, false);
- if (rc < 0) {
- pr_err("low threshold int read failed\n");
- return IRQ_HANDLED;
- }
- } else {
- /* Uses the thermal sysfs registered device to disable
- * the corresponding low voltage threshold which
- * is triggered by high temp
- */
- pr_debug("thermal node with mask:%x\n", sensor_mask);
- rc = qpnp_adc_tm_activate_trip_type(
- chip->sensor[sensor_num].tz_dev,
- ADC_TM_TRIP_HIGH_WARM,
- THERMAL_TRIP_ACTIVATION_DISABLED);
- if (rc < 0) {
- pr_err("notify error:%d\n", sensor_num);
- return IRQ_HANDLED;
- }
- }
-
- atomic_inc(&chip->wq_cnt);
- queue_work(chip->low_thr_wq, &chip->trigger_low_thr_work);
-
- return IRQ_HANDLED;
-}
-
static int qpnp_adc_tm_rc_check_sensor_trip(struct qpnp_adc_tm_chip *chip,
u8 status_low, u8 status_high, int i,
int *sensor_low_notify_num, int *sensor_high_notify_num)
@@ -2587,7 +1536,7 @@
*/
pr_debug("thermal node with mask:%x\n", sensor_mask);
rc = qpnp_adc_tm_activate_trip_type(
- chip->sensor[i].tz_dev,
+ &chip->sensor[i],
ADC_TM_TRIP_HIGH_WARM,
THERMAL_TRIP_ACTIVATION_DISABLED);
if (rc < 0) {
@@ -2618,7 +1567,7 @@
*/
pr_debug("thermal node with mask:%x\n", i);
rc = qpnp_adc_tm_activate_trip_type(
- chip->sensor[i].tz_dev,
+ &chip->sensor[i],
ADC_TM_TRIP_LOW_COOL,
THERMAL_TRIP_ACTIVATION_DISABLED);
if (rc < 0) {
@@ -2688,10 +1637,9 @@
return IRQ_HANDLED;
}
-static int qpnp_adc_read_temp(struct thermal_zone_device *thermal,
- int *temp)
+static int qpnp_adc_read_temp(void *data, int *temp)
{
- struct qpnp_adc_tm_sensor *adc_tm_sensor = thermal->devdata;
+ struct qpnp_adc_tm_sensor *adc_tm_sensor = data;
struct qpnp_adc_tm_chip *chip = adc_tm_sensor->chip;
struct qpnp_vadc_result result;
int rc = 0;
@@ -2706,14 +1654,9 @@
return rc;
}
-static struct thermal_zone_device_ops qpnp_adc_tm_thermal_ops = {
+static struct thermal_zone_of_device_ops qpnp_adc_tm_thermal_ops = {
.get_temp = qpnp_adc_read_temp,
- .get_mode = qpnp_adc_tm_get_mode,
- .set_mode = qpnp_adc_tm_set_mode,
- .get_trip_type = qpnp_adc_tm_get_trip_type,
- .activate_trip_type = qpnp_adc_tm_activate_trip_type,
- .get_trip_temp = qpnp_adc_tm_get_trip_temp,
- .set_trip_temp = qpnp_adc_tm_set_trip_temp,
+ .set_trips = qpnp_adc_tm_set_trip_temp,
};
int32_t qpnp_adc_tm_channel_measure(struct qpnp_adc_tm_chip *chip,
@@ -2807,18 +1750,11 @@
param->state_request;
chip->adc->amux_prop->calib_type =
chip->adc->adc_channels[dt_index].calib_type;
- if (!chip->adc_tm_hc) {
- rc = qpnp_adc_tm_configure(chip, chip->adc->amux_prop);
- if (rc) {
- pr_err("adc-tm configure failed with %d\n", rc);
- goto fail_unlock;
- }
- } else {
- rc = qpnp_adc_tm_hc_configure(chip, chip->adc->amux_prop);
- if (rc) {
- pr_err("adc-tm hc configure failed with %d\n", rc);
- goto fail_unlock;
- }
+
+ rc = qpnp_adc_tm_hc_configure(chip, chip->adc->amux_prop);
+ if (rc) {
+ pr_err("adc-tm hc configure failed with %d\n", rc);
+ goto fail_unlock;
}
chip->sensor[dt_index].scale_type = scale_type;
@@ -2834,7 +1770,6 @@
struct qpnp_adc_tm_btm_param *param)
{
uint32_t channel, dt_index = 0, btm_chan_num;
- u8 sensor_mask = 0, mode_ctl = 0;
int rc = 0;
if (qpnp_adc_tm_is_valid(chip))
@@ -2842,16 +1777,6 @@
mutex_lock(&chip->adc->adc_lock);
- if (!chip->adc_tm_hc) {
- /* Set measurement in single measurement mode */
- mode_ctl = ADC_OP_NORMAL_MODE << QPNP_OP_MODE_SHIFT;
- rc = qpnp_adc_tm_mode_select(chip, mode_ctl);
- if (rc < 0) {
- pr_err("adc-tm single mode select failed\n");
- goto fail;
- }
- }
-
/* Disable bank */
rc = qpnp_adc_tm_disable(chip);
if (rc < 0) {
@@ -2859,15 +1784,6 @@
goto fail;
}
- if (!chip->adc_tm_hc) {
- /* Check if a conversion is in progress */
- rc = qpnp_adc_tm_req_sts_check(chip);
- if (rc < 0) {
- pr_err("adc-tm req_sts check failed\n");
- goto fail;
- }
- }
-
channel = param->channel;
while ((chip->adc->adc_channels[dt_index].channel_num
!= channel) && (dt_index < chip->max_channels_available))
@@ -2881,50 +1797,25 @@
btm_chan_num = chip->sensor[dt_index].btm_channel_num;
- if (!chip->adc_tm_hc) {
- sensor_mask = 1 << chip->sensor[dt_index].sensor_num;
+ rc = qpnp_adc_tm_reg_update(chip, QPNP_BTM_Mn_EN(btm_chan_num),
+ QPNP_BTM_Mn_HIGH_THR_INT_EN, false);
+ if (rc < 0) {
+ pr_err("high thr disable err:%d\n", btm_chan_num);
+ return rc;
+ }
- rc = qpnp_adc_tm_reg_update(chip, QPNP_ADC_TM_LOW_THR_INT_EN,
- sensor_mask, false);
- if (rc < 0) {
- pr_err("low threshold int write failed\n");
- goto fail;
- }
+ rc = qpnp_adc_tm_reg_update(chip, QPNP_BTM_Mn_EN(btm_chan_num),
+ QPNP_BTM_Mn_LOW_THR_INT_EN, false);
+ if (rc < 0) {
+ pr_err("low thr disable err:%d\n", btm_chan_num);
+ return rc;
+ }
- rc = qpnp_adc_tm_reg_update(chip, QPNP_ADC_TM_HIGH_THR_INT_EN,
- sensor_mask, false);
- if (rc < 0) {
- pr_err("high threshold int enable failed\n");
- goto fail;
- }
-
- rc = qpnp_adc_tm_reg_update(chip, QPNP_ADC_TM_MULTI_MEAS_EN,
- sensor_mask, false);
- if (rc < 0) {
- pr_err("multi measurement en failed\n");
- goto fail;
- }
- } else {
- rc = qpnp_adc_tm_reg_update(chip, QPNP_BTM_Mn_EN(btm_chan_num),
- QPNP_BTM_Mn_HIGH_THR_INT_EN, false);
- if (rc < 0) {
- pr_err("high thr disable err:%d\n", btm_chan_num);
- return rc;
- }
-
- rc = qpnp_adc_tm_reg_update(chip, QPNP_BTM_Mn_EN(btm_chan_num),
- QPNP_BTM_Mn_LOW_THR_INT_EN, false);
- if (rc < 0) {
- pr_err("low thr disable err:%d\n", btm_chan_num);
- return rc;
- }
-
- rc = qpnp_adc_tm_reg_update(chip, QPNP_BTM_Mn_EN(btm_chan_num),
- QPNP_BTM_Mn_MEAS_EN, false);
- if (rc < 0) {
- pr_err("multi measurement disable failed\n");
- return rc;
- }
+ rc = qpnp_adc_tm_reg_update(chip, QPNP_BTM_Mn_EN(btm_chan_num),
+ QPNP_BTM_Mn_MEAS_EN, false);
+ if (rc < 0) {
+ pr_err("multi measurement disable failed\n");
+ return rc;
}
rc = qpnp_adc_tm_enable_if_channel_meas(chip);
@@ -2938,22 +1829,6 @@
}
EXPORT_SYMBOL(qpnp_adc_tm_disable_chan_meas);
-int32_t qpnp_adc_tm_usbid_configure(struct qpnp_adc_tm_chip *chip,
- struct qpnp_adc_tm_btm_param *param)
-{
- param->channel = LR_MUX10_PU2_AMUX_USB_ID_LV;
- return qpnp_adc_tm_channel_measure(chip, param);
-}
-EXPORT_SYMBOL(qpnp_adc_tm_usbid_configure);
-
-int32_t qpnp_adc_tm_usbid_end(struct qpnp_adc_tm_chip *chip)
-{
- struct qpnp_adc_tm_btm_param param;
-
- return qpnp_adc_tm_disable_chan_meas(chip, ¶m);
-}
-EXPORT_SYMBOL(qpnp_adc_tm_usbid_end);
-
struct qpnp_adc_tm_chip *qpnp_get_adc_tm(struct device *dev, const char *name)
{
struct qpnp_adc_tm_chip *chip;
@@ -2974,35 +1849,6 @@
}
EXPORT_SYMBOL(qpnp_get_adc_tm);
-static int qpnp_adc_tm_initial_setup(struct qpnp_adc_tm_chip *chip)
-{
- u8 thr_init = 0;
- int rc = 0;
-
- rc = qpnp_adc_tm_write_reg(chip, QPNP_ADC_TM_HIGH_THR_INT_EN,
- thr_init, 1);
- if (rc < 0) {
- pr_err("high thr init failed\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_write_reg(chip, QPNP_ADC_TM_LOW_THR_INT_EN,
- thr_init, 1);
- if (rc < 0) {
- pr_err("low thr init failed\n");
- return rc;
- }
-
- rc = qpnp_adc_tm_write_reg(chip, QPNP_ADC_TM_MULTI_MEAS_EN,
- thr_init, 1);
- if (rc < 0) {
- pr_err("multi meas en failed\n");
- return rc;
- }
-
- return rc;
-}
-
static const struct of_device_id qpnp_adc_tm_match_table[] = {
{ .compatible = "qcom,qpnp-adc-tm" },
{ .compatible = "qcom,qpnp-adc-tm-hc" },
@@ -3055,10 +1901,8 @@
goto fail;
}
- if (of_device_is_compatible(node, "qcom,qpnp-adc-tm-hc")) {
- chip->adc_tm_hc = true;
- chip->adc->adc_hc = true;
- }
+ chip->adc_tm_hc = true;
+ chip->adc->adc_hc = true;
rc = qpnp_adc_get_devicetree_data(pdev, chip->adc);
if (rc) {
@@ -3067,25 +1911,6 @@
}
mutex_init(&chip->adc->adc_lock);
- /* Register the ADC peripheral interrupt */
- if (!chip->adc_tm_hc) {
- chip->adc->adc_high_thr_irq = platform_get_irq_byname(pdev,
- "high-thr-en-set");
- if (chip->adc->adc_high_thr_irq < 0) {
- pr_err("Invalid irq\n");
- rc = -ENXIO;
- goto fail;
- }
-
- chip->adc->adc_low_thr_irq = platform_get_irq_byname(pdev,
- "low-thr-en-set");
- if (chip->adc->adc_low_thr_irq < 0) {
- pr_err("Invalid irq\n");
- rc = -ENXIO;
- goto fail;
- }
- }
-
chip->vadc_dev = qpnp_get_vadc(&pdev->dev, "adc_tm");
if (IS_ERR(chip->vadc_dev)) {
rc = PTR_ERR(chip->vadc_dev);
@@ -3155,10 +1980,11 @@
chip->sensor[sen_idx].high_thr =
QPNP_ADC_TM_M0_HIGH_THR;
chip->sensor[sen_idx].tz_dev =
- thermal_zone_device_register(name,
- ADC_TM_TRIP_NUM, ADC_TM_WRITABLE_TRIPS_MASK,
+ devm_thermal_zone_of_sensor_register(
+ chip->dev,
+ chip->sensor[sen_idx].vadc_channel_num,
&chip->sensor[sen_idx],
- &qpnp_adc_tm_thermal_ops, NULL, 0, 0);
+ &qpnp_adc_tm_thermal_ops);
if (IS_ERR(chip->sensor[sen_idx].tz_dev))
pr_err("thermal device register failed.\n");
}
@@ -3173,18 +1999,21 @@
sen_idx++;
}
chip->max_channels_available = count_adc_channel_list;
+
chip->high_thr_wq = alloc_workqueue("qpnp_adc_tm_high_thr_wq",
WQ_HIGHPRI, 0);
if (!chip->high_thr_wq) {
pr_err("Requesting high thr priority wq failed\n");
goto fail;
}
+
chip->low_thr_wq = alloc_workqueue("qpnp_adc_tm_low_thr_wq",
WQ_HIGHPRI, 0);
if (!chip->low_thr_wq) {
pr_err("Requesting low thr priority wq failed\n");
goto fail;
}
+
chip->thr_wq = alloc_workqueue("qpnp_adc_tm_thr_wq",
WQ_HIGHPRI, 0);
if (!chip->thr_wq) {
@@ -3196,39 +2025,13 @@
INIT_WORK(&chip->trigger_low_thr_work, qpnp_adc_tm_low_thr_work);
atomic_set(&chip->wq_cnt, 0);
- if (!chip->adc_tm_hc) {
- rc = qpnp_adc_tm_initial_setup(chip);
- if (rc)
- goto fail;
-
- rc = devm_request_irq(&pdev->dev, chip->adc->adc_high_thr_irq,
- qpnp_adc_tm_high_thr_isr,
- IRQF_TRIGGER_RISING, "qpnp_adc_tm_high_interrupt", chip);
- if (rc) {
- dev_err(&pdev->dev, "failed to request adc irq\n");
- goto fail;
- } else {
- enable_irq_wake(chip->adc->adc_high_thr_irq);
- }
-
- rc = devm_request_irq(&pdev->dev, chip->adc->adc_low_thr_irq,
- qpnp_adc_tm_low_thr_isr,
- IRQF_TRIGGER_RISING, "qpnp_adc_tm_low_interrupt", chip);
- if (rc) {
- dev_err(&pdev->dev, "failed to request adc irq\n");
- goto fail;
- } else {
- enable_irq_wake(chip->adc->adc_low_thr_irq);
- }
- } else {
- rc = devm_request_irq(&pdev->dev, chip->adc->adc_irq_eoc,
- qpnp_adc_tm_rc_thr_isr,
- IRQF_TRIGGER_RISING, "qpnp_adc_tm_interrupt", chip);
- if (rc)
- dev_err(&pdev->dev, "failed to request adc irq\n");
- else
- enable_irq_wake(chip->adc->adc_irq_eoc);
- }
+ rc = devm_request_irq(&pdev->dev, chip->adc->adc_irq_eoc,
+ qpnp_adc_tm_rc_thr_isr,
+ IRQF_TRIGGER_RISING, "qpnp_adc_tm_interrupt", chip);
+ if (rc)
+ dev_err(&pdev->dev, "failed to request adc irq\n");
+ else
+ enable_irq_wake(chip->adc->adc_irq_eoc);
chip->adc_vote_enable = false;
dev_set_drvdata(&pdev->dev, chip);
@@ -3258,17 +2061,11 @@
{
struct qpnp_adc_tm_chip *chip = dev_get_drvdata(&pdev->dev);
struct device_node *node = pdev->dev.of_node, *child;
- bool thermal_node = false;
int i = 0;
for_each_child_of_node(node, child) {
- thermal_node = of_property_read_bool(child,
- "qcom,thermal-node");
- if (thermal_node) {
- thermal_zone_device_unregister(chip->sensor[i].tz_dev);
- if (chip->sensor[i].req_wq)
- destroy_workqueue(chip->sensor[i].req_wq);
- }
+ if (chip->sensor[i].req_wq)
+ destroy_workqueue(chip->sensor[i].req_wq);
i++;
}
@@ -3286,40 +2083,20 @@
static void qpnp_adc_tm_shutdown(struct platform_device *pdev)
{
struct qpnp_adc_tm_chip *chip = dev_get_drvdata(&pdev->dev);
- int rc = 0;
- u8 reg_val = 0, status1 = 0, en_ctl1 = 0;
-
- /* Set measurement in single measurement mode */
- reg_val = ADC_OP_NORMAL_MODE << QPNP_OP_MODE_SHIFT;
- rc = qpnp_adc_tm_mode_select(chip, reg_val);
- if (rc < 0)
- pr_err("adc-tm single mode select failed\n");
+ int rc = 0, i = 0;
/* Disable bank */
rc = qpnp_adc_tm_disable(chip);
if (rc < 0)
pr_err("adc-tm disable failed\n");
- /* Check if a conversion is in progress */
- rc = qpnp_adc_tm_req_sts_check(chip);
- if (rc < 0)
- pr_err("adc-tm req_sts check failed\n");
-
- /* Disable multimeasurement */
- reg_val = 0;
- rc = qpnp_adc_tm_write_reg(chip, QPNP_ADC_TM_MULTI_MEAS_EN, reg_val, 1);
- if (rc < 0)
- pr_err("adc-tm multi-measurement mode disable failed\n");
-
- rc = qpnp_adc_tm_read_reg(chip, QPNP_ADC_TM_STATUS1, &status1, 1);
- if (rc < 0)
- pr_err("adc-tm status1 read failed\n");
-
- rc = qpnp_adc_tm_read_reg(chip, QPNP_EN_CTL1, &en_ctl1, 1);
- if (rc < 0)
- pr_err("adc-tm en_ctl1 read failed\n");
-
- pr_debug("adc-tm status1=0%x, en_ctl1=0x%x\n", status1, en_ctl1);
+ for (i = 0; i < QPNP_BTM_CHANNELS; i++) {
+ rc = qpnp_adc_tm_reg_update(chip,
+ QPNP_BTM_Mn_EN(i),
+ QPNP_BTM_Mn_MEAS_EN, false);
+ if (rc < 0)
+ pr_err("multi measurement disable failed\n");
+ }
}
static int qpnp_adc_tm_suspend_noirq(struct device *dev)